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Refactor CSR module to remove unused public modules
1 parent 32d18b6 commit 0cfac2e

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Lines changed: 41 additions & 49 deletions

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‎src/csr.rs‎

Lines changed: 41 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -14,29 +14,29 @@ pub const CSR_SIZE: usize = 4096;
1414
//////////////////////////////
1515
// User trap setup.
1616
/// User status register.
17-
pub const USTATUS: CsrAddress = 0x000;
17+
const USTATUS: CsrAddress = 0x000;
1818
/// User trap handler base address.
19-
pub const UTVEC: CsrAddress = 0x005;
19+
const UTVEC: CsrAddress = 0x005;
2020

2121
// User trap handling.
2222
/// User exception program counter.
23-
pub const UEPC: CsrAddress = 0x041;
23+
const UEPC: CsrAddress = 0x041;
2424
/// User trap cause.
25-
pub const UCAUSE: CsrAddress = 0x042;
25+
const UCAUSE: CsrAddress = 0x042;
2626
/// User bad address or instruction.
27-
pub const UTVAL: CsrAddress = 0x043;
27+
const _UTVAL: CsrAddress = 0x043;
2828

2929
// User floating-point CSRs.
3030
/// Flating-point accrued exceptions.
31-
pub const FFLAGS: CsrAddress = 0x001;
31+
const _FFLAGS: CsrAddress = 0x001;
3232
/// Floating-point dynamic rounding mode.
33-
pub const FRB: CsrAddress = 0x002;
33+
const _FRB: CsrAddress = 0x002;
3434
/// Floating-point control and status register (frm + fflags).
3535
pub const FCSR: CsrAddress = 0x003;
3636

3737
// User Counter/Timers.
3838
/// Timer for RDTIME instruction.
39-
pub const TIME: CsrAddress = 0xc01;
39+
const TIME: CsrAddress = 0xc01;
4040

4141
/////////////////////////////////////
4242
// Supervisor-level CSR addresses //
@@ -45,17 +45,17 @@ pub const TIME: CsrAddress = 0xc01;
4545
/// Supervisor status register.
4646
pub const SSTATUS: CsrAddress = 0x100;
4747
/// Supervisor exception delegation register.
48-
pub const SEDELEG: CsrAddress = 0x102;
48+
const SEDELEG: CsrAddress = 0x102;
4949
/// Supervisor interrupt delegation register.
50-
pub const SIDELEG: CsrAddress = 0x103;
50+
const SIDELEG: CsrAddress = 0x103;
5151
/// Supervisor interrupt-enable register.
5252
pub const SIE: CsrAddress = 0x104;
5353
/// Supervisor trap handler base address.
5454
pub const STVEC: CsrAddress = 0x105;
5555

5656
// Supervisor trap handling.
5757
/// Scratch register for supervisor trap handlers.
58-
pub const SSCRATCH: CsrAddress = 0x140;
58+
const _SSCRATCH: CsrAddress = 0x140;
5959
/// Supervisor exception program counter.
6060
pub const SEPC: CsrAddress = 0x141;
6161
/// Supervisor trap cause.
@@ -70,35 +70,43 @@ pub const SIP: CsrAddress = 0x144;
7070
pub const SATP: CsrAddress = 0x180;
7171

7272
// SSTATUS fields.
73-
//pub const SSTATUS_UIE: u64 = 0x00000001;
74-
pub const SSTATUS_SIE: u64 = 0x00000002;
75-
//pub const SSTATUS_UPIE: u64 = 0x00000010;
76-
pub const SSTATUS_SPIE: u64 = 0x00000020;
77-
pub const SSTATUS_SPP: u64 = 0x00000100;
78-
pub const SSTATUS_FS: u64 = 0x00006000;
79-
pub const SSTATUS_XS: u64 = 0x00018000;
80-
pub const SSTATUS_SUM: u64 = 0x00040000;
81-
pub const SSTATUS_MXR: u64 = 0x00080000;
82-
pub const SSTATUS_UXL: u64 = 0x0000000300000000;
73+
const SSTATUS_SIE: u64 = 0x2; // sstatus[1]
74+
const SSTATUS_SPIE: u64 = 0x20; // sstatus[5]
75+
const SSTATUS_UBE: u64 = 0x40; // sstatus[6]
76+
const SSTATUS_SPP: u64 = 0x100; // sstatus[8]
77+
const SSTATUS_FS: u64 = 0x6000; // sstatus[14:13]
78+
const SSTATUS_XS: u64 = 0x18000; // sstatus[16:15]
79+
const SSTATUS_SUM: u64 = 0x40000; // sstatus[18]
80+
const SSTATUS_MXR: u64 = 0x80000; // sstatus[19]
81+
const SSTATUS_UXL: u64 = 0x3_00000000; // sstatus[33:32]
82+
const SSTATUS_MASK: u64 = SSTATUS_SIE
83+
| SSTATUS_SPIE
84+
| SSTATUS_UBE
85+
| SSTATUS_SPP
86+
| SSTATUS_FS
87+
| SSTATUS_XS
88+
| SSTATUS_SUM
89+
| SSTATUS_MXR
90+
| SSTATUS_UXL;
8391

8492
/////////////////////////////////
8593
// Machine-level CSR addresses //
8694
/////////////////////////////////
8795
// Machine information registers.
8896
/// Vendor ID.
89-
pub const MVENDORID: CsrAddress = 0xf11;
97+
const MVENDORID: CsrAddress = 0xf11;
9098
/// Architecture ID.
91-
pub const MARCHID: CsrAddress = 0xf12;
99+
const MARCHID: CsrAddress = 0xf12;
92100
/// Implementation ID.
93-
pub const MIMPID: CsrAddress = 0xf13;
101+
const MIMPID: CsrAddress = 0xf13;
94102
/// Hardware thread ID.
95-
pub const MHARTID: CsrAddress = 0xf14;
103+
const MHARTID: CsrAddress = 0xf14;
96104

97105
// Machine trap setup.
98106
/// Machine status register.
99107
pub const MSTATUS: CsrAddress = 0x300;
100108
/// ISA and extensions.
101-
pub const MISA: CsrAddress = 0x301;
109+
const MISA: CsrAddress = 0x301;
102110
/// Machine exception delefation register.
103111
pub const MEDELEG: CsrAddress = 0x302;
104112
/// Machine interrupt delefation register.
@@ -108,11 +116,11 @@ pub const MIE: CsrAddress = 0x304;
108116
/// Machine trap-handler base address.
109117
pub const MTVEC: CsrAddress = 0x305;
110118
/// Machine counter enable.
111-
pub const MCOUNTEREN: CsrAddress = 0x306;
119+
const _MCOUNTEREN: CsrAddress = 0x306;
112120

113121
// Machine trap handling.
114122
/// Scratch register for machine trap handlers.
115-
pub const MSCRATCH: CsrAddress = 0x340;
123+
const _MSCRATCH: CsrAddress = 0x340;
116124
/// Machine exception program counter.
117125
pub const MEPC: CsrAddress = 0x341;
118126
/// Machine trap cause.
@@ -124,9 +132,9 @@ pub const MIP: CsrAddress = 0x344;
124132

125133
// Machine memory protection.
126134
/// Physical memory protection configuration.
127-
pub const PMPCFG0: CsrAddress = 0x3a0;
135+
const _PMPCFG0: CsrAddress = 0x3a0;
128136
/// Physical memory protection address register.
129-
pub const PMPADDR0: CsrAddress = 0x3b0;
137+
const _PMPADDR0: CsrAddress = 0x3b0;
130138

131139
// MIP fields.
132140
/// Supervisor software interrupt.
@@ -217,17 +225,7 @@ impl State {
217225
// machine-mode CSR, and the machinemode chapter should be read first to help understand
218226
// the supervisor-level CSR descriptions."
219227
match addr {
220-
SSTATUS => {
221-
let mask = SSTATUS_SIE
222-
| SSTATUS_SPIE
223-
| SSTATUS_SPP
224-
| SSTATUS_FS
225-
| SSTATUS_XS
226-
| SSTATUS_SUM
227-
| SSTATUS_MXR
228-
| SSTATUS_UXL;
229-
self.csrs[MSTATUS as usize] & mask
230-
}
228+
SSTATUS => self.csrs[MSTATUS as usize] & SSTATUS_MASK,
231229
SIE => self.csrs[MIE as usize] & self.csrs[MIDELEG as usize],
232230
SIP => self.csrs[MIP as usize] & self.csrs[MIDELEG as usize],
233231
_ => self.csrs[addr as usize],
@@ -249,14 +247,8 @@ impl State {
249247
MIMPID => {}
250248
MHARTID => {}
251249
SSTATUS => {
252-
let mask = SSTATUS_SIE
253-
| SSTATUS_SPIE
254-
| SSTATUS_SPP
255-
| SSTATUS_FS
256-
| SSTATUS_XS
257-
| SSTATUS_SUM
258-
| SSTATUS_MXR;
259-
self.csrs[MSTATUS as usize] = (self.csrs[MSTATUS as usize] & !mask) | (val & mask);
250+
self.csrs[MSTATUS as usize] =
251+
(self.csrs[MSTATUS as usize] & !SSTATUS_MASK) | (val & SSTATUS_MASK);
260252
}
261253
SIE => {
262254
self.csrs[MIE as usize] = (self.csrs[MIE as usize] & !self.csrs[MIDELEG as usize])

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