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• Add riscv sequential mode detection ## Summary - recognize riscv64 explicitly in mipp.h; - make riscv64 resolve to the existing sequential no-intrinsics mode instead of leaking host SIMD backends.

  #67·carlosqwqqwq opened Jun 19, 2026·

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• feat: add rsqrt with prec step on NEON float 32

  #59·riwanou opened Jan 7, 2025·

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