From b28f2e1bf7e89ee3df2214e5ff5403753fa946e5 Mon Sep 17 00:00:00 2001 From: Pavel Burovskiy Date: Tue, 8 Sep 2015 22:06:35 +0100 Subject: [PATCH 1/6] Adding first implementation of FST cache, fails many tests --- src/spmv/src/SpmvKernel.maxj | 108 +++++++++++++++++++++++++++++++++- src/spmv/src/SpmvManager.maxj | 2 +- 2 files changed, 107 insertions(+), 3 deletions(-) diff --git a/src/spmv/src/SpmvKernel.maxj b/src/spmv/src/SpmvKernel.maxj index 506643a..f77e76b 100644 --- a/src/spmv/src/SpmvKernel.maxj +++ b/src/spmv/src/SpmvKernel.maxj @@ -12,6 +12,8 @@ import com.maxeler.maxcompiler.v2.utils.MathUtils; import com.custom_computing_ic.dfe_snippets.utils.Reductions; import com.custom_computing_ic.dfe_snippets.reductions.LogAddReduce; +import com.custom_computing_ic.dfe_snippets.utils.FetchSubTuple; + class SpmvKernel extends Kernel { @@ -115,8 +117,9 @@ class SpmvKernel extends Kernel { } -// This implements cache -// +// This implements cache as +// - row of BRAMs +// - SM, which helps to select BRAM values class SpmvCacheKernel extends Kernel { private final DFEVectorType vtype, ivtype; @@ -194,6 +197,107 @@ class SpmvCacheKernel extends Kernel { } +// This implements cache as +// - row of BRAMs +// - FetchSubTuple +// First, rough and pointless implementation. +class SpmvCacheFSTKernel extends Kernel { + + private final DFEVectorType vtype, ivtype; + private final List> vroms; + private final int inputWidth; + private final DFEType addressT; + + protected SpmvCacheFSTKernel(KernelParameters parameters, + int inputWidth, + int cacheSize, + int indexWidth, + int mantissaWidth) { + super(parameters); + + this.inputWidth = inputWidth; + this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); + + // load entire vector or until cache is full + int sizeBits = 32; // XXX may need to run for more cycles + DFEVar vRomLoadEnable = io.input("loadEnabled_in", dfeBool()); + + DFEVar vectorLoadCycles = io.scalarInput("vectorLoadCycles", dfeUInt(32)); + Params loadAddressParams = control.count.makeParams(sizeBits ) + .withMax(vectorLoadCycles) + .withEnable(vRomLoadEnable); + DFEVar loadAddress = control.count.makeCounter(loadAddressParams).getCount(); + + + vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); + ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); + DFEVar vectorValue = io.input("vromLoad", dfeFloat(11, mantissaWidth), vRomLoadEnable); + //--- Cache allocation and control + vroms = new ArrayList>(); + for (int i = 0; i < inputWidth; i++) { + Memory vrom = mem.alloc(dfeFloat(11, mantissaWidth), cacheSize); + vroms.add(vrom); + vrom.write( + loadAddress.cast(addressT), + vectorValue, + vRomLoadEnable); + } + + // --- I/O + // --- buffering matrix and colptr data in FST + + // assuming readEnable guards internal storage of FST from overflow: + // + // DFEVar dataRequestEnableLoop = dfeBool().newInstance(this); + // DFEVar dataRequestEnable = control.count.pulse(1)? 0 + // : stream.offset(dataRequestEnableLoop,-1); + // DFEVar enable = readEnable & dataRequestEnable; + + DFEVar readEnable = io.input("readenable", dfeBool()) & ~vRomLoadEnable; + DFEVar readMask = io.input("readmask", dfeUInt(inputWidth)); + + DFEVector matrix_in = io.input("values", vtype, readEnable); + DFEVector index_in = io.input("indptr", ivtype, readEnable); + + // big hack around: counting the number of 1s in readmask + List readmask_bits = new ArrayList(); + for (int i = 0; i < inputWidth; i++) + { + readmask_bits.add(readMask[i].cast(dfeBool()).cast(dfeUInt(6))); // 2^6 = 64 > 48 = inputWidth + } + DFEVar numEntriesToRead = Reductions.reduce(readmask_bits); + + // we don't care which PE receives each entry (assume matrices are + // numerically nice enough to change the order of accumulation) + boolean alignOutput = false; + int matrixTypeWidth = 11 + mantissaWidth; + FetchSubTuple matrixBuffer = new FetchSubTuple(this, "matrix", inputWidth, + matrixTypeWidth, dfeFloat(11, mantissaWidth), + alignOutput); + FetchSubTuple indexBuffer = new FetchSubTuple(this, "index", inputWidth, + indexWidth, dfeUInt(indexWidth), alignOutput); + + DFEVector matrixValues = matrixBuffer.popPush(numEntriesToRead, readEnable, matrix_in); + DFEVector colptr = indexBuffer.popPush(numEntriesToRead, readEnable, index_in); + + //dataRequestEnableLoop <== matrixBuffer.nextPushEnable(); + + DFEVector vectorValues = resolveVectorReads(colptr); + + io.output("loadEnabled_out", vRomLoadEnable, dfeBool()); + io.output("matrixValues", matrixValues, vtype, ~vRomLoadEnable); + io.output("vectorValues", vectorValues, vtype, ~vRomLoadEnable); + } + + DFEVector resolveVectorReads(DFEVector reads) { + DFEVector out = vtype.newInstance(this); + for (int i = 0; i < vroms.size(); i++) + out[i] <== vroms.get(i).read(reads[i].cast(addressT)); + return out; + } + +} + diff --git a/src/spmv/src/SpmvManager.maxj b/src/spmv/src/SpmvManager.maxj index a662458..d078295 100644 --- a/src/spmv/src/SpmvManager.maxj +++ b/src/spmv/src/SpmvManager.maxj @@ -47,7 +47,7 @@ public class SpmvManager extends CustomManager{ StateMachineBlock readControlBlock = addStateMachine("readControl", readControl); readControlBlock.getInput("length") <== csrDecoderBlock.getOutput("rowLength_out"); - KernelBlock cache = addKernel(new SpmvCacheKernel( + KernelBlock cache = addKernel(new SpmvCacheFSTKernel( makeKernelParameters(s_cacheKernel), inputWidth, cacheSize, From 5d96c8c6981b7f8a7038eb54997919683ee46a26 Mon Sep 17 00:00:00 2001 From: Pavel Burovskiy Date: Thu, 10 Sep 2015 16:28:38 +0100 Subject: [PATCH 2/6] Adding cycle count estimation for FST cache --- src/spmv/src/Spmv.cpp | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/spmv/src/Spmv.cpp b/src/spmv/src/Spmv.cpp index 18fda7b..b0be4c8 100644 --- a/src/spmv/src/Spmv.cpp +++ b/src/spmv/src/Spmv.cpp @@ -10,6 +10,19 @@ using EigenSparseMatrix = Eigen::SparseMatrix; +// how many cycles does it take to resolve the accesses with FST +int cycleCountFST(int32_t* v, int size) { + int bufferWidth = Spmv_inputWidth; + for (int i = 0; i < size; i++) { + int toread = v[i] - (i > 0 ? v[i - 1] : 0); + do { + toread -= std::min(toread, bufferWidth); + cycles++; + } while (toread > 0); + } + return cycles; +} + // how many cycles does it take to resolve the accesses int cycleCount(int32_t* v, int size) { int cycles = 0; From 1c51e34e7e6a0d876c16aa7dbbe7fed63ca91911 Mon Sep 17 00:00:00 2001 From: Pavel Burovskiy Date: Thu, 10 Sep 2015 22:46:15 +0100 Subject: [PATCH 3/6] Adding annotations for FST case --- .../SpmvKernel.maxj | 346 + .../SpmvManager.maxj | 153 + .../spmv_48p_2048c_0.5pf_full_fst/_build.log | 16923 ++++++++++++++++ .../spmv_48p_2048c_0.5pf_full_fst/report.txt | 155 + 4 files changed, 17577 insertions(+) create mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj create mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj create mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/_build.log create mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj new file mode 100644 index 0000000..501d337 --- /dev/null +++ b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj @@ -0,0 +1,346 @@ + LUTs FFs BRAMs DSPs : SpmvKernel.maxj + 105055 132726 614 192 : resources used by this file + 20.02% 12.65% 23.92% 9.78% : % of available + 58.95% 51.70% 47.30% 100.00% : % of total used + 98.74% 93.30% 99.68% 100.00% : % of user resources + + : import java.util.*; + : + : import com.maxeler.maxcompiler.v2.kernelcompiler.Kernel; + : import com.maxeler.maxcompiler.v2.kernelcompiler.KernelParameters; + : import com.maxeler.maxcompiler.v2.kernelcompiler.types.base.*; + : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.Count.*; + : import com.maxeler.maxcompiler.v2.kernelcompiler.types.composite.DFEVectorType; + : import com.maxeler.maxcompiler.v2.kernelcompiler.types.composite.DFEVector; + : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.memory.*; + : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.KernelMath; + : import com.maxeler.maxcompiler.v2.utils.MathUtils; + : + : import com.custom_computing_ic.dfe_snippets.utils.Reductions; + : import com.custom_computing_ic.dfe_snippets.reductions.LogAddReduce; + : import com.custom_computing_ic.dfe_snippets.utils.FetchSubTuple; + : + : + : class SpmvKernel extends Kernel { + : + : // N x N matrix, nnzs nonzeros + : // + : // load data for N cycles into cache + : // compute for N cycles + : // -- in the mean time load data for N cycles in double buffer + : // repeat + : // + : // Sources of inefficiency: + : // -- empty rows + : // -- port sharing cannot be used + : + : private final DFEVectorType vtype, ivtype; + : private final int inputWidth; + : private final DFEType addressT; + : private final boolean dbg; + : + : private static final int fpL = 16; + : + : protected SpmvKernel( + : KernelParameters parameters, + : int inputWidth, + : int cacheSize, + : int indexWidth, + : int mantissaWidth, + : boolean dbg) { + : super(parameters); + : + : optimization.pushPipeliningFactor(0.5); + : optimization.pushDSPFactor(1); + : + : + : this.inputWidth = inputWidth; + : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); + : this.dbg = dbg; + : + : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); + : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); + : + : // TODO: remove prefetch from this kernel + : + 1 2 0 0 : DFEVar vRomLoadEnable = io.input("loadEnabled", dfeBool()); + 1 0 0 0 : DFEVector matrixValues = io.input("matrixValues", vtype, ~vRomLoadEnable); + 1 1 0 0 : DFEVector vectorValues = io.input("vectorValues", vtype, ~vRomLoadEnable); + : + 65864 89061 127 192 : DFEVar result = Reductions.reduce(matrixValues * vectorValues); + : + : // --- Accumulation + 1 2 0 0 : DFEVar rowFinished = io.input("rowFinished", dfeBool()); + 1 1 0 0 : DFEVar rowLength = io.input("rowLength", dfeUInt(32)); + 1 1 0 0 : DFEVar cycleCounter = io.input("cycleCounter", dfeUInt(32)); + 1 0 0 0 : DFEVar firstReadPosition = io.input("firstReadPosition", dfeUInt(32)); + : + 32 32 0 0 : DFEVar runLength = firstReadPosition + rowLength; + 258 234 2 0 : DFEVar modulo = KernelMath.modulo(runLength, inputWidth); + 1240 988 10 0 : DFEVar quot = (runLength - modulo.cast(dfeUInt(32))) / inputWidth; + : + 33 51 0 0 : DFEVar totalCycles = quot + (modulo === 0 ? constant.var(dfeUInt(32), 0) : 1); + : + : DFEVar carriedSum = dfeFloat(11, mantissaWidth).newInstance(this); + 1103 1177 3 0 : DFEVar newSum = result + (cycleCounter < fpL ? 0 : carriedSum); + : carriedSum <== stream.offset(newSum, -fpL); + : + 41 65 0 0 : DFEVar firstValidPartialSum = (totalCycles > fpL)? (totalCycles - fpL) : 0; + 25 1 0 0 : DFEVar validPartialSums = (cycleCounter >= firstValidPartialSum); + 4654 5213 4 0 : LogAddReduce r = new LogAddReduce(this, + : validPartialSums, + : rowFinished, + : newSum, + : dfeFloat(11, mantissaWidth), + : fpL); + : + : // TODO still need reduction step + : // TODO: remove prefetch + 10 12 1 0 : DFEVar outputEnable = ~vRomLoadEnable & rowFinished; + 9 6 1 0 : io.output("output", r.getOutput(), dfeFloat(11, mantissaWidth), outputEnable); + : + : // --- Debug + : if (dbg) { + : Params rowCounterParams = control.count.makeParams(32) + : .withEnable(rowFinished); + : DFEVar rowCounter = control.count.makeCounter(rowCounterParams).getCount(); + : /* debug.simPrintf( + : rowLength !== 0, + : "Kernel -- row %d totalCycles %d, readenable %d, readmask %d rowFinished %d rowLength %d output: %f cycleCounter %d validPartialSums %d newSum %f firstRead %d", + : rowCounter, totalCycles, readEnable, readMask, rowFinished, rowLength, r.getOutput(), cycleCounter, validPartialSums, newSum, firstReadPosition); + : debug.simPrintf(rowLength !== 0 , " loadEnable %d loadAddress %d\n", vRomLoadEnable, loadAddress); + : */ + : //debug.simPrintf("\n"); + : //debug.simPrintf("Values: "); + : //for (int i = 0; i < inputWidth; i++) + : //debug.simPrintf("%f ", values[i]); + : //debug.simPrintf("Indices: "); + : //for (int i = 0; i < inputWidth; i++) + : //debug.simPrintf("%d ", colptr[i]); + : //debug.simPrintf("\n"); + : } + : } + : + : } + : + : // This implements cache as + : // - row of BRAMs + : // - SM, which helps to select BRAM values + : class SpmvCacheKernel extends Kernel { + : + : private final DFEVectorType vtype, ivtype; + : private final List> vroms; + : private final int inputWidth; + : private final DFEType addressT; + : + : protected SpmvCacheKernel(KernelParameters parameters, + : int inputWidth, + : int cacheSize, + : int indexWidth, + : int mantissaWidth) { + : super(parameters); + : + : this.inputWidth = inputWidth; + : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); + : + : // load entire vector or until cache is full + : int sizeBits = 32; // XXX may need to run for more cycles + : DFEVar vRomLoadEnable = io.input("loadEnabled_in", dfeBool()); + : + : DFEVar vectorLoadCycles = io.scalarInput("vectorLoadCycles", dfeUInt(32)); + : Params loadAddressParams = control.count.makeParams(sizeBits ) + : .withMax(vectorLoadCycles) + : .withEnable(vRomLoadEnable); + : DFEVar loadAddress = control.count.makeCounter(loadAddressParams).getCount(); + : + : + : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); + : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); + : DFEVar vectorValue = io.input("vromLoad", dfeFloat(11, mantissaWidth), vRomLoadEnable); + : //--- Cache allocation and control + : vroms = new ArrayList>(); + : for (int i = 0; i < inputWidth; i++) { + : Memory vrom = mem.alloc(dfeFloat(11, mantissaWidth), cacheSize); + : vroms.add(vrom); + : vrom.write( + : loadAddress.cast(addressT), + : vectorValue, + : vRomLoadEnable); + : } + : + : // --- I/O + : DFEVar readEnable = io.input("readenable", dfeBool()) & ~vRomLoadEnable; + : DFEVar readMask = io.input("readmask", dfeUInt(inputWidth)); + : DFEVector matrixValues = selectValues( + : io.input("values", vtype, readEnable), + : readMask); + : DFEVector colptr = selectValues( + : io.input("indptr", ivtype, readEnable), + : readMask); + : DFEVector vectorValues = resolveVectorReads(colptr); + : + : io.output("loadEnabled_out", vRomLoadEnable, dfeBool()); + : io.output("matrixValues", matrixValues, vtype, ~vRomLoadEnable); + : io.output("vectorValues", vectorValues, vtype, ~vRomLoadEnable); + : } + : + : DFEVector selectValues( + : DFEVector in, + : DFEVar readMask) { + : DFEVector out = in.getType().newInstance(this); + : for (int i = 0; i < in.getSize(); i++) + : out[i] <== readMask.slice(i) === 0 ? 0 : in[i]; + : return out; + : } + : + : + : DFEVector resolveVectorReads(DFEVector reads) { + : DFEVector out = vtype.newInstance(this); + : for (int i = 0; i < vroms.size(); i++) + : out[i] <== vroms.get(i).read(reads[i].cast(addressT)); + : return out; + : } + : + : } + : + : // This implements cache as + : // - row of BRAMs + : // - FetchSubTuple + : // First, rough and pointless implementation. + : class SpmvCacheFSTKernel extends Kernel { + : + : private final DFEVectorType vtype, ivtype; + : private final List> vroms; + : private final int inputWidth; + : private final DFEType addressT; + : + : protected SpmvCacheFSTKernel(KernelParameters parameters, + : int inputWidth, + : int cacheSize, + : int indexWidth, + : int mantissaWidth) { + : super(parameters); + : + : this.inputWidth = inputWidth; + : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); + : + : // load entire vector or until cache is full + : int sizeBits = 32; // XXX may need to run for more cycles + 1 1 0 0 : DFEVar vRomLoadEnable = io.input("loadEnabled_in", dfeBool()); + : + : DFEVar vectorLoadCycles = io.scalarInput("vectorLoadCycles", dfeUInt(32)); + : Params loadAddressParams = control.count.makeParams(sizeBits ) + : .withMax(vectorLoadCycles) + : .withEnable(vRomLoadEnable); + 94 78 0 0 : DFEVar loadAddress = control.count.makeCounter(loadAddressParams).getCount(); + : + : + : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); + : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); + 1 65 0 0 : DFEVar vectorValue = io.input("vromLoad", dfeFloat(11, mantissaWidth), vRomLoadEnable); + : //--- Cache allocation and control + : vroms = new ArrayList>(); + : for (int i = 0; i < inputWidth; i++) { + 1 1 336 0 : Memory vrom = mem.alloc(dfeFloat(11, mantissaWidth), cacheSize); + : vroms.add(vrom); + : vrom.write( + : loadAddress.cast(addressT), + : vectorValue, + : vRomLoadEnable); + : } + : + : // --- I/O + : // --- buffering matrix and colptr data in FST + : + : // assuming readEnable guards internal storage of FST from overflow: + : // + : // DFEVar dataRequestEnableLoop = dfeBool().newInstance(this); + : // DFEVar dataRequestEnable = control.count.pulse(1)? 0 + : // : stream.offset(dataRequestEnableLoop,-1); + : // DFEVar enable = readEnable & dataRequestEnable; + : + 2 3 0 0 : DFEVar readEnable = io.input("readenable", dfeBool()) & ~vRomLoadEnable; + 1 1 0 0 : DFEVar readMask = io.input("readmask", dfeUInt(inputWidth)); + : + 1 3803 0 0 : DFEVector matrix_in = io.input("values", vtype, readEnable); + 1 1 0 0 : DFEVector index_in = io.input("indptr", ivtype, readEnable); + : + : // big hack around: counting the number of 1s in readmask + : List readmask_bits = new ArrayList(); + : for (int i = 0; i < inputWidth; i++) + : { + 0 529 0 0 : readmask_bits.add(readMask[i].cast(dfeBool()).cast(dfeUInt(6))); // 2^6 = 64 > 48 = inputWidth + : } + 144 145 0 0 : DFEVar numEntriesToRead = Reductions.reduce(readmask_bits); + : + : // we don't care which PE receives each entry (assume matrices are + : // numerically nice enough to change the order of accumulation) + : boolean alignOutput = false; + : int matrixTypeWidth = 11 + mantissaWidth; + : FetchSubTuple matrixBuffer = new FetchSubTuple(this, "matrix", inputWidth, + : matrixTypeWidth, dfeFloat(11, mantissaWidth), + : alignOutput); + : FetchSubTuple indexBuffer = new FetchSubTuple(this, "index", inputWidth, + : indexWidth, dfeUInt(indexWidth), alignOutput); + : + 25403 25051 0 0 : DFEVector matrixValues = matrixBuffer.popPush(numEntriesToRead, readEnable, matrix_in); + 4753 4228 0 0 : DFEVector colptr = indexBuffer.popPush(numEntriesToRead, readEnable, index_in); + : + : //dataRequestEnableLoop <== matrixBuffer.nextPushEnable(); + : + : DFEVector vectorValues = resolveVectorReads(colptr); + : + : io.output("loadEnabled_out", vRomLoadEnable, dfeBool()); + 0 5 0 0 : io.output("matrixValues", matrixValues, vtype, ~vRomLoadEnable); + 1 2 0 0 : io.output("vectorValues", vectorValues, vtype, ~vRomLoadEnable); + : } + : + : DFEVector resolveVectorReads(DFEVector reads) { + : DFEVector out = vtype.newInstance(this); + : for (int i = 0; i < vroms.size(); i++) + : out[i] <== vroms.get(i).read(reads[i].cast(addressT)); + : return out; + : } + : + : } + : + : + : + : + : // XXX for now we assume the matrix is smaller then max rows + : // will have to implement an lmem design above this threshold + : // using lmem wrapped above this thresholed may be feasilbe, + : // see the DramAccumulator snippet in dfe-snippets + : class SpmvReductionKernel extends Kernel { + : + : protected SpmvReductionKernel(KernelParameters parameters, int fpl, int maxRows) { + : super(parameters); + : + 1 1 0 0 : DFEVar in = io.input("reductionIn", dfeFloat(11, 53)); + : DFEVar n = io.scalarInput("nRows", dfeUInt(32)); + : DFEVar totalCycles = io.scalarInput("totalCycles", dfeUInt(32)); + : + 69 120 0 0 : DFEVar cycles = control.count.simpleCounter(32); + : + : DFEVar sumCarried = dfeFloat(11, 53).newInstance(this); + 1116 1572 2 0 : DFEVar sum = in + (cycles < n ? 0 : sumCarried); + 44 48 128 0 : sumCarried <== stream.offset(sum, -(n.cast(dfeInt(32))), -maxRows, -(fpl + 2)); + : + : // output on the last n cycles + 55 33 0 0 : DFEVar outputEnable = totalCycles - cycles <= n; + 1 14 0 0 : io.output("reductionOut", sum, dfeFloat(11, 53), outputEnable); + : } + : } + : + : + : class PaddingKernel extends Kernel { + : protected PaddingKernel(KernelParameters parameters) { + : super(parameters); + : DFEVar nInputs = io.scalarInput("nInputs", dfeUInt(32)); + 69 107 0 0 : DFEVar cycles = control.count.simpleCounter(32); + 20 1 0 0 : DFEVar paddingCycles = cycles >= nInputs; + 1 1 0 0 : DFEVar input = io.input("paddingIn", dfeFloat(11, 53), ~paddingCycles); + 0 69 0 0 : DFEVar out = paddingCycles ? 0 : input; + : io.output("paddingOut", out, dfeFloat(11, 53)); + : } + : } diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj new file mode 100644 index 0000000..419d9c1 --- /dev/null +++ b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj @@ -0,0 +1,153 @@ + LUTs FFs BRAMs DSPs : SpmvManager.maxj + 105961 134189 614 192 : resources used by this file + 20.19% 12.78% 23.92% 9.78% : % of available + 59.46% 52.27% 47.30% 100.00% : % of total used + 99.59% 94.33% 99.68% 100.00% : % of user resources + + : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.CPUTypes; + : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.EngineInterface; + : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.InterfaceParam; + : import com.maxeler.maxcompiler.v2.managers.custom.CustomManager; + : import com.maxeler.maxcompiler.v2.managers.custom.blocks.KernelBlock; + : import com.maxeler.maxcompiler.v2.build.EngineParameters; + : import com.maxeler.maxcompiler.v2.managers.custom.blocks.StateMachineBlock; + : import com.maxeler.maxcompiler.v2.statemachine.manager.ManagerStateMachine; + : import com.maxeler.maxcompiler.v2.managers.custom.stdlib.MemoryControlGroup; + : + : import com.custom_computing_ic.dfe_snippets.sparse.*; + : import com.custom_computing_ic.dfe_snippets.manager.*; + : + : public class SpmvManager extends CustomManager{ + : private static final String s_kernelName = "SpmvKernel"; + : private static final String s_reductionKernel = "SpmvReductionKernel"; + : private static final String s_paddingKernel = "SpmvPaddingKernel"; + : private static final String s_cacheKernel = "SpmvCacheKernel"; + : + : private static final int cacheSize = 1024 * 2; + : private static final int inputWidth = 48; + : private static final int MAX_ROWS = 30000; + : + : // parameters of CSR format used: float64 values, int32 index. + : private static final int mantissaWidth = 53; + : private static final int indexWidth = 32; + : + : private static final int FLOATING_POINT_LATENCY = 16; + : + : private static final boolean DBG_CSR_DECODER = false; + : private static final boolean DBG_PAR_CSR_CTL = false; + : private static final boolean DBG_SPMV_KERNEL = false; + : + : SpmvManager(EngineParameters ep) { + : super(ep); + : addMaxFileConstant("inputWidth", inputWidth); + : addMaxFileConstant("cacheSize", cacheSize); + : addMaxFileConstant("maxRows", MAX_ROWS); + : + : ManagerUtils.setDRAMMaxDeviceFrequency(this, ep); + : + : ManagerStateMachine csrDecoder = new CsrDecoder(this, DBG_CSR_DECODER); + : StateMachineBlock csrDecoderBlock = addStateMachine("csrDecoder", csrDecoder); + : csrDecoderBlock.getInput("colptr") <== addStreamFromCPU("colptr"); + : + : ManagerStateMachine readControl = new ParallelCsrReadControl(this, inputWidth, DBG_PAR_CSR_CTL); + : StateMachineBlock readControlBlock = addStateMachine("readControl", readControl); + : readControlBlock.getInput("length") <== csrDecoderBlock.getOutput("rowLength_out"); + : + 227 370 0 0 : KernelBlock cache = addKernel(new SpmvCacheFSTKernel( + : makeKernelParameters(s_cacheKernel), + : inputWidth, + : cacheSize, + : indexWidth, + 30403 33913 336 0 : mantissaWidth + : )); + : + 226 374 0 0 : KernelBlock k = addKernel(new SpmvKernel( + : makeKernelParameters(s_kernelName), + : inputWidth, + : cacheSize, + : indexWidth, + : mantissaWidth, + 73276 96847 148 192 : DBG_SPMV_KERNEL + : )); + : + : addStreamToOnCardMemory("cpu2lmem", MemoryControlGroup.MemoryAccessPattern.LINEAR_1D) <== addStreamFromCPU("fromcpu"); + : + : + : + : ManagerUtils.addLinearStreamFromLmemToKernel(this, cache, "indptr"); + : ManagerUtils.addLinearStreamFromLmemToKernel(this, cache, "values"); + : + : cache.getInput("vromLoad") <== addStreamFromCPU("vromLoad"); + : + : cache.getInput("readenable") <== readControlBlock.getOutput("readenable"); + : cache.getInput("readmask") <== readControlBlock.getOutput("readmask"); + : cache.getInput("loadEnabled_in") <== readControlBlock.getOutput("vectorLoad"); + : + : k.getInput("loadEnabled") <== cache.getOutput("loadEnabled_out"); + : k.getInput("vectorValues") <== cache.getOutput("vectorValues"); + : k.getInput("matrixValues") <== cache.getOutput("matrixValues"); + : + : k.getInput("rowLength") <== readControlBlock.getOutput("rowLength"); + : k.getInput("rowFinished") <== readControlBlock.getOutput("rowFinished"); + : k.getInput("cycleCounter") <== readControlBlock.getOutput("cycleCounter"); + : k.getInput("firstReadPosition") <== readControlBlock.getOutput("firstReadPosition"); + : + 227 358 0 0 : KernelBlock r = addKernel(new SpmvReductionKernel( + : makeKernelParameters(s_reductionKernel), + : FLOATING_POINT_LATENCY, + 1286 1788 130 0 : MAX_ROWS)); + : r.getInput("reductionIn") <== k.getOutput("output"); + : + 226 361 0 0 : KernelBlock p = addKernel(new PaddingKernel( + 90 178 0 0 : makeKernelParameters(s_paddingKernel))); + : + : p.getInput("paddingIn") <== r.getOutput("reductionOut"); + : addStreamToCPU("output") <== p.getOutput("paddingOut"); + : } + : + : private static EngineInterface interfaceDefault() { + : EngineInterface ei = new EngineInterface(); + : + : InterfaceParam n = ei.addParam("nrows", CPUTypes.INT); + : InterfaceParam vectorSize = ei.addParam("vectorSize", CPUTypes.INT); + : InterfaceParam vectorLoadCycles = ei.addParam("vectorLoadCycles", CPUTypes.INT); + : InterfaceParam totalCycles = ei.addParam("totalCycles", CPUTypes.INT); + : InterfaceParam paddingCycles = ei.addParam("paddingCycles", CPUTypes.INT); + : InterfaceParam nPartitions = ei.addParam("nPartitions", CPUTypes.INT); + : + : ei.setTicks(s_kernelName, totalCycles); + : + : ei.setTicks(s_cacheKernel, totalCycles); + : ei.setScalar(s_cacheKernel, "vectorLoadCycles", vectorLoadCycles); + : + : ei.setTicks(s_reductionKernel, (n * nPartitions)); + : ei.setScalar(s_reductionKernel, "nRows", n); + : ei.setScalar(s_reductionKernel, "totalCycles", n * nPartitions); + : + : ei.setTicks(s_paddingKernel, (n + paddingCycles)); + : ei.setScalar(s_paddingKernel, "nInputs", n); + : + : ei.setScalar("csrDecoder", "nrows", n); + : + : ei.setScalar("readControl", "nrows", n); + : ei.setScalar("readControl", "vectorLoadCycles", vectorLoadCycles); + : ei.setScalar("readControl", "nPartitions", nPartitions); + : + : ei.setStream("output", CPUTypes.DOUBLE, (n + paddingCycles) * CPUTypes.DOUBLE.sizeInBytes()); + : ei.setStream("vromLoad", CPUTypes.DOUBLE, vectorSize * CPUTypes.DOUBLE.sizeInBytes()); + : + : ei.ignoreLMem("cpu2lmem"); + : ei.ignoreStream("fromcpu"); + : return ei; + : } + : + : public static void main(String[] args) { + 105961 134189 614 192 : SpmvManager manager = new SpmvManager(new EngineParameters(args)); + : manager.createSLiCinterface(interfaceDefault()); + : // ManagerUtils.debug(manager); + : ManagerUtils.setFullBuild(manager, 2, 2); + : manager.createSLiCinterface(ManagerUtils.interfaceWrite( + : "write", "fromcpu", "cpu2lmem")); + : manager.build(); + : } + : } diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/_build.log b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/_build.log new file mode 100644 index 0000000..30c4b54 --- /dev/null +++ b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/_build.log @@ -0,0 +1,16923 @@ +Thu 14:54: PROGRESS: MaxCompiler version: 2013.2.2 +Thu 14:54: PROGRESS: Build "Spmv" start time: Thu Sep 10 14:54:13 BST 2015 +Thu 14:54: PROGRESS: Main build process running as user pburovsk on host cccad1.doc.ic.ac.uk +Thu 14:54: INFO : Loading build properties from bundled MaxCompiler_build.conf... +Thu 14:54: INFO : No default external build property file has been specified. +Thu 14:54: INFO : (Set environment variable MAXCOMPILER_DEFAULT_CONF_FILE to assign one) +Thu 14:54: INFO : Loading user build properties from: /mnt/ccnas/pburovsk/.MaxCompiler_build_user.conf +Thu 14:54: INFO : No user-specified external build property file has been specified. +Thu 14:54: INFO : (Set environment variable MAXCOMPILER_BUILD_CONF_FILE to assign one) +Thu 14:54: PROGRESS: Build location: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE +Thu 14:54: PROGRESS: Detailed build log available in "_build.log" +Thu 14:54: INFO : Created build manager Spmv (Spmv_MAIA_DFE Thu Sep 10 14:54:13 BST 2015). (14:54:13 10/09/15) +Thu 14:54: INFO : Working in dir: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE +Thu 14:54: INFO : Java class path (2 paths): +Thu 14:54: INFO : /vol/cc/opt/maxeler/maxcompiler-2013.2.2/lib/MaxCompiler.jar +Thu 14:54: INFO : . +Thu 14:54: INFO : Java process started by 'main' method in class 'SpmvManager'. +Thu 14:54: INFO : build.arbitrated_core_cache parameter is blank, not using core-cache +Thu 14:54: INFO : Checking license files in directory: /vol/cc/opt/maxeler/maxcompiler-2013.2.2/licenses +Thu 14:54: INFO : All license signatures valid. +Thu 14:54: INFO : Backing-up source-files (old source files in build directory will be removed first)... +Thu 14:54: INFO : Source directories: ../src +Thu 14:54: INFO : Deleting directory: src +Thu 14:54: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/scratch/quartus_version_test +Thu 14:54: INFO : Running command: quartus_fit | head -n 5 > quartus_version_test +Thu 14:54: INFO : ERROR: ld.so: object '/vol/cc/opt/maxeler/maxcompiler-2013.2.2/lib/maxeleros-sim/lib/libmaxeleros.so' from LD_PRELOAD cannot be preloaded: ignored. +Thu 14:54: INFO : Installed Quartus version: 13.0 +Thu 14:54: INFO : No hash stored for Quartus version v13_0_0 +Thu 14:54: USER : +Thu 14:54: USER : ENGINE BUILD PARAMETERS +Thu 14:54: USER : Build name: Spmv_MAIA_DFE +Thu 14:54: USER : DFEModel: MAIA +Thu 14:54: USER : maxFileName: Spmv +Thu 14:54: USER : target: DFE +Thu 14:54: USER : enableMPCX: true +Thu 14:54: PROGRESS: Instantiating kernel "SpmvCacheKernel" +Thu 14:54: PROGRESS: Instantiating kernel "SpmvKernel" +Thu 14:54: PROGRESS: Instantiating kernel "SpmvReductionKernel" +Thu 14:54: PROGRESS: Instantiating kernel "SpmvPaddingKernel" +Thu 14:54: INFO : Manager Configuration: +Thu 14:54: INFO : ManagerConfiguration.allowNonMultipleTransitions = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.board = MAX4848A [Init: null, init: MAX4848A] +Thu 14:54: INFO : ManagerConfiguration.build.buildEffort = HIGH [Init: MEDIUM, change: HIGH] +Thu 14:54: INFO : ManagerConfiguration.build.enableChipScopeInserter = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.build.enableTimingAnalysis = true [Init: true] +Thu 14:54: INFO : ManagerConfiguration.build.level = FULL_BUILD [Init: FULL_BUILD] +Thu 14:54: INFO : ManagerConfiguration.build.mpprContinueAfterMeetingTiming = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.build.mpprCtMax = 2 [Init: 1, change: 2] +Thu 14:54: INFO : ManagerConfiguration.build.mpprCtMin = 1 [Init: 1] +Thu 14:54: INFO : ManagerConfiguration.build.mpprParallelism = 2 [Init: 1, change: 2] +Thu 14:54: INFO : ManagerConfiguration.build.mpprRetryMissesThrshld = 0 [Init: 0] +Thu 14:54: INFO : ManagerConfiguration.build.optGoal = AREA [Init: AREA] +Thu 14:54: INFO : ManagerConfiguration.build.physSynthAsyncPipelining = AUTO [Init: AUTO] +Thu 14:54: INFO : ManagerConfiguration.build.physSynthCombLogic = AUTO [Init: AUTO] +Thu 14:54: INFO : ManagerConfiguration.build.physSynthCombLogicForArea = AUTO [Init: AUTO] +Thu 14:54: INFO : ManagerConfiguration.build.physSynthEffort = AUTO [Init: AUTO] +Thu 14:54: INFO : ManagerConfiguration.build.physSynthRegDuplication = AUTO [Init: AUTO] +Thu 14:54: INFO : ManagerConfiguration.build.physSynthRetiming = AUTO [Init: AUTO] +Thu 14:54: INFO : ManagerConfiguration.build.physicalSynthesis = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.buildTarget = DFE [Init: null, init: DFE] +Thu 14:54: INFO : ManagerConfiguration.debug.chipscopeCaptureDepth = 4096 [Init: 4096] +Thu 14:54: INFO : ManagerConfiguration.debug.fifoUnderOverFlowRegs = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.debug.memCtlDebugRegs = true [Init: true] +Thu 14:54: INFO : ManagerConfiguration.debug.memCtlExtraDebugRegs = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.debug.memMarginingSupport = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.debug.memPhyDebugRegister = NONE [Init: NONE] +Thu 14:54: INFO : ManagerConfiguration.debug.memPllLockDebugRegs = true [Init: true] +Thu 14:54: INFO : ManagerConfiguration.debug.streamStatus = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.debug.streamStatusChecksums = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.addressGeneratorsInSlowClock = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.arbitrationMode = ROUND_ROBIN [Init: ROUND_ROBIN] +Thu 14:54: INFO : ManagerConfiguration.dram.burstSize = 8 [Init: 8] +Thu 14:54: INFO : ManagerConfiguration.dram.cmdFifoInReg = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.cmdFifoLutRam = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.cmdFifoRegInRam = true [Init: true] +Thu 14:54: INFO : ManagerConfiguration.dram.cmdFifoSize = 31 [Init: 31] +Thu 14:54: INFO : ManagerConfiguration.dram.dataFifoDepth = 512 [Init: 512] +Thu 14:54: INFO : ManagerConfiguration.dram.dataFifoLutRam = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.dataFifoWidth = 792 [Init: 792] +Thu 14:54: INFO : ManagerConfiguration.dram.eccMode = true [Init: false, change: true] +Thu 14:54: INFO : ManagerConfiguration.dram.fabricDataFifoReg = true [Init: true] +Thu 14:54: INFO : ManagerConfiguration.dram.fabricRdDataFifoReg = true [Init: false, change: true] +Thu 14:54: INFO : ManagerConfiguration.dram.flagSupport = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.highPrioStream = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.max2CompatMode = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.max4m_MAIA_MCP_UseRefClk = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.max4qrateMode = true [Init: false, change: true] +Thu 14:54: INFO : ManagerConfiguration.dram.memCmdIncSize = 8 [Init: 8] +Thu 14:54: INFO : ManagerConfiguration.dram.memCmdStartAddrSize = 32 [Init: 32] +Thu 14:54: INFO : ManagerConfiguration.dram.onCardMemFreq = 800.0 [Init: 0.0, change: 400.0, change: 800.0] +Thu 14:54: INFO : ManagerConfiguration.dram.parEccDebugStream = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.parityEccWidth = 72 [Init: 0, change: 72] +Thu 14:54: INFO : ManagerConfiguration.dram.parityMode = true [Init: false, change: true] +Thu 14:54: INFO : ManagerConfiguration.dram.perdqsPhaseDetect = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.dram.performanceMode = true [Init: true] +Thu 14:54: INFO : ManagerConfiguration.enableMPCX = true [Init: false, init: true] +Thu 14:54: INFO : ManagerConfiguration.maxring.maxringConnections = [] [Init: []] +Thu 14:54: INFO : ManagerConfiguration.maxring.maxringNumLanes = {} [Init: {}] +Thu 14:54: INFO : ManagerConfiguration.multiCycleMappedMemoryBus = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.pcie.numPCIeLanes = 8 [Init: 0, change: 8] +Thu 14:54: INFO : ManagerConfiguration.pcie.pcieFastClock = true [Init: false, change: true] +Thu 14:54: INFO : ManagerConfiguration.pcie.streamFromHostMaxNum = 0 [Init: 0] +Thu 14:54: INFO : ManagerConfiguration.pcie.streamToHostMaxNum = 0 [Init: 0] +Thu 14:54: INFO : ManagerConfiguration.persona.boardModel = MAX4848A [Init: null, change: MAX4848A] +Thu 14:54: INFO : ManagerConfiguration.persona.ddr3Frq = 800.0 [Init: 400.0, change: 800.0] +Thu 14:54: INFO : ManagerConfiguration.persona.ddr3Qmode = true [Init: false, change: true] +Thu 14:54: INFO : ManagerConfiguration.persona.disableMultiplePersona = true [Init: false, change: true] +Thu 14:54: INFO : ManagerConfiguration.persona.dynamic_scaling = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.persona.fastBuild = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.persona.maxRingLocal = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.persona.maxRingOptical = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.persona.maxringDataRate = 2500 [Init: 2500] +Thu 14:54: INFO : ManagerConfiguration.persona.mode = InitMode [Init: Off, change: InitMode] +Thu 14:54: INFO : ManagerConfiguration.persona.panMaxRingA = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.persona.panMaxRingB = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.persona.personaInterfaceVersion = 1 [Init: 1] +Thu 14:54: INFO : ManagerConfiguration.persona.streamClks = 1 [Init: 1] +Thu 14:54: INFO : ManagerConfiguration.persona.streamFrq = [100.0] [Init: [150.0], change: [100.0]] +Thu 14:54: INFO : ManagerConfiguration.persona.streamPs = [0] [Init: [0]] +Thu 14:54: INFO : ManagerConfiguration.persona.usePCIeGen1 = true [Init: true] +Thu 14:54: INFO : ManagerConfiguration.simulation.nativeFloatingPoint = false [Init: false] +Thu 14:54: INFO : ManagerConfiguration.streamClockFrq = 100 [Init: 100] +Thu 14:54: INFO : +Thu 14:54: INFO : -- +Thu 14:54: INFO : Running manager compiler graph-pass: GenerateMXGInfo +Thu 14:54: INFO : Running manager compiler graph-pass: CalculateBandwidthForward +Thu 14:54: INFO : Running manager compiler graph-pass: CalculateBandwidthBackward +Thu 14:54: INFO : Running manager compiler graph-pass: ScheduleStallLatency +Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment +Thu 14:54: INFO : Running manager compiler graph-pass: InsertDualAspectLogic +Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment +Thu 14:54: INFO : Running manager compiler graph-pass: InsertPullPushAdapter +Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment +Thu 14:54: INFO : Running manager compiler graph-pass: InsertStreamFifos +Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment +Thu 14:54: INFO : Running manager compiler graph-pass: InsertStreamStatus +Thu 14:54: INFO : Running manager compiler graph-pass: InsertChipscope +Thu 14:54: INFO : Inserted 0 chipscope manager nodes. +Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment +Thu 14:54: PROGRESS: +Thu 14:54: PROGRESS: Compiling kernel "SpmvCacheKernel" +Thu 14:54: INFO : Configuration: +Thu 14:54: INFO : KernelConfiguration.allowDSPCascading = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.allowInputsOutputsBeforeFlushNode = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.allowZeroLatencyNodeHold = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.board = MAX4848A [Init: MAX2116B, change: MAX4848A] +Thu 14:54: INFO : KernelConfiguration.bramBitsThreshold = 2080 [Init: 2080] +Thu 14:54: INFO : KernelConfiguration.buildTarget = HARDWARE [Init: NONE, change: HARDWARE] +Thu 14:54: INFO : KernelConfiguration.cePipelining = 2 [Init: 2] +Thu 14:54: INFO : KernelConfiguration.clockPhaseBalanceThreshold = 0.1 [Init: 0.1] +Thu 14:54: INFO : KernelConfiguration.clockPhasingRetries = 50 [Init: 50] +Thu 14:54: INFO : KernelConfiguration.dumpNeighboursString = [Init: ] +Thu 14:54: INFO : KernelConfiguration.enableCeReplication = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.enableClockPhasePartitioning = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.enableDebugIOControlRegs = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.enableDummyBuild = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.enableKernelProfiler = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.enablePipelinedComputeController = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.enableShadowRegister = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.fifoSrlRegisterStages = 1 [Init: 1] +Thu 14:54: INFO : KernelConfiguration.flushOnInputDataCongtiguous = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.hardwareDebugDepth = 512 [Init: 512] +Thu 14:54: INFO : KernelConfiguration.hwHierarchyMode = UNSET [Init: UNSET] +Thu 14:54: INFO : KernelConfiguration.latencyAnnotation = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.latencyAnnotationIOs = [Init: null] +Thu 14:54: INFO : KernelConfiguration.maxCoalescedFifoWidth = 2147483647 [Init: 2147483647] +Thu 14:54: INFO : KernelConfiguration.maxPreAdderFanOut = 1 [Init: 1] +Thu 14:54: INFO : KernelConfiguration.netlistMode = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.numPhotonStateMachines = 1 [Init: 1] +Thu 14:54: INFO : KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1 [Init: 1] +Thu 14:54: INFO : KernelConfiguration.optimizations.conditionalArithmetic = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.optimizations.counterChainWrapPipelining = 0 [Init: 0] +Thu 14:54: INFO : KernelConfiguration.optimizations.dspAddChain = OPTIMISE [Init: null, Init after BuildTarget change: OPTIMISE] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableActiveFanoutReduction = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableBUFGCE = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableBetterInputRegistering = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableBetterRegistering = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableFifoCoalescing = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableFullPrecisionBinaryOpConstants = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableIntegratedRounding = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableMultiCycleReset = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.optimizations.enablePowerTwoFloatMult = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.optimizations.inputFlushDistanceFactor = 0 [Init: 0] +Thu 14:54: INFO : KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1 [Init: 1] +Thu 14:54: INFO : KernelConfiguration.optimizations.optimizationTechnique = DEFAULT [Init: DEFAULT] +Thu 14:54: INFO : KernelConfiguration.optimizations.triAdd = true [Init: true] +Thu 14:54: INFO : KernelConfiguration.partialReconfBlockName = [Init: ] +Thu 14:54: INFO : KernelConfiguration.partialReconfMode = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.partialReconfTemplate = false [Init: false] +Thu 14:54: INFO : KernelConfiguration.replicateNodeCeLog2NumPartitions = 0 [Init: 0] +Thu 14:54: INFO : KernelConfiguration.romBRAMBitsThreshold = 2080 [Init: 2080] +Thu 14:54: INFO : KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION [Init: EXCEPTION] +Thu 14:54: INFO : KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION [Init: EXCEPTION] +Thu 14:54: INFO : KernelConfiguration.simulation.simProgressMessageFrequency = 0 [Init: 0] +Thu 14:54: INFO : +Thu 14:54: INFO : -- +Thu 14:54: WARNING : Warning (UNCONNECTED_DESIGN_ELEMENT): +Thu 14:54: WARNING : Unconnected elements in design 'SpmvCacheKernel' +Thu 14:54: WARNING : details in : /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_graph_warnings.txt +Thu 14:54: INFO : Writing current graph to: Spmv_SpmvCacheKernel_original.pxg +Thu 14:54: INFO : Running kernel graph-pass 'GeneratePXG'. +Thu 14:54: INFO : Graph-pass 'GeneratePXG' took 4.85201 s (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:54: INFO : Graph-pass 'MarkConstantPass' took 46.4142 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'ReachabilityPass'. +Thu 14:54: INFO : Graph-pass 'ReachabilityPass' took 451.574 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'FindInputsLeadingToFlush'. +Thu 14:54: INFO : Graph-pass 'FindInputsLeadingToFlush' took 2.80781 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'CheckForStatefulToFlushViolations'. +Thu 14:54: INFO : Graph-pass 'CheckForStatefulToFlushViolations' took 3.37235 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. +Thu 14:54: INFO : Graph-pass 'CheckForInputToFlushViolations' took 13.5077 ms (1 iterations) +Thu 14:54: INFO : Not deleting directory (does not exist): neighbours +Thu 14:54: INFO : Running Photon pre-schedule graph optimisations +Thu 14:54: INFO : Running kernel graph-pass 'AlignOrEradicatePrintfs'. +Thu 14:54: INFO : Graph-pass 'AlignOrEradicatePrintfs' took 10.3464 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'FoldConstantsPass'. +Thu 14:54: INFO : Graph-pass 'FoldConstantsPass' took 776.888 ms (2 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'OptimiseNodesPass'. +Thu 14:54: INFO : Graph-pass 'OptimiseNodesPass' took 733.297 ms (2 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'DeleteRedundantNodes'. +Thu 14:54: INFO : Graph-pass 'DeleteRedundantNodes' took 5.10112 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'AlteraDSPExtractionGraphPass'. +Thu 14:54: INFO : Optimized 0 sub-graphs into DSP multiply/add chains +Thu 14:54: INFO : Graph-pass 'AlteraDSPExtractionGraphPass' took 89.9622 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'TriAddExtractionPass'. +Thu 14:54: INFO : optimised graph of 47 adds into 23 tri-adds and 1 bi-add (folded 0 constants) +Thu 14:54: INFO : Graph-pass 'TriAddExtractionPass' took 727.027 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'ConditionalAddExtractionPass'. +Thu 14:54: INFO : Optimized 0 sub-graphs into conditional adds/subs/triadds. +Thu 14:54: INFO : Graph-pass 'ConditionalAddExtractionPass' took 11.8250 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'PO2FPMultOptimiser'. +Thu 14:54: INFO : Graph-pass 'PO2FPMultOptimiser' took 3.53062 ms (1 iterations) +Thu 14:54: INFO : Logging Photon stats to: SpmvCacheKernel_photon_stats.csv +Thu 14:54: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:54: INFO : Graph-pass 'StatsPass' took 39.1907 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'CollectNumericExceptions'. +Thu 14:54: INFO : Graph-pass 'CollectNumericExceptions' took 5.22934 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'StreamOffsetDivExpand'. +Thu 14:54: INFO : Graph-pass 'StreamOffsetDivExpand' took 6.61072 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'FindIllegalLoops'. +Thu 14:54: INFO : Graph-pass 'FindIllegalLoops' took 19.1441 s (1 iterations) +Thu 14:54: INFO : Scheduling Photon graph (pass 1) +Thu 14:54: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:54: INFO : Graph-pass 'MarkConstantPass' took 31.5049 ms (1 iterations) +Thu 14:54: INFO : Running kernel graph-pass 'MIPScheduler'. +Thu 14:54: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvCacheKernel_scheduler_1_C.dat" --display "SpmvCacheKernel_scheduler_1_C.out" --log "SpmvCacheKernel_scheduler_1_C.log" +Thu 14:55: INFO : Reading model section from scheduler.mod... +Thu 14:55: INFO : 95 lines were read +Thu 14:55: INFO : Reading data section from SpmvCacheKernel_scheduler_1_C.dat... +Thu 14:55: INFO : 82467 lines were read +Thu 14:55: INFO : Generating schedulingEquation... +Thu 14:55: INFO : Generating bufferingEquation... +Thu 14:55: INFO : Generating afterFlushNode... +Thu 14:55: INFO : Generating forcePairConstraints... +Thu 14:55: INFO : Generating forceAtEnd... +Thu 14:55: INFO : Generating autoVarLatencyUserMin... +Thu 14:55: INFO : Generating autoVarLatencyUserMax... +Thu 14:55: INFO : Generating fifos... +Thu 14:55: INFO : Model has been successfully generated +Thu 14:55: INFO : ipp_basic_tech: 1 row(s) and 5 column(s) removed +Thu 14:55: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced +Thu 14:55: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed +Thu 14:55: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced +Thu 14:55: INFO : lpx_intopt: presolved MIP has 41288 rows, 27407 columns, 103191 non-zeros +Thu 14:55: INFO : lpx_intopt: 27407 integer columns, none of which are binary +Thu 14:55: INFO : lpx_adv_basis: size of triangular part = 41288 +Thu 14:55: INFO : Solving LP relaxation... +Thu 14:55: INFO : 0: objval = 6.326300000e+04 infeas = 1.000000000e+00 (0) +Thu 14:55: INFO : 200: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) +Thu 14:55: INFO : 400: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) +Thu 14:55: INFO : 600: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) +Thu 14:55: INFO : 800: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) +Thu 14:55: INFO : 1000: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) +Thu 14:55: INFO : 1200: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) +Thu 14:55: INFO : 1400: objval = 6.327800000e+04 infeas = 3.480308219e-01 (0) +Thu 14:55: INFO : 1600: objval = 6.327800000e+04 infeas = 3.480308219e-01 (0) +Thu 14:55: INFO : 1800: objval = 6.947200000e+04 infeas = 3.095034247e-01 (0) +Thu 14:55: INFO : 2000: objval = 6.947200000e+04 infeas = 2.649828767e-01 (0) +Thu 14:55: INFO : 2200: objval = 6.950900000e+04 infeas = 2.324486301e-01 (0) +Thu 14:55: INFO : 2400: objval = 6.956500000e+04 infeas = 3.809931507e-02 (0) +Thu 14:55: INFO : 2600: objval = 7.001100000e+04 infeas = 1.241438356e-02 (0) +Thu 14:55: INFO : 2800: objval = 7.001100000e+04 infeas = 1.070205479e-02 (0) +Thu 14:55: INFO : 2997: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 2997: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 3000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 3200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 3400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 3600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 3800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 4000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 4200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 4400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 4600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 4800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 5000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 5200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 5400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 5600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 5800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 6000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 6200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 6400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 6600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 6800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 7000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 7200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 7400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 7600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 7800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 8000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 8200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 8400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 8600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 8800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 9000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 9200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 9400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 9600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 9800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 10000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 10200: objval = 6.406400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 10400: objval = 6.361600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 10600: objval = 6.316800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 10800: objval = 6.272000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 11000: objval = 6.227200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 11200: objval = 6.188800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 11400: objval = 6.188800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 11600: objval = 6.099200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 11800: objval = 6.009600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 12000: objval = 5.964800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 12200: objval = 5.875200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 12400: objval = 5.830400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 12600: objval = 5.740500000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 12800: objval = 5.561200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 13000: objval = 5.471600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 13200: objval = 5.343600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 13400: objval = 5.249600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 13600: objval = 5.160000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 13800: objval = 5.003100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 14000: objval = 4.980600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 14200: objval = 4.896700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 14400: objval = 4.877400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 14600: objval = 4.877400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 14800: objval = 4.871000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 15000: objval = 4.871000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 15200: objval = 4.832700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 15400: objval = 4.813400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 15600: objval = 4.794100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 15800: objval = 4.774800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 16000: objval = 4.627600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 16200: objval = 4.627600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 16400: objval = 4.608300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 16600: objval = 4.608300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 16800: objval = 4.589000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 17000: objval = 4.566800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 17200: objval = 4.520100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 17400: objval = 4.500800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 17600: objval = 4.478600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 17800: objval = 4.456200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 18000: objval = 4.456200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 18200: objval = 4.344300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 18400: objval = 4.299300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 18600: objval = 4.254300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 18800: objval = 4.100100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 19000: objval = 4.100100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 19200: objval = 4.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 19400: objval = 4.036400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 19600: objval = 4.014200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 19800: objval = 3.992000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 20000: objval = 3.944000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 20200: objval = 3.923800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 20400: objval = 3.901300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 20600: objval = 3.859300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 20800: objval = 3.849700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 21000: objval = 3.849700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 21200: objval = 3.820000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 21400: objval = 3.810800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 21600: objval = 3.796400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 21800: objval = 3.794900000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 22000: objval = 3.794900000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 22200: objval = 3.780500000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 22400: objval = 3.779600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 22600: objval = 3.775400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 22800: objval = 3.770300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 23000: objval = 3.770000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : * 23058: objval = 3.770000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:55: INFO : OPTIMAL SOLUTION FOUND +Thu 14:55: INFO : Integer optimization begins... +Thu 14:55: INFO : + 23058: mip = not found yet >= -inf (1; 0) +Thu 14:55: INFO : + 23058: >>>>> 3.770000000e+04 >= 3.770000000e+04 0.0% (1; 0) +Thu 14:55: INFO : + 23058: mip = 3.770000000e+04 >= tree is empty 0.0% (0; 1) +Thu 14:55: INFO : INTEGER OPTIMAL SOLUTION FOUND +Thu 14:55: INFO : Time used: 50.8 secs +Thu 14:55: INFO : Memory used: 105.0 Mb (110140526 bytes) +Thu 14:55: INFO : Model has been successfully processed +Thu 14:55: INFO : Graph-pass 'MIPScheduler' took 52.8761 s (1 iterations) +Thu 14:55: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. +Thu 14:55: INFO : Graph-pass 'SubstituteEqPlaceholders' took 3.54410 ms (1 iterations) +Thu 14:55: INFO : Running kernel graph-pass 'ScheduleApplier'. +Thu 14:55: INFO : Graph-pass 'ScheduleApplier' took 73.2155 ms (1 iterations) +Thu 14:55: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:55: INFO : Graph-pass 'StatsPass' took 17.4868 ms (1 iterations) +Thu 14:55: INFO : Running kernel graph-pass 'ReachabilityPass'. +Thu 14:55: INFO : Graph-pass 'ReachabilityPass' took 313.504 ms (1 iterations) +Thu 14:55: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. +Thu 14:55: INFO : Graph-pass 'CheckForInputToFlushViolations' took 5.74101 ms (1 iterations) +Thu 14:55: INFO : Running Photon post-schedule graph optimisations (pass 1) +Thu 14:55: INFO : Running kernel graph-pass 'TapFIFOsPass'. +Thu 14:55: INFO : Graph-pass 'TapFIFOsPass' took 49.9582 ms (1 iterations) +Thu 14:55: INFO : Running kernel graph-pass 'FoldFIFOsPass'. +Thu 14:55: INFO : Graph-pass 'FoldFIFOsPass' took 6.46305 ms (1 iterations) +Thu 14:55: INFO : Running kernel graph-pass 'ValidateFIFOs'. +Thu 14:55: INFO : Graph-pass 'ValidateFIFOs' took 3.40887 ms (1 iterations) +Thu 14:55: INFO : Scheduling Photon graph (pass 2) +Thu 14:55: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:55: INFO : Graph-pass 'MarkConstantPass' took 5.09174 ms (1 iterations) +Thu 14:55: INFO : Running kernel graph-pass 'MIPScheduler'. +Thu 14:55: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvCacheKernel_scheduler_2_C.dat" --display "SpmvCacheKernel_scheduler_2_C.out" --log "SpmvCacheKernel_scheduler_2_C.log" +Thu 14:56: INFO : Reading model section from scheduler.mod... +Thu 14:56: INFO : 95 lines were read +Thu 14:56: INFO : Reading data section from SpmvCacheKernel_scheduler_2_C.dat... +Thu 14:56: INFO : 82467 lines were read +Thu 14:56: INFO : Generating schedulingEquation... +Thu 14:56: INFO : Generating bufferingEquation... +Thu 14:56: INFO : Generating afterFlushNode... +Thu 14:56: INFO : Generating forcePairConstraints... +Thu 14:56: INFO : Generating forceAtEnd... +Thu 14:56: INFO : Generating autoVarLatencyUserMin... +Thu 14:56: INFO : Generating autoVarLatencyUserMax... +Thu 14:56: INFO : Generating fifos... +Thu 14:56: INFO : Model has been successfully generated +Thu 14:56: INFO : ipp_basic_tech: 1 row(s) and 5 column(s) removed +Thu 14:56: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced +Thu 14:56: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed +Thu 14:56: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced +Thu 14:56: INFO : lpx_intopt: presolved MIP has 41288 rows, 27407 columns, 103191 non-zeros +Thu 14:56: INFO : lpx_intopt: 27407 integer columns, none of which are binary +Thu 14:56: INFO : lpx_adv_basis: size of triangular part = 41288 +Thu 14:56: INFO : Solving LP relaxation... +Thu 14:56: INFO : 0: objval = 6.326300000e+04 infeas = 1.000000000e+00 (0) +Thu 14:56: INFO : 200: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) +Thu 14:56: INFO : 400: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) +Thu 14:56: INFO : 600: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) +Thu 14:56: INFO : 800: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) +Thu 14:56: INFO : 1000: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) +Thu 14:56: INFO : 1200: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) +Thu 14:56: INFO : 1400: objval = 6.327800000e+04 infeas = 3.480308219e-01 (0) +Thu 14:56: INFO : 1600: objval = 6.327800000e+04 infeas = 3.480308219e-01 (0) +Thu 14:56: INFO : 1800: objval = 6.947200000e+04 infeas = 3.095034247e-01 (0) +Thu 14:56: INFO : 2000: objval = 6.947200000e+04 infeas = 2.649828767e-01 (0) +Thu 14:56: INFO : 2200: objval = 6.950900000e+04 infeas = 2.324486301e-01 (0) +Thu 14:56: INFO : 2400: objval = 6.956500000e+04 infeas = 3.809931507e-02 (0) +Thu 14:56: INFO : 2600: objval = 7.001100000e+04 infeas = 1.241438356e-02 (0) +Thu 14:56: INFO : 2800: objval = 7.001100000e+04 infeas = 1.070205479e-02 (0) +Thu 14:56: INFO : 2997: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 2997: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 3000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 3200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 3400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 3600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 3800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 4000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 4200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 4400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 4600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 4800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 5000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 5200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 5400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 5600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 5800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 6000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 6200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 6400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 6600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 6800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 7000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 7200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 7400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 7600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 7800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 8000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 8200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 8400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 8600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 8800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 9000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 9200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 9400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 9600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 9800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 10000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 10200: objval = 6.406400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 10400: objval = 6.361600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 10600: objval = 6.316800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 10800: objval = 6.272000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 11000: objval = 6.227200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 11200: objval = 6.188800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 11400: objval = 6.188800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 11600: objval = 6.099200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 11800: objval = 6.009600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 12000: objval = 5.964800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 12200: objval = 5.875200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 12400: objval = 5.830400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 12600: objval = 5.740500000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 12800: objval = 5.561200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 13000: objval = 5.471600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 13200: objval = 5.343600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 13400: objval = 5.249600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 13600: objval = 5.160000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 13800: objval = 5.003100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 14000: objval = 4.980600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 14200: objval = 4.896700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 14400: objval = 4.877400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 14600: objval = 4.877400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 14800: objval = 4.871000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 15000: objval = 4.871000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 15200: objval = 4.832700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 15400: objval = 4.813400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 15600: objval = 4.794100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 15800: objval = 4.774800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 16000: objval = 4.627600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 16200: objval = 4.627600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 16400: objval = 4.608300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 16600: objval = 4.608300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 16800: objval = 4.589000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 17000: objval = 4.566800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 17200: objval = 4.520100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 17400: objval = 4.500800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 17600: objval = 4.478600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 17800: objval = 4.456200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 18000: objval = 4.456200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 18200: objval = 4.344300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 18400: objval = 4.299300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 18600: objval = 4.254300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 18800: objval = 4.100100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 19000: objval = 4.100100000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 19200: objval = 4.080800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 19400: objval = 4.036400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 19600: objval = 4.014200000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 19800: objval = 3.992000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 20000: objval = 3.944000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 20200: objval = 3.923800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 20400: objval = 3.901300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 20600: objval = 3.859300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 20800: objval = 3.849700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 21000: objval = 3.849700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 21200: objval = 3.820000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 21400: objval = 3.810800000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 21600: objval = 3.796400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 21800: objval = 3.794900000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 22000: objval = 3.794900000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 22200: objval = 3.780500000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 22400: objval = 3.779600000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 22600: objval = 3.775400000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 22800: objval = 3.770300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 23000: objval = 3.770000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : * 23058: objval = 3.770000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:56: INFO : OPTIMAL SOLUTION FOUND +Thu 14:56: INFO : Integer optimization begins... +Thu 14:56: INFO : + 23058: mip = not found yet >= -inf (1; 0) +Thu 14:56: INFO : + 23058: >>>>> 3.770000000e+04 >= 3.770000000e+04 0.0% (1; 0) +Thu 14:56: INFO : + 23058: mip = 3.770000000e+04 >= tree is empty 0.0% (0; 1) +Thu 14:56: INFO : INTEGER OPTIMAL SOLUTION FOUND +Thu 14:56: INFO : Time used: 50.1 secs +Thu 14:56: INFO : Memory used: 105.0 Mb (110140526 bytes) +Thu 14:56: INFO : Model has been successfully processed +Thu 14:56: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_schedule_report.csv +Thu 14:56: INFO : Graph-pass 'MIPScheduler' took 51.8851 s (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'RemoveDistMeasurementNodes'. +Thu 14:56: INFO : Graph-pass 'RemoveDistMeasurementNodes' took 23.8070 µs (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. +Thu 14:56: INFO : Graph-pass 'SubstituteEqPlaceholders' took 1.31064 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'ScheduleApplier'. +Thu 14:56: INFO : Graph-pass 'ScheduleApplier' took 1.48713 s (1 iterations) +Thu 14:56: INFO : Maximum stream latency for kernel 'SpmvCacheKernel': 40 +Thu 14:56: INFO : Using user logic for flush. +Thu 14:56: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:56: INFO : Graph-pass 'StatsPass' took 48.5060 ms (1 iterations) +Thu 14:56: INFO : Running Photon post-schedule graph optimisations (pass 2) +Thu 14:56: INFO : Running kernel graph-pass 'TapFIFOsPass'. +Thu 14:56: INFO : Graph-pass 'TapFIFOsPass' took 1.71144 s (2 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'FoldFIFOsPass'. +Thu 14:56: INFO : Graph-pass 'FoldFIFOsPass' took 8.46178 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:56: INFO : Graph-pass 'MarkConstantPass' took 6.03112 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'ScheduleAsserter'. +Thu 14:56: INFO : Graph-pass 'ScheduleAsserter' took 53.4247 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'ReplaceEvalStreamOffsetNodes'. +Thu 14:56: INFO : Graph-pass 'ReplaceEvalStreamOffsetNodes' took 3.50027 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'FIFOCoalesceRespectingPlacementPass'. +Thu 14:56: INFO : Graph-pass 'FIFOCoalesceRespectingPlacementPass' took 15.0504 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'FIFOReport'. +Thu 14:56: INFO : Graph-pass 'FIFOReport' took 23.0350 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:56: INFO : Graph-pass 'StatsPass' took 19.3618 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'RemoveUntypedConstants'. +Thu 14:56: INFO : Graph-pass 'RemoveUntypedConstants' took 1.54652 s (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'VariableSizeMappedRegInserter'. +Thu 14:56: INFO : Graph-pass 'VariableSizeMappedRegInserter' took 6.18298 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:56: INFO : Graph-pass 'MarkConstantPass' took 9.73287 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'MakeMaxFileNodeData'. +Thu 14:56: INFO : Graph-pass 'MakeMaxFileNodeData' took 311.756 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'MoveFanoutRegsForwards'. +Thu 14:56: INFO : Graph-pass 'MoveFanoutRegsForwards' took 7.45724 ms (1 iterations) +Thu 14:56: INFO : Optimization report for Kernel 'SpmvCacheKernel'. +Thu 14:56: INFO : Enabled optimizations: +Thu 14:56: INFO : DSP-MultAdd +Thu 14:56: INFO : Tri-Adder +Thu 14:56: INFO : Conditional (Tri)Adds/Subs/AddSubs +Thu 14:56: INFO : Power-of-2 Floating Point +Thu 14:56: INFO : Fifo Coalescing +Thu 14:56: INFO : Creating a preliminary MaxCompilerDesignData.dat. (@ CoreCompile SpmvCacheKernel) +Thu 14:56: INFO : Running kernel graph-pass 'WeightBasedCEPartitioner'. +Thu 14:56: INFO : Partitioning design into 1 CE domain(s) to minimize global signal fanout. +Thu 14:56: INFO : Graph-pass 'WeightBasedCEPartitioner' took 91.2140 µs (1 iterations) +Thu 14:56: INFO : Using maximum counter CE delay chain length 6 +Thu 14:56: INFO : CE Partition 0 Clock Phase 0 : Nodes=17059 (use fill=256, use flush=58) Fill counters=2 (+17 delay regs) Flush counters=1 (+13 delay regs) +Thu 14:56: INFO : Running kernel graph-pass 'FindWriteableMappedMemories'. +Thu 14:56: INFO : Graph-pass 'FindWriteableMappedMemories' took 3.46119 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:56: INFO : Graph-pass 'MarkConstantPass' took 5.80853 ms (1 iterations) +Thu 14:56: INFO : Running kernel graph-pass 'MaxConstantLatency'. +Thu 14:56: INFO : Graph-pass 'MaxConstantLatency' took 7.80843 ms (1 iterations) +Thu 14:56: INFO : Maximum constant latency: 0 +Thu 14:56: INFO : Running kernel graph-pass 'PhotonMaxDCTopEntity'. +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 2 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 2 +Thu 14:56: INFO : Implementing static multi-stage delay of 2 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 2 +Thu 14:56: INFO : Implementing static multi-stage delay of 3 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 3 +Thu 14:56: INFO : Implementing static multi-stage delay of 3 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 3 +Thu 14:56: INFO : Implementing static multi-stage delay of 4 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 4 +Thu 14:56: INFO : Implementing static multi-stage delay of 4 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 4 +Thu 14:56: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 +Thu 14:56: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 +Thu 14:56: INFO : Implementing static multi-stage delay of 6 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 6 +Thu 14:56: INFO : Implementing static multi-stage delay of 6 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 6 +Thu 14:56: INFO : Implementing static multi-stage delay of 7 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 7 +Thu 14:56: INFO : Implementing static multi-stage delay of 7 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 7 +Thu 14:56: INFO : Implementing static multi-stage delay of 8 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 8 +Thu 14:56: INFO : Implementing static multi-stage delay of 8 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 8 +Thu 14:56: INFO : Implementing static multi-stage delay of 9 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 9 +Thu 14:56: INFO : Implementing static multi-stage delay of 9 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 9 +Thu 14:56: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:56: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:56: INFO : Implementing static multi-stage delay of 11 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 11 +Thu 14:56: INFO : Implementing static multi-stage delay of 11 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 11 +Thu 14:56: INFO : Implementing static multi-stage delay of 12 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 12 +Thu 14:56: INFO : Implementing static multi-stage delay of 12 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 12 +Thu 14:56: INFO : Implementing static multi-stage delay of 13 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 13 +Thu 14:56: INFO : Implementing static multi-stage delay of 13 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 13 +Thu 14:56: INFO : Implementing static multi-stage delay of 14 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 14 +Thu 14:56: INFO : Implementing static multi-stage delay of 14 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 14 +Thu 14:56: INFO : Implementing static multi-stage delay of 15 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 15 +Thu 14:56: INFO : Implementing static multi-stage delay of 15 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 15 +Thu 14:56: INFO : Implementing static multi-stage delay of 16 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 16 +Thu 14:56: INFO : Implementing static multi-stage delay of 16 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 16 +Thu 14:56: INFO : Implementing static multi-stage delay of 17 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 17 +Thu 14:56: INFO : Implementing static multi-stage delay of 17 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 17 +Thu 14:56: INFO : Implementing static multi-stage delay of 18 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 18 +Thu 14:56: INFO : Implementing static multi-stage delay of 18 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 18 +Thu 14:56: INFO : Implementing static multi-stage delay of 19 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 19 +Thu 14:56: INFO : Implementing static multi-stage delay of 19 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 19 +Thu 14:56: INFO : Implementing static multi-stage delay of 20 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 20 +Thu 14:56: INFO : Implementing static multi-stage delay of 20 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 20 +Thu 14:56: INFO : Implementing static multi-stage delay of 21 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 21 +Thu 14:56: INFO : Implementing static multi-stage delay of 21 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 21 +Thu 14:56: INFO : Implementing static multi-stage delay of 22 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 22 +Thu 14:56: INFO : Implementing static multi-stage delay of 22 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 22 +Thu 14:56: INFO : Implementing static multi-stage delay of 23 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 23 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (6 bits wide), cost 0 RAMB18-equivalents, and 6 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Graph-pass 'PhotonMaxDCTopEntity' took 29.0750 s (1 iterations) +Thu 14:57: INFO : Writing current graph to: Spmv_SpmvCacheKernel_final-hardware.pxg +Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. +Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 4.37400 s (1 iterations) +Thu 14:57: PROGRESS: +Thu 14:57: PROGRESS: Compiling kernel "SpmvKernel" +Thu 14:57: INFO : Configuration: +Thu 14:57: INFO : KernelConfiguration.allowDSPCascading = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.allowInputsOutputsBeforeFlushNode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.allowZeroLatencyNodeHold = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.board = MAX4848A [Init: MAX2116B, change: MAX4848A] +Thu 14:57: INFO : KernelConfiguration.bramBitsThreshold = 2080 [Init: 2080] +Thu 14:57: INFO : KernelConfiguration.buildTarget = HARDWARE [Init: NONE, change: HARDWARE] +Thu 14:57: INFO : KernelConfiguration.cePipelining = 2 [Init: 2] +Thu 14:57: INFO : KernelConfiguration.clockPhaseBalanceThreshold = 0.1 [Init: 0.1] +Thu 14:57: INFO : KernelConfiguration.clockPhasingRetries = 50 [Init: 50] +Thu 14:57: INFO : KernelConfiguration.dumpNeighboursString = [Init: ] +Thu 14:57: INFO : KernelConfiguration.enableCeReplication = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.enableClockPhasePartitioning = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableDebugIOControlRegs = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.enableDummyBuild = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableKernelProfiler = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enablePipelinedComputeController = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableShadowRegister = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.fifoSrlRegisterStages = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.flushOnInputDataCongtiguous = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.hardwareDebugDepth = 512 [Init: 512] +Thu 14:57: INFO : KernelConfiguration.hwHierarchyMode = UNSET [Init: UNSET] +Thu 14:57: INFO : KernelConfiguration.latencyAnnotation = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.latencyAnnotationIOs = [Init: null] +Thu 14:57: INFO : KernelConfiguration.maxCoalescedFifoWidth = 2147483647 [Init: 2147483647] +Thu 14:57: INFO : KernelConfiguration.maxPreAdderFanOut = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.netlistMode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.numPhotonStateMachines = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.conditionalArithmetic = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.counterChainWrapPipelining = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.optimizations.dspAddChain = OPTIMISE [Init: null, Init after BuildTarget change: OPTIMISE] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableActiveFanoutReduction = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBUFGCE = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterInputRegistering = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterRegistering = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFifoCoalescing = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFullPrecisionBinaryOpConstants = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableIntegratedRounding = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableMultiCycleReset = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enablePowerTwoFloatMult = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.inputFlushDistanceFactor = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.optimizationTechnique = DEFAULT [Init: DEFAULT] +Thu 14:57: INFO : KernelConfiguration.optimizations.triAdd = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.partialReconfBlockName = [Init: ] +Thu 14:57: INFO : KernelConfiguration.partialReconfMode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.partialReconfTemplate = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.replicateNodeCeLog2NumPartitions = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.romBRAMBitsThreshold = 2080 [Init: 2080] +Thu 14:57: INFO : KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION [Init: EXCEPTION] +Thu 14:57: INFO : KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION [Init: EXCEPTION] +Thu 14:57: INFO : KernelConfiguration.simulation.simProgressMessageFrequency = 0 [Init: 0] +Thu 14:57: INFO : +Thu 14:57: INFO : -- +Thu 14:57: WARNING : Warning (UNCONNECTED_DESIGN_ELEMENT): +Thu 14:57: WARNING : Unconnected elements in design 'SpmvKernel' +Thu 14:57: WARNING : details in : /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_graph_warnings.txt +Thu 14:57: INFO : Writing current graph to: Spmv_SpmvKernel_original.pxg +Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. +Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 160.743 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 190.003 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. +Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 860.268 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FindInputsLeadingToFlush'. +Thu 14:57: INFO : Graph-pass 'FindInputsLeadingToFlush' took 197.839 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForStatefulToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForStatefulToFlushViolations' took 154.077 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 297.850 µs (1 iterations) +Thu 14:57: INFO : Deleting directory: neighbours +Thu 14:57: INFO : Running Photon pre-schedule graph optimisations +Thu 14:57: INFO : Running kernel graph-pass 'AlignOrEradicatePrintfs'. +Thu 14:57: INFO : Graph-pass 'AlignOrEradicatePrintfs' took 46.5110 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldConstantsPass'. +Thu 14:57: INFO : Graph-pass 'FoldConstantsPass' took 220.519 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'OptimiseNodesPass'. +Thu 14:57: INFO : Graph-pass 'OptimiseNodesPass' took 751.732 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'DeleteRedundantNodes'. +Thu 14:57: INFO : Graph-pass 'DeleteRedundantNodes' took 217.130 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'AlteraDSPExtractionGraphPass'. +Thu 14:57: INFO : Optimized 0 sub-graphs into DSP multiply/add chains +Thu 14:57: INFO : Graph-pass 'AlteraDSPExtractionGraphPass' took 7.70974 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'TriAddExtractionPass'. +Thu 14:57: INFO : Graph-pass 'TriAddExtractionPass' took 74.6630 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ConditionalAddExtractionPass'. +Thu 14:57: INFO : Optimized 1 sub-graphs into conditional adds/subs/triadds. +Thu 14:57: INFO : Sub-graph 1 (ADD) contained: 32 bits, unconditional A, condition on input B, unconditional C, unconditional output +Thu 14:57: INFO : Origin stack trace: +Thu 14:57: INFO : com.maxeler.maxcompiler.v2.kernelcompiler.types.base.DFEVar.add(DFEVar.java:775) +Thu 14:57: INFO : SpmvKernel.(SpmvKernel.maxj:76) +Thu 14:57: INFO : SpmvManager.(SpmvManager.maxj:64) +Thu 14:57: INFO : SpmvManager.main(SpmvManager.maxj:139) +Thu 14:57: INFO : Graph-pass 'ConditionalAddExtractionPass' took 6.04135 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'PO2FPMultOptimiser'. +Thu 14:57: INFO : Graph-pass 'PO2FPMultOptimiser' took 159.683 µs (1 iterations) +Thu 14:57: INFO : Logging Photon stats to: SpmvKernel_photon_stats.csv +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.64957 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CollectNumericExceptions'. +Thu 14:57: INFO : Graph-pass 'CollectNumericExceptions' took 97.9830 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StreamOffsetDivExpand'. +Thu 14:57: INFO : Graph-pass 'StreamOffsetDivExpand' took 219.144 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FindIllegalLoops'. +Thu 14:57: INFO : Graph-pass 'FindIllegalLoops' took 5.18309 ms (1 iterations) +Thu 14:57: INFO : Scheduling Photon graph (pass 1) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 100.354 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. +Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvKernel_scheduler_1_C.dat" --display "SpmvKernel_scheduler_1_C.out" --log "SpmvKernel_scheduler_1_C.log" +Thu 14:57: INFO : Reading model section from scheduler.mod... +Thu 14:57: INFO : 95 lines were read +Thu 14:57: INFO : Reading data section from SpmvKernel_scheduler_1_C.dat... +Thu 14:57: INFO : 3085 lines were read +Thu 14:57: INFO : Generating schedulingEquation... +Thu 14:57: INFO : Generating bufferingEquation... +Thu 14:57: INFO : Generating afterFlushNode... +Thu 14:57: INFO : Generating forcePairConstraints... +Thu 14:57: INFO : Generating forceAtEnd... +Thu 14:57: INFO : Generating autoVarLatencyUserMin... +Thu 14:57: INFO : Generating autoVarLatencyUserMax... +Thu 14:57: INFO : Generating fifos... +Thu 14:57: INFO : Model has been successfully generated +Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 7 column(s) removed +Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced +Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed +Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced +Thu 14:57: INFO : lpx_intopt: presolved MIP has 1399 rows, 1075 columns, 3493 non-zeros +Thu 14:57: INFO : lpx_intopt: 1075 integer columns, none of which are binary +Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 1399 +Thu 14:57: INFO : Solving LP relaxation... +Thu 14:57: INFO : 0: objval = -6.126800000e+04 infeas = 1.000000000e+00 (0) +Thu 14:57: INFO : 200: objval = -2.380900000e+04 infeas = 3.533236994e-01 (0) +Thu 14:57: INFO : 400: objval = 1.093400000e+04 infeas = 6.250000000e-02 (0) +Thu 14:57: INFO : 464: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 464: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 600: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 800: objval = 1.204300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 1000: objval = 1.146700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 1024: objval = 1.129000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Integer optimization begins... +Thu 14:57: INFO : + 1024: mip = not found yet >= -inf (1; 0) +Thu 14:57: INFO : + 1024: >>>>> 1.129000000e+04 >= 1.129000000e+04 0.0% (1; 0) +Thu 14:57: INFO : + 1024: mip = 1.129000000e+04 >= tree is empty 0.0% (0; 1) +Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Time used: 0.1 secs +Thu 14:57: INFO : Memory used: 3.8 Mb (4005845 bytes) +Thu 14:57: INFO : Model has been successfully processed +Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 166.732 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. +Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 113.449 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. +Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 797.679 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.35259 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. +Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 689.107 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 68.9220 µs (1 iterations) +Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 1) +Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 2.09717 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 64.9960 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ValidateFIFOs'. +Thu 14:57: INFO : Graph-pass 'ValidateFIFOs' took 53.5520 µs (1 iterations) +Thu 14:57: INFO : Scheduling Photon graph (pass 2) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 75.7900 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. +Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvKernel_scheduler_2_C.dat" --display "SpmvKernel_scheduler_2_C.out" --log "SpmvKernel_scheduler_2_C.log" +Thu 14:57: INFO : Reading model section from scheduler.mod... +Thu 14:57: INFO : 95 lines were read +Thu 14:57: INFO : Reading data section from SpmvKernel_scheduler_2_C.dat... +Thu 14:57: INFO : 3085 lines were read +Thu 14:57: INFO : Generating schedulingEquation... +Thu 14:57: INFO : Generating bufferingEquation... +Thu 14:57: INFO : Generating afterFlushNode... +Thu 14:57: INFO : Generating forcePairConstraints... +Thu 14:57: INFO : Generating forceAtEnd... +Thu 14:57: INFO : Generating autoVarLatencyUserMin... +Thu 14:57: INFO : Generating autoVarLatencyUserMax... +Thu 14:57: INFO : Generating fifos... +Thu 14:57: INFO : Model has been successfully generated +Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 7 column(s) removed +Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced +Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed +Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced +Thu 14:57: INFO : lpx_intopt: presolved MIP has 1399 rows, 1075 columns, 3493 non-zeros +Thu 14:57: INFO : lpx_intopt: 1075 integer columns, none of which are binary +Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 1399 +Thu 14:57: INFO : Solving LP relaxation... +Thu 14:57: INFO : 0: objval = -6.126800000e+04 infeas = 1.000000000e+00 (0) +Thu 14:57: INFO : 200: objval = -2.380900000e+04 infeas = 3.533236994e-01 (0) +Thu 14:57: INFO : 400: objval = 1.093400000e+04 infeas = 6.250000000e-02 (0) +Thu 14:57: INFO : 464: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 464: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 600: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 800: objval = 1.204300000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 1000: objval = 1.146700000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 1024: objval = 1.129000000e+04 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Integer optimization begins... +Thu 14:57: INFO : + 1024: mip = not found yet >= -inf (1; 0) +Thu 14:57: INFO : + 1024: >>>>> 1.129000000e+04 >= 1.129000000e+04 0.0% (1; 0) +Thu 14:57: INFO : + 1024: mip = 1.129000000e+04 >= tree is empty 0.0% (0; 1) +Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Time used: 0.1 secs +Thu 14:57: INFO : Memory used: 3.8 Mb (4005845 bytes) +Thu 14:57: INFO : Model has been successfully processed +Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_schedule_report.csv +Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 162.303 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'RemoveDistMeasurementNodes'. +Thu 14:57: INFO : Graph-pass 'RemoveDistMeasurementNodes' took 5.88100 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. +Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 89.0560 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. +Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 13.0672 ms (1 iterations) +Thu 14:57: INFO : Maximum stream latency for kernel 'SpmvKernel': 134 +Thu 14:57: INFO : Using user logic for flush. +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.59587 ms (1 iterations) +Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 2) +Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 8.30207 ms (2 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 134.753 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 75.0760 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleAsserter'. +Thu 14:57: INFO : Graph-pass 'ScheduleAsserter' took 300.247 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReplaceEvalStreamOffsetNodes'. +Thu 14:57: INFO : Graph-pass 'ReplaceEvalStreamOffsetNodes' took 36.7310 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FIFOCoalesceRespectingPlacementPass'. +Thu 14:57: INFO : Graph-pass 'FIFOCoalesceRespectingPlacementPass' took 1.72370 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FIFOReport'. +Thu 14:57: INFO : Graph-pass 'FIFOReport' took 1.83741 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.63018 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'RemoveUntypedConstants'. +Thu 14:57: INFO : Graph-pass 'RemoveUntypedConstants' took 5.71052 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'VariableSizeMappedRegInserter'. +Thu 14:57: INFO : Graph-pass 'VariableSizeMappedRegInserter' took 37.0120 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 72.3890 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MakeMaxFileNodeData'. +Thu 14:57: INFO : Graph-pass 'MakeMaxFileNodeData' took 7.63173 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MoveFanoutRegsForwards'. +Thu 14:57: INFO : Graph-pass 'MoveFanoutRegsForwards' took 59.1670 µs (1 iterations) +Thu 14:57: INFO : Optimization report for Kernel 'SpmvKernel'. +Thu 14:57: INFO : Enabled optimizations: +Thu 14:57: INFO : DSP-MultAdd +Thu 14:57: INFO : Tri-Adder +Thu 14:57: INFO : Conditional (Tri)Adds/Subs/AddSubs +Thu 14:57: INFO : Power-of-2 Floating Point +Thu 14:57: INFO : Fifo Coalescing +Thu 14:57: INFO : Updating the preliminary MaxCompilerDesignData.dat. (@ CoreCompile SpmvKernel) +Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxCompilerDesignData.dat +Thu 14:57: INFO : Running kernel graph-pass 'WeightBasedCEPartitioner'. +Thu 14:57: INFO : Partitioning design into 1 CE domain(s) to minimize global signal fanout. +Thu 14:57: INFO : Graph-pass 'WeightBasedCEPartitioner' took 52.8530 µs (1 iterations) +Thu 14:57: INFO : Using maximum counter CE delay chain length 8 +Thu 14:57: INFO : CE Partition 0 Clock Phase 0 : Nodes=634 (use fill=20, use flush=9) Fill counters=8 (+16 delay regs) Flush counters=5 (+0 delay regs) +Thu 14:57: INFO : Running kernel graph-pass 'FindWriteableMappedMemories'. +Thu 14:57: INFO : Graph-pass 'FindWriteableMappedMemories' took 108.710 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 214.396 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MaxConstantLatency'. +Thu 14:57: INFO : Graph-pass 'MaxConstantLatency' took 140.705 µs (1 iterations) +Thu 14:57: INFO : Maximum constant latency: 0 +Thu 14:57: INFO : Running kernel graph-pass 'PhotonMaxDCTopEntity'. +Thu 14:57: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 +Thu 14:57: INFO : Implementing static multi-stage delay of 80 (1 bits wide), cost 1 RAMB18-equivalents, and 0 SRL32s. Made from: 0 x 512 BRAMs, Straggler BRAM 78, SRL of length 0 +Thu 14:57: INFO : Implementing static multi-stage delay of 40 (1 bits wide), cost 1 RAMB18-equivalents, and 0 SRL32s. Made from: 0 x 512 BRAMs, Straggler BRAM 38, SRL of length 0 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 16 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 16 +Thu 14:57: INFO : Implementing static multi-stage delay of 18 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 18 +Thu 14:57: INFO : Implementing static multi-stage delay of 11 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 11 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 +Thu 14:57: INFO : Implementing static multi-stage delay of 5 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 +Thu 14:57: INFO : Graph-pass 'PhotonMaxDCTopEntity' took 1.63105 s (1 iterations) +Thu 14:57: INFO : Writing current graph to: Spmv_SpmvKernel_final-hardware.pxg +Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. +Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 159.990 ms (1 iterations) +Thu 14:57: PROGRESS: +Thu 14:57: PROGRESS: Compiling kernel "SpmvReductionKernel" +Thu 14:57: INFO : Configuration: +Thu 14:57: INFO : KernelConfiguration.allowDSPCascading = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.allowInputsOutputsBeforeFlushNode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.allowZeroLatencyNodeHold = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.board = MAX4848A [Init: MAX2116B, change: MAX4848A] +Thu 14:57: INFO : KernelConfiguration.bramBitsThreshold = 2080 [Init: 2080] +Thu 14:57: INFO : KernelConfiguration.buildTarget = HARDWARE [Init: NONE, change: HARDWARE] +Thu 14:57: INFO : KernelConfiguration.cePipelining = 2 [Init: 2] +Thu 14:57: INFO : KernelConfiguration.clockPhaseBalanceThreshold = 0.1 [Init: 0.1] +Thu 14:57: INFO : KernelConfiguration.clockPhasingRetries = 50 [Init: 50] +Thu 14:57: INFO : KernelConfiguration.dumpNeighboursString = [Init: ] +Thu 14:57: INFO : KernelConfiguration.enableCeReplication = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.enableClockPhasePartitioning = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableDebugIOControlRegs = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.enableDummyBuild = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableKernelProfiler = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enablePipelinedComputeController = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableShadowRegister = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.fifoSrlRegisterStages = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.flushOnInputDataCongtiguous = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.hardwareDebugDepth = 512 [Init: 512] +Thu 14:57: INFO : KernelConfiguration.hwHierarchyMode = UNSET [Init: UNSET] +Thu 14:57: INFO : KernelConfiguration.latencyAnnotation = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.latencyAnnotationIOs = [Init: null] +Thu 14:57: INFO : KernelConfiguration.maxCoalescedFifoWidth = 2147483647 [Init: 2147483647] +Thu 14:57: INFO : KernelConfiguration.maxPreAdderFanOut = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.netlistMode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.numPhotonStateMachines = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.conditionalArithmetic = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.counterChainWrapPipelining = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.optimizations.dspAddChain = OPTIMISE [Init: null, Init after BuildTarget change: OPTIMISE] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableActiveFanoutReduction = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBUFGCE = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterInputRegistering = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterRegistering = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFifoCoalescing = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFullPrecisionBinaryOpConstants = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableIntegratedRounding = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableMultiCycleReset = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enablePowerTwoFloatMult = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.inputFlushDistanceFactor = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.optimizationTechnique = DEFAULT [Init: DEFAULT] +Thu 14:57: INFO : KernelConfiguration.optimizations.triAdd = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.partialReconfBlockName = [Init: ] +Thu 14:57: INFO : KernelConfiguration.partialReconfMode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.partialReconfTemplate = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.replicateNodeCeLog2NumPartitions = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.romBRAMBitsThreshold = 2080 [Init: 2080] +Thu 14:57: INFO : KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION [Init: EXCEPTION] +Thu 14:57: INFO : KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION [Init: EXCEPTION] +Thu 14:57: INFO : KernelConfiguration.simulation.simProgressMessageFrequency = 0 [Init: 0] +Thu 14:57: INFO : +Thu 14:57: INFO : -- +Thu 14:57: INFO : Writing current graph to: Spmv_SpmvReductionKernel_original.pxg +Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. +Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 9.73425 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 9.01900 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. +Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 37.2780 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FindInputsLeadingToFlush'. +Thu 14:57: INFO : Graph-pass 'FindInputsLeadingToFlush' took 83.5950 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForStatefulToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForStatefulToFlushViolations' took 59.5980 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 21.0010 µs (1 iterations) +Thu 14:57: INFO : Deleting directory: neighbours +Thu 14:57: INFO : Running Photon pre-schedule graph optimisations +Thu 14:57: INFO : Running kernel graph-pass 'AlignOrEradicatePrintfs'. +Thu 14:57: INFO : Graph-pass 'AlignOrEradicatePrintfs' took 5.17500 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldConstantsPass'. +Thu 14:57: INFO : Graph-pass 'FoldConstantsPass' took 26.8250 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'OptimiseNodesPass'. +Thu 14:57: INFO : Graph-pass 'OptimiseNodesPass' took 60.2750 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'DeleteRedundantNodes'. +Thu 14:57: INFO : Graph-pass 'DeleteRedundantNodes' took 10.2110 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'AlteraDSPExtractionGraphPass'. +Thu 14:57: INFO : Optimized 0 sub-graphs into DSP multiply/add chains +Thu 14:57: INFO : Graph-pass 'AlteraDSPExtractionGraphPass' took 159.777 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'TriAddExtractionPass'. +Thu 14:57: INFO : Graph-pass 'TriAddExtractionPass' took 6.61100 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ConditionalAddExtractionPass'. +Thu 14:57: INFO : Optimized 0 sub-graphs into conditional adds/subs/triadds. +Thu 14:57: INFO : Graph-pass 'ConditionalAddExtractionPass' took 56.2480 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'PO2FPMultOptimiser'. +Thu 14:57: INFO : Graph-pass 'PO2FPMultOptimiser' took 8.91200 µs (1 iterations) +Thu 14:57: INFO : Logging Photon stats to: SpmvReductionKernel_photon_stats.csv +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.10475 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CollectNumericExceptions'. +Thu 14:57: INFO : Graph-pass 'CollectNumericExceptions' took 13.7920 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StreamOffsetDivExpand'. +Thu 14:57: INFO : Graph-pass 'StreamOffsetDivExpand' took 104.754 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FindIllegalLoops'. +Thu 14:57: INFO : Graph-pass 'FindIllegalLoops' took 260.091 µs (1 iterations) +Thu 14:57: INFO : Scheduling Photon graph (pass 1) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 5.87000 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. +Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvReductionKernel_scheduler_1_C.dat" --display "SpmvReductionKernel_scheduler_1_C.out" --log "SpmvReductionKernel_scheduler_1_C.log" +Thu 14:57: INFO : Reading model section from scheduler.mod... +Thu 14:57: INFO : 95 lines were read +Thu 14:57: INFO : Reading data section from SpmvReductionKernel_scheduler_1_C.dat... +Thu 14:57: INFO : 157 lines were read +Thu 14:57: INFO : Generating schedulingEquation... +Thu 14:57: INFO : Generating bufferingEquation... +Thu 14:57: INFO : Generating afterFlushNode... +Thu 14:57: INFO : Generating forcePairConstraints... +Thu 14:57: INFO : Generating forceAtEnd... +Thu 14:57: INFO : Generating autoVarLatencyUserMin... +Thu 14:57: INFO : Generating autoVarLatencyUserMax... +Thu 14:57: INFO : Generating fifos... +Thu 14:57: INFO : Model has been successfully generated +Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 3 column(s) removed +Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced +Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed +Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced +Thu 14:57: INFO : lpx_intopt: presolved MIP has 39 rows, 35 columns, 96 non-zeros +Thu 14:57: INFO : lpx_intopt: 35 integer columns, none of which are binary +Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 39 +Thu 14:57: INFO : Solving LP relaxation... +Thu 14:57: INFO : 0: objval = 4.930000000e+02 infeas = 1.000000000e+00 (0) +Thu 14:57: INFO : 29: objval = 4.700000000e+01 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 29: objval = 4.700000000e+01 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 35: objval = 1.400000000e+01 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Integer optimization begins... +Thu 14:57: INFO : + 35: mip = not found yet >= -inf (1; 0) +Thu 14:57: INFO : + 35: >>>>> 1.400000000e+01 >= 1.400000000e+01 0.0% (1; 0) +Thu 14:57: INFO : + 35: mip = 1.400000000e+01 >= tree is empty 0.0% (0; 1) +Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Time used: 0.0 secs +Thu 14:57: INFO : Memory used: 0.2 Mb (240330 bytes) +Thu 14:57: INFO : Model has been successfully processed +Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 28.3936 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. +Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 12.2380 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. +Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 28.2610 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 920.953 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. +Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 31.4030 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 16.6260 µs (1 iterations) +Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 1) +Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 53.5250 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 7.66000 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ValidateFIFOs'. +Thu 14:57: INFO : Graph-pass 'ValidateFIFOs' took 5.27000 µs (1 iterations) +Thu 14:57: INFO : Scheduling Photon graph (pass 2) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 6.19700 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. +Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvReductionKernel_scheduler_2_C.dat" --display "SpmvReductionKernel_scheduler_2_C.out" --log "SpmvReductionKernel_scheduler_2_C.log" +Thu 14:57: INFO : Reading model section from scheduler.mod... +Thu 14:57: INFO : 95 lines were read +Thu 14:57: INFO : Reading data section from SpmvReductionKernel_scheduler_2_C.dat... +Thu 14:57: INFO : 157 lines were read +Thu 14:57: INFO : Generating schedulingEquation... +Thu 14:57: INFO : Generating bufferingEquation... +Thu 14:57: INFO : Generating afterFlushNode... +Thu 14:57: INFO : Generating forcePairConstraints... +Thu 14:57: INFO : Generating forceAtEnd... +Thu 14:57: INFO : Generating autoVarLatencyUserMin... +Thu 14:57: INFO : Generating autoVarLatencyUserMax... +Thu 14:57: INFO : Generating fifos... +Thu 14:57: INFO : Model has been successfully generated +Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 3 column(s) removed +Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced +Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed +Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced +Thu 14:57: INFO : lpx_intopt: presolved MIP has 39 rows, 35 columns, 96 non-zeros +Thu 14:57: INFO : lpx_intopt: 35 integer columns, none of which are binary +Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 39 +Thu 14:57: INFO : Solving LP relaxation... +Thu 14:57: INFO : 0: objval = 4.930000000e+02 infeas = 1.000000000e+00 (0) +Thu 14:57: INFO : 29: objval = 4.700000000e+01 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 29: objval = 4.700000000e+01 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 35: objval = 1.400000000e+01 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Integer optimization begins... +Thu 14:57: INFO : + 35: mip = not found yet >= -inf (1; 0) +Thu 14:57: INFO : + 35: >>>>> 1.400000000e+01 >= 1.400000000e+01 0.0% (1; 0) +Thu 14:57: INFO : + 35: mip = 1.400000000e+01 >= tree is empty 0.0% (0; 1) +Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Time used: 0.0 secs +Thu 14:57: INFO : Memory used: 0.2 Mb (240330 bytes) +Thu 14:57: INFO : Model has been successfully processed +Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_schedule_report.csv +Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 26.4224 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'RemoveDistMeasurementNodes'. +Thu 14:57: INFO : Graph-pass 'RemoveDistMeasurementNodes' took 3.09400 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. +Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 9.32700 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. +Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 465.243 µs (1 iterations) +Thu 14:57: INFO : Maximum stream latency for kernel 'SpmvReductionKernel': 30000 +Thu 14:57: INFO : Using user logic for flush. +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 994.328 µs (1 iterations) +Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 2) +Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 14.7650 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 8.00100 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 6.64700 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleAsserter'. +Thu 14:57: INFO : Graph-pass 'ScheduleAsserter' took 11.0640 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReplaceEvalStreamOffsetNodes'. +Thu 14:57: INFO : Graph-pass 'ReplaceEvalStreamOffsetNodes' took 4.60200 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FIFOCoalesceRespectingPlacementPass'. +Thu 14:57: INFO : Graph-pass 'FIFOCoalesceRespectingPlacementPass' took 105.192 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FIFOReport'. +Thu 14:57: INFO : Graph-pass 'FIFOReport' took 1.04517 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.16188 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'RemoveUntypedConstants'. +Thu 14:57: INFO : Graph-pass 'RemoveUntypedConstants' took 684.527 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'VariableSizeMappedRegInserter'. +Thu 14:57: INFO : Graph-pass 'VariableSizeMappedRegInserter' took 4.86100 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 5.79100 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MakeMaxFileNodeData'. +Thu 14:57: INFO : Graph-pass 'MakeMaxFileNodeData' took 302.265 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MoveFanoutRegsForwards'. +Thu 14:57: INFO : Graph-pass 'MoveFanoutRegsForwards' took 4.76700 µs (1 iterations) +Thu 14:57: INFO : Optimization report for Kernel 'SpmvReductionKernel'. +Thu 14:57: INFO : Enabled optimizations: +Thu 14:57: INFO : DSP-MultAdd +Thu 14:57: INFO : Tri-Adder +Thu 14:57: INFO : Conditional (Tri)Adds/Subs/AddSubs +Thu 14:57: INFO : Power-of-2 Floating Point +Thu 14:57: INFO : Fifo Coalescing +Thu 14:57: INFO : Updating the preliminary MaxCompilerDesignData.dat. (@ CoreCompile SpmvReductionKernel) +Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxCompilerDesignData.dat +Thu 14:57: INFO : Running kernel graph-pass 'WeightBasedCEPartitioner'. +Thu 14:57: INFO : Partitioning design into 1 CE domain(s) to minimize global signal fanout. +Thu 14:57: INFO : Graph-pass 'WeightBasedCEPartitioner' took 48.2220 µs (1 iterations) +Thu 14:57: INFO : Using maximum counter CE delay chain length 15 +Thu 14:57: INFO : CE Partition 0 Clock Phase 0 : Nodes=39 (use fill=7, use flush=3) Fill counters=1 (+23 delay regs) Flush counters=1 (+0 delay regs) +Thu 14:57: INFO : Running kernel graph-pass 'FindWriteableMappedMemories'. +Thu 14:57: INFO : Graph-pass 'FindWriteableMappedMemories' took 25.4730 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 14.6460 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MaxConstantLatency'. +Thu 14:57: INFO : Graph-pass 'MaxConstantLatency' took 22.1220 µs (1 iterations) +Thu 14:57: INFO : Maximum constant latency: 1 +Thu 14:57: INFO : Running kernel graph-pass 'PhotonMaxDCTopEntity'. +Thu 14:57: INFO : Implementing static multi-stage delay of 14 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 14 +Thu 14:57: INFO : Graph-pass 'PhotonMaxDCTopEntity' took 160.151 ms (1 iterations) +Thu 14:57: INFO : Writing current graph to: Spmv_SpmvReductionKernel_final-hardware.pxg +Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. +Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 9.79377 ms (1 iterations) +Thu 14:57: PROGRESS: +Thu 14:57: PROGRESS: Compiling kernel "SpmvPaddingKernel" +Thu 14:57: INFO : Configuration: +Thu 14:57: INFO : KernelConfiguration.allowDSPCascading = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.allowInputsOutputsBeforeFlushNode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.allowZeroLatencyNodeHold = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.board = MAX4848A [Init: MAX2116B, change: MAX4848A] +Thu 14:57: INFO : KernelConfiguration.bramBitsThreshold = 2080 [Init: 2080] +Thu 14:57: INFO : KernelConfiguration.buildTarget = HARDWARE [Init: NONE, change: HARDWARE] +Thu 14:57: INFO : KernelConfiguration.cePipelining = 2 [Init: 2] +Thu 14:57: INFO : KernelConfiguration.clockPhaseBalanceThreshold = 0.1 [Init: 0.1] +Thu 14:57: INFO : KernelConfiguration.clockPhasingRetries = 50 [Init: 50] +Thu 14:57: INFO : KernelConfiguration.dumpNeighboursString = [Init: ] +Thu 14:57: INFO : KernelConfiguration.enableCeReplication = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.enableClockPhasePartitioning = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableDebugIOControlRegs = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.enableDummyBuild = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableKernelProfiler = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enablePipelinedComputeController = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.enableShadowRegister = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.fifoSrlRegisterStages = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.flushOnInputDataCongtiguous = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.hardwareDebugDepth = 512 [Init: 512] +Thu 14:57: INFO : KernelConfiguration.hwHierarchyMode = UNSET [Init: UNSET] +Thu 14:57: INFO : KernelConfiguration.latencyAnnotation = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.latencyAnnotationIOs = [Init: null] +Thu 14:57: INFO : KernelConfiguration.maxCoalescedFifoWidth = 2147483647 [Init: 2147483647] +Thu 14:57: INFO : KernelConfiguration.maxPreAdderFanOut = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.netlistMode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.numPhotonStateMachines = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.conditionalArithmetic = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.counterChainWrapPipelining = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.optimizations.dspAddChain = OPTIMISE [Init: null, Init after BuildTarget change: OPTIMISE] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableActiveFanoutReduction = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBUFGCE = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterInputRegistering = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterRegistering = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFifoCoalescing = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableFullPrecisionBinaryOpConstants = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableIntegratedRounding = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableMultiCycleReset = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.optimizations.enablePowerTwoFloatMult = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.optimizations.inputFlushDistanceFactor = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1 [Init: 1] +Thu 14:57: INFO : KernelConfiguration.optimizations.optimizationTechnique = DEFAULT [Init: DEFAULT] +Thu 14:57: INFO : KernelConfiguration.optimizations.triAdd = true [Init: true] +Thu 14:57: INFO : KernelConfiguration.partialReconfBlockName = [Init: ] +Thu 14:57: INFO : KernelConfiguration.partialReconfMode = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.partialReconfTemplate = false [Init: false] +Thu 14:57: INFO : KernelConfiguration.replicateNodeCeLog2NumPartitions = 0 [Init: 0] +Thu 14:57: INFO : KernelConfiguration.romBRAMBitsThreshold = 2080 [Init: 2080] +Thu 14:57: INFO : KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION [Init: EXCEPTION] +Thu 14:57: INFO : KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION [Init: EXCEPTION] +Thu 14:57: INFO : KernelConfiguration.simulation.simProgressMessageFrequency = 0 [Init: 0] +Thu 14:57: INFO : +Thu 14:57: INFO : -- +Thu 14:57: INFO : Writing current graph to: Spmv_SpmvPaddingKernel_original.pxg +Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. +Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 8.90121 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 8.32500 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. +Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 29.3590 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FindInputsLeadingToFlush'. +Thu 14:57: INFO : Graph-pass 'FindInputsLeadingToFlush' took 8.56500 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForStatefulToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForStatefulToFlushViolations' took 26.5070 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 20.2720 µs (1 iterations) +Thu 14:57: INFO : Deleting directory: neighbours +Thu 14:57: INFO : Running Photon pre-schedule graph optimisations +Thu 14:57: INFO : Running kernel graph-pass 'AlignOrEradicatePrintfs'. +Thu 14:57: INFO : Graph-pass 'AlignOrEradicatePrintfs' took 5.17000 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldConstantsPass'. +Thu 14:57: INFO : Graph-pass 'FoldConstantsPass' took 408.010 µs (2 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'OptimiseNodesPass'. +Thu 14:57: INFO : Graph-pass 'OptimiseNodesPass' took 117.195 µs (2 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'DeleteRedundantNodes'. +Thu 14:57: INFO : Graph-pass 'DeleteRedundantNodes' took 7.34400 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'AlteraDSPExtractionGraphPass'. +Thu 14:57: INFO : Optimized 0 sub-graphs into DSP multiply/add chains +Thu 14:57: INFO : Graph-pass 'AlteraDSPExtractionGraphPass' took 101.869 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'TriAddExtractionPass'. +Thu 14:57: INFO : Graph-pass 'TriAddExtractionPass' took 5.51500 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ConditionalAddExtractionPass'. +Thu 14:57: INFO : Optimized 0 sub-graphs into conditional adds/subs/triadds. +Thu 14:57: INFO : Graph-pass 'ConditionalAddExtractionPass' took 52.7820 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'PO2FPMultOptimiser'. +Thu 14:57: INFO : Graph-pass 'PO2FPMultOptimiser' took 8.37900 µs (1 iterations) +Thu 14:57: INFO : Logging Photon stats to: SpmvPaddingKernel_photon_stats.csv +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.01281 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CollectNumericExceptions'. +Thu 14:57: INFO : Graph-pass 'CollectNumericExceptions' took 7.21900 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StreamOffsetDivExpand'. +Thu 14:57: INFO : Graph-pass 'StreamOffsetDivExpand' took 9.42200 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FindIllegalLoops'. +Thu 14:57: INFO : Graph-pass 'FindIllegalLoops' took 22.1690 µs (1 iterations) +Thu 14:57: INFO : Scheduling Photon graph (pass 1) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 5.44400 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. +Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvPaddingKernel_scheduler_1_C.dat" --display "SpmvPaddingKernel_scheduler_1_C.out" --log "SpmvPaddingKernel_scheduler_1_C.log" +Thu 14:57: INFO : Reading model section from scheduler.mod... +Thu 14:57: INFO : 95 lines were read +Thu 14:57: INFO : Reading data section from SpmvPaddingKernel_scheduler_1_C.dat... +Thu 14:57: INFO : 135 lines were read +Thu 14:57: INFO : Generating schedulingEquation... +Thu 14:57: INFO : Generating bufferingEquation... +Thu 14:57: INFO : Generating afterFlushNode... +Thu 14:57: INFO : Generating forcePairConstraints... +Thu 14:57: INFO : Generating forceAtEnd... +Thu 14:57: INFO : Generating autoVarLatencyUserMin... +Thu 14:57: INFO : Generating autoVarLatencyUserMax... +Thu 14:57: INFO : Generating fifos... +Thu 14:57: INFO : Model has been successfully generated +Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 3 column(s) removed +Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced +Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed +Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced +Thu 14:57: INFO : lpx_intopt: presolved MIP has 29 rows, 27 columns, 71 non-zeros +Thu 14:57: INFO : lpx_intopt: 27 integer columns, none of which are binary +Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 29 +Thu 14:57: INFO : Solving LP relaxation... +Thu 14:57: INFO : 0: objval = -4.330000000e+02 infeas = 1.000000000e+00 (0) +Thu 14:57: INFO : 20: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 20: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 22: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Integer optimization begins... +Thu 14:57: INFO : + 22: mip = not found yet >= -inf (1; 0) +Thu 14:57: INFO : + 22: >>>>> 5.000000000e+00 >= 5.000000000e+00 0.0% (1; 0) +Thu 14:57: INFO : + 22: mip = 5.000000000e+00 >= tree is empty 0.0% (0; 1) +Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Time used: 0.0 secs +Thu 14:57: INFO : Memory used: 0.2 Mb (227608 bytes) +Thu 14:57: INFO : Model has been successfully processed +Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 28.4552 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. +Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 15.0270 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. +Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 26.8780 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 832.365 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. +Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 28.9440 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. +Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 18.6410 µs (1 iterations) +Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 1) +Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 13.3410 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 6.79400 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ValidateFIFOs'. +Thu 14:57: INFO : Graph-pass 'ValidateFIFOs' took 4.80200 µs (1 iterations) +Thu 14:57: INFO : Scheduling Photon graph (pass 2) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 6.16300 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. +Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvPaddingKernel_scheduler_2_C.dat" --display "SpmvPaddingKernel_scheduler_2_C.out" --log "SpmvPaddingKernel_scheduler_2_C.log" +Thu 14:57: INFO : Reading model section from scheduler.mod... +Thu 14:57: INFO : 95 lines were read +Thu 14:57: INFO : Reading data section from SpmvPaddingKernel_scheduler_2_C.dat... +Thu 14:57: INFO : 135 lines were read +Thu 14:57: INFO : Generating schedulingEquation... +Thu 14:57: INFO : Generating bufferingEquation... +Thu 14:57: INFO : Generating afterFlushNode... +Thu 14:57: INFO : Generating forcePairConstraints... +Thu 14:57: INFO : Generating forceAtEnd... +Thu 14:57: INFO : Generating autoVarLatencyUserMin... +Thu 14:57: INFO : Generating autoVarLatencyUserMax... +Thu 14:57: INFO : Generating fifos... +Thu 14:57: INFO : Model has been successfully generated +Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 3 column(s) removed +Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced +Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed +Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced +Thu 14:57: INFO : lpx_intopt: presolved MIP has 29 rows, 27 columns, 71 non-zeros +Thu 14:57: INFO : lpx_intopt: 27 integer columns, none of which are binary +Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 29 +Thu 14:57: INFO : Solving LP relaxation... +Thu 14:57: INFO : 0: objval = -4.330000000e+02 infeas = 1.000000000e+00 (0) +Thu 14:57: INFO : 20: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 20: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : * 22: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) +Thu 14:57: INFO : OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Integer optimization begins... +Thu 14:57: INFO : + 22: mip = not found yet >= -inf (1; 0) +Thu 14:57: INFO : + 22: >>>>> 5.000000000e+00 >= 5.000000000e+00 0.0% (1; 0) +Thu 14:57: INFO : + 22: mip = 5.000000000e+00 >= tree is empty 0.0% (0; 1) +Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND +Thu 14:57: INFO : Time used: 0.0 secs +Thu 14:57: INFO : Memory used: 0.2 Mb (227608 bytes) +Thu 14:57: INFO : Model has been successfully processed +Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel_schedule_report.csv +Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 29.4286 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'RemoveDistMeasurementNodes'. +Thu 14:57: INFO : Graph-pass 'RemoveDistMeasurementNodes' took 5.22300 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. +Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 13.3800 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. +Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 355.744 µs (1 iterations) +Thu 14:57: INFO : Maximum stream latency for kernel 'SpmvPaddingKernel': 10 +Thu 14:57: INFO : Using user logic for flush. +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 877.573 µs (1 iterations) +Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 2) +Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 13.9690 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. +Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 8.39300 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 5.77000 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ScheduleAsserter'. +Thu 14:57: INFO : Graph-pass 'ScheduleAsserter' took 9.36900 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'ReplaceEvalStreamOffsetNodes'. +Thu 14:57: INFO : Graph-pass 'ReplaceEvalStreamOffsetNodes' took 4.37700 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FIFOCoalesceRespectingPlacementPass'. +Thu 14:57: INFO : Graph-pass 'FIFOCoalesceRespectingPlacementPass' took 66.8490 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'FIFOReport'. +Thu 14:57: INFO : Graph-pass 'FIFOReport' took 970.546 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. +Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.08633 ms (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'RemoveUntypedConstants'. +Thu 14:57: INFO : Graph-pass 'RemoveUntypedConstants' took 644.501 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'VariableSizeMappedRegInserter'. +Thu 14:57: INFO : Graph-pass 'VariableSizeMappedRegInserter' took 4.28200 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 4.97500 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MakeMaxFileNodeData'. +Thu 14:57: INFO : Graph-pass 'MakeMaxFileNodeData' took 243.285 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MoveFanoutRegsForwards'. +Thu 14:57: INFO : Graph-pass 'MoveFanoutRegsForwards' took 4.34800 µs (1 iterations) +Thu 14:57: INFO : Optimization report for Kernel 'SpmvPaddingKernel'. +Thu 14:57: INFO : Enabled optimizations: +Thu 14:57: INFO : DSP-MultAdd +Thu 14:57: INFO : Tri-Adder +Thu 14:57: INFO : Conditional (Tri)Adds/Subs/AddSubs +Thu 14:57: INFO : Power-of-2 Floating Point +Thu 14:57: INFO : Fifo Coalescing +Thu 14:57: INFO : Updating the preliminary MaxCompilerDesignData.dat. (@ CoreCompile SpmvPaddingKernel) +Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxCompilerDesignData.dat +Thu 14:57: INFO : Running kernel graph-pass 'WeightBasedCEPartitioner'. +Thu 14:57: INFO : Partitioning design into 1 CE domain(s) to minimize global signal fanout. +Thu 14:57: INFO : Graph-pass 'WeightBasedCEPartitioner' took 52.6570 µs (1 iterations) +Thu 14:57: INFO : Using maximum counter CE delay chain length 4 +Thu 14:57: INFO : CE Partition 0 Clock Phase 0 : Nodes=33 (use fill=7, use flush=3) Fill counters=2 (+5 delay regs) Flush counters=1 (+0 delay regs) +Thu 14:57: INFO : Running kernel graph-pass 'FindWriteableMappedMemories'. +Thu 14:57: INFO : Graph-pass 'FindWriteableMappedMemories' took 5.67600 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. +Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 11.9300 µs (1 iterations) +Thu 14:57: INFO : Running kernel graph-pass 'MaxConstantLatency'. +Thu 14:57: INFO : Graph-pass 'MaxConstantLatency' took 19.6460 µs (1 iterations) +Thu 14:57: INFO : Maximum constant latency: 0 +Thu 14:57: INFO : Running kernel graph-pass 'PhotonMaxDCTopEntity'. +Thu 14:57: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 +Thu 14:57: INFO : Graph-pass 'PhotonMaxDCTopEntity' took 106.512 ms (1 iterations) +Thu 14:57: INFO : Writing current graph to: Spmv_SpmvPaddingKernel_final-hardware.pxg +Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. +Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 8.35731 ms (1 iterations) +Thu 14:57: INFO : Running manager compiler graph-pass: GenerateMXGInfo +Thu 14:57: INFO : Running manager compiler graph-pass: GenerateSlicHostCode +Thu 14:57: INFO : Generating SLIC interface information +Thu 14:57: INFO : Generating SLIC code for interface 'write' +Thu 14:57: INFO : Creating CModeDramLinear instance for "cpu2lmem". +Thu 14:57: INFO : Creating CModeDramLinear instance for "indptr". +Thu 14:57: INFO : Creating CModeDramLinear instance for "values". +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvReductionKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvPaddingKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvCacheKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvKernel.current_run_cycle_count' +Thu 14:57: INFO : Interface 'write' depends on parameter 'size_bytes' +Thu 14:57: INFO : Interface 'write' depends on parameter 'start_bytes' +Thu 14:57: INFO : Generating SLIC code for interface 'default' +Thu 14:57: INFO : Creating CModeDramLinear instance for "cpu2lmem". +Thu 14:57: INFO : Creating CModeDramLinear instance for "indptr". +Thu 14:57: INFO : Creating CModeDramLinear instance for "values". +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvReductionKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvPaddingKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvCacheKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvKernel.current_run_cycle_count' +Thu 14:57: INFO : Interface 'default' depends on parameter 'nPartitions' +Thu 14:57: INFO : Interface 'default' depends on parameter 'nrows' +Thu 14:57: INFO : Interface 'default' depends on parameter 'paddingCycles' +Thu 14:57: INFO : Interface 'default' depends on parameter 'totalCycles' +Thu 14:57: INFO : Interface 'default' depends on parameter 'vectorLoadCycles' +Thu 14:57: INFO : Interface 'default' depends on parameter 'vectorSize' +Thu 14:57: INFO : Generating XML description for Maxfile +Thu 14:57: INFO : Generating XML description for mode 'write' +Thu 14:57: INFO : Creating CModeDramLinear instance for "cpu2lmem". +Thu 14:57: INFO : Creating CModeDramLinear instance for "indptr". +Thu 14:57: INFO : Creating CModeDramLinear instance for "values". +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvReductionKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvPaddingKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvCacheKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvKernel.current_run_cycle_count' +Thu 14:57: INFO : Interface 'write' depends on parameter 'size_bytes' +Thu 14:57: INFO : Interface 'write' depends on parameter 'start_bytes' +Thu 14:57: INFO : Generating XML description for mode 'default' +Thu 14:57: INFO : Creating CModeDramLinear instance for "cpu2lmem". +Thu 14:57: INFO : Creating CModeDramLinear instance for "indptr". +Thu 14:57: INFO : Creating CModeDramLinear instance for "values". +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvReductionKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvPaddingKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvCacheKernel.current_run_cycle_count' +Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvKernel.current_run_cycle_count' +Thu 14:57: INFO : Interface 'default' depends on parameter 'nPartitions' +Thu 14:57: INFO : Interface 'default' depends on parameter 'nrows' +Thu 14:57: INFO : Interface 'default' depends on parameter 'paddingCycles' +Thu 14:57: INFO : Interface 'default' depends on parameter 'totalCycles' +Thu 14:57: INFO : Interface 'default' depends on parameter 'vectorLoadCycles' +Thu 14:57: INFO : Interface 'default' depends on parameter 'vectorSize' +Thu 14:57: INFO : Adding SLIC sections to the maxfile +Thu 14:57: INFO : Adding user files to the maxfile +Thu 14:57: INFO : Generating SLIC include file +Thu 14:57: INFO : Done generating SLIC interface information +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:57: INFO : All asynchronous jobs are now completed. +Thu 14:57: INFO : Control Streams: Connecting block MappedElementsSwitchPCIeEA with select value: 1 +Thu 14:57: INFO : DDR3 Connectivity: +Thu 14:57: INFO : Memory Controller Pro sodimm1 connected to Controller resource sodimm_1_ddr3_core +Thu 14:57: INFO : Memory Controller Pro sodimm2 connected to Controller resource sodimm_2_ddr3_core +Thu 14:57: INFO : Memory Controller Pro sodimm3 connected to Controller resource sodimm_3_ddr3_core +Thu 14:57: INFO : Memory Controller Pro sodimm4 connected to Controller resource sodimm_4_ddr3_core +Thu 14:57: INFO : Memory Controller Pro sodimm5 connected to Controller resource sodimm_5_ddr3_core +Thu 14:57: INFO : Memory Controller Pro sodimm6 connected to Controller resource sodimm_6_ddr3_core +Thu 14:57: INFO : Running ' lmutil lmdiag -n quartus' +Thu 14:57: INFO : Successfully checked out license for Quartus (quartus) +Thu 14:57: INFO : Updating the preliminary MaxCompilerDesignData.dat. (@ Main build) +Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxCompilerDesignData.dat +Thu 14:57: PROGRESS: Generating input files (VHDL, netlists, MegaWizard/CoreGen) +Thu 14:57: INFO : Not deleting directory (does not exist): tmp +Thu 14:57: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altclkctrl -f:MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1.txt MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1.vhd > qmegawiz.log +Thu 14:57: INFO : Not deleting directory (does not exist): tmp +Thu 14:57: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altclkctrl -f:MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena.txt MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena.vhd > qmegawiz.log +Thu 14:58: INFO : Mapped register report: +Thu 14:58: INFO : 0 SFA_FORWARD_EN 4bytes +Thu 14:58: INFO : 4 nrows 4bytes +Thu 14:58: INFO : 8 nPartitions 4bytes +Thu 14:58: INFO : c nrows 4bytes +Thu 14:58: INFO : 10 vectorLoadCycles 4bytes +Thu 14:58: INFO : 14 dbg_stall_vector 1bytes +Thu 14:58: INFO : 15 io_loadEnabled_out_force_disabled 1bytes +Thu 14:58: INFO : 16 io_loadEnabled_in_force_disabled 1bytes +Thu 14:58: INFO : 17 io_matrixValues_force_disabled 1bytes +Thu 14:58: INFO : 18 io_readmask_force_disabled 1bytes +Thu 14:58: INFO : 19 io_readenable_force_disabled 1bytes +Thu 14:58: INFO : 1a io_values_force_disabled 1bytes +Thu 14:58: INFO : 1b io_vectorValues_force_disabled 1bytes +Thu 14:58: INFO : 1c vectorLoadCycles 4bytes +Thu 14:58: INFO : 20 io_vromLoad_force_disabled 1bytes +Thu 14:58: INFO : 21 io_indptr_force_disabled 1bytes +Thu 14:58: INFO : 22 run_cycle_count 6bytes +Thu 14:58: INFO : 28 current_run_cycle_count 6bytes +Thu 14:58: INFO : 2e dbg_ctld_empty 1bytes +Thu 14:58: INFO : 2f dbg_ctld_almost_empty 1bytes +Thu 14:58: INFO : 30 dbg_ctld_done 1bytes +Thu 14:58: INFO : 31 dbg_ctld_read 1bytes +Thu 14:58: INFO : 32 dbg_ctld_request 1bytes +Thu 14:58: INFO : 33 dbg_flush_start 1bytes +Thu 14:58: INFO : 34 dbg_full_level 1bytes +Thu 14:58: INFO : 35 dbg_flush_start_level 1bytes +Thu 14:58: INFO : 36 dbg_done_out 1bytes +Thu 14:58: INFO : 37 dbg_flushing 1bytes +Thu 14:58: INFO : 38 dbg_fill_level 1bytes +Thu 14:58: INFO : 39 dbg_flush_level 1bytes +Thu 14:58: INFO : 3a dbg_ctld_read_pipe_dbg 3bytes +Thu 14:58: INFO : 3d dbg_out_valid 1bytes +Thu 14:58: INFO : 3e dbg_out_stall 1bytes +Thu 14:58: INFO : 3f dbg_stall_vector 1bytes +Thu 14:58: INFO : 40 io_loadEnabled_force_disabled 1bytes +Thu 14:58: INFO : 41 io_rowFinished_force_disabled 1bytes +Thu 14:58: INFO : 42 io_output_force_disabled 1bytes +Thu 14:58: INFO : 43 io_cycleCounter_force_disabled 1bytes +Thu 14:58: INFO : 44 io_firstReadPosition_force_disabled 1bytes +Thu 14:58: INFO : 45 io_rowLength_force_disabled 1bytes +Thu 14:58: INFO : 46 io_matrixValues_force_disabled 1bytes +Thu 14:58: INFO : 47 io_vectorValues_force_disabled 1bytes +Thu 14:58: INFO : 48 run_cycle_count 6bytes +Thu 14:58: INFO : 4e current_run_cycle_count 6bytes +Thu 14:58: INFO : 54 dbg_ctld_empty 1bytes +Thu 14:58: INFO : 55 dbg_ctld_almost_empty 1bytes +Thu 14:58: INFO : 56 dbg_ctld_done 1bytes +Thu 14:58: INFO : 57 dbg_ctld_read 1bytes +Thu 14:58: INFO : 58 dbg_ctld_request 1bytes +Thu 14:58: INFO : 59 dbg_flush_start 1bytes +Thu 14:58: INFO : 5a dbg_full_level 1bytes +Thu 14:58: INFO : 5b dbg_flush_start_level 1bytes +Thu 14:58: INFO : 5c dbg_done_out 1bytes +Thu 14:58: INFO : 5d dbg_flushing 1bytes +Thu 14:58: INFO : 5e dbg_fill_level 1bytes +Thu 14:58: INFO : 5f dbg_flush_level 1bytes +Thu 14:58: INFO : 60 dbg_ctld_read_pipe_dbg 3bytes +Thu 14:58: INFO : 63 dbg_out_valid 1bytes +Thu 14:58: INFO : 64 dbg_out_stall 1bytes +Thu 14:58: INFO : 65 Lin1dAddrGen_addrgen_cmd_cpu2lmem_Addr_En 1bytes +Thu 14:58: INFO : 66 Lin1dAddrGen_addrgen_cmd_cpu2lmem_CmdSize 1bytes +Thu 14:58: INFO : 67 Lin1dAddrGen_addrgen_cmd_cpu2lmem_BlockSize_X 5bytes +Thu 14:58: INFO : 6c Lin1dAddrGen_addrgen_cmd_cpu2lmem_Wrap_X 5bytes +Thu 14:58: INFO : 71 Lin1dAddrGen_addrgen_cmd_cpu2lmem_Start_X_Addr 4bytes +Thu 14:58: INFO : 75 Lin1dAddrGen_addrgen_cmd_cpu2lmem_Offset_0 4bytes +Thu 14:58: INFO : 79 Lin1dAddrGen_addrgen_cmd_indptr_Addr_En 1bytes +Thu 14:58: INFO : 7a Lin1dAddrGen_addrgen_cmd_indptr_CmdSize 1bytes +Thu 14:58: INFO : 7b Lin1dAddrGen_addrgen_cmd_indptr_BlockSize_X 5bytes +Thu 14:58: INFO : 80 Lin1dAddrGen_addrgen_cmd_indptr_Wrap_X 5bytes +Thu 14:58: INFO : 85 Lin1dAddrGen_addrgen_cmd_indptr_Start_X_Addr 4bytes +Thu 14:58: INFO : 89 Lin1dAddrGen_addrgen_cmd_indptr_Offset_0 4bytes +Thu 14:58: INFO : 8d Lin1dAddrGen_addrgen_cmd_values_Addr_En 1bytes +Thu 14:58: INFO : 8e Lin1dAddrGen_addrgen_cmd_values_CmdSize 1bytes +Thu 14:58: INFO : 8f Lin1dAddrGen_addrgen_cmd_values_BlockSize_X 5bytes +Thu 14:58: INFO : 94 Lin1dAddrGen_addrgen_cmd_values_Wrap_X 5bytes +Thu 14:58: INFO : 99 Lin1dAddrGen_addrgen_cmd_values_Start_X_Addr 4bytes +Thu 14:58: INFO : 9d Lin1dAddrGen_addrgen_cmd_values_Offset_0 4bytes +Thu 14:58: INFO : a1 dbg_stall_vector 1bytes +Thu 14:58: INFO : a2 totalCycles 4bytes +Thu 14:58: INFO : a6 nRows 4bytes +Thu 14:58: INFO : aa io_reductionOut_force_disabled 1bytes +Thu 14:58: INFO : ab io_reductionIn_force_disabled 1bytes +Thu 14:58: INFO : ac run_cycle_count 6bytes +Thu 14:58: INFO : b2 current_run_cycle_count 6bytes +Thu 14:58: INFO : b8 dbg_ctld_empty 1bytes +Thu 14:58: INFO : b9 dbg_ctld_almost_empty 1bytes +Thu 14:58: INFO : ba dbg_ctld_done 1bytes +Thu 14:58: INFO : bb dbg_ctld_read 1bytes +Thu 14:58: INFO : bc dbg_ctld_request 1bytes +Thu 14:58: INFO : bd dbg_flush_start 1bytes +Thu 14:58: INFO : be dbg_full_level 2bytes +Thu 14:58: INFO : c0 dbg_flush_start_level 2bytes +Thu 14:58: INFO : c2 dbg_done_out 1bytes +Thu 14:58: INFO : c3 dbg_flushing 1bytes +Thu 14:58: INFO : c4 dbg_fill_level 2bytes +Thu 14:58: INFO : c6 dbg_flush_level 2bytes +Thu 14:58: INFO : c8 dbg_ctld_read_pipe_dbg 1bytes +Thu 14:58: INFO : c9 dbg_out_valid 1bytes +Thu 14:58: INFO : ca dbg_out_stall 1bytes +Thu 14:58: INFO : cb dbg_stall_vector 1bytes +Thu 14:58: INFO : cc io_paddingOut_force_disabled 1bytes +Thu 14:58: INFO : cd nInputs 4bytes +Thu 14:58: INFO : d1 io_paddingIn_force_disabled 1bytes +Thu 14:58: INFO : d2 run_cycle_count 6bytes +Thu 14:58: INFO : d8 current_run_cycle_count 6bytes +Thu 14:58: INFO : de dbg_ctld_empty 1bytes +Thu 14:58: INFO : df dbg_ctld_almost_empty 1bytes +Thu 14:58: INFO : e0 dbg_ctld_done 1bytes +Thu 14:58: INFO : e1 dbg_ctld_read 1bytes +Thu 14:58: INFO : e2 dbg_ctld_request 1bytes +Thu 14:58: INFO : e3 dbg_flush_start 1bytes +Thu 14:58: INFO : e4 dbg_full_level 1bytes +Thu 14:58: INFO : e5 dbg_flush_start_level 1bytes +Thu 14:58: INFO : e6 dbg_done_out 1bytes +Thu 14:58: INFO : e7 dbg_flushing 1bytes +Thu 14:58: INFO : e8 dbg_fill_level 1bytes +Thu 14:58: INFO : e9 dbg_flush_level 1bytes +Thu 14:58: INFO : ea dbg_ctld_read_pipe_dbg 1bytes +Thu 14:58: INFO : eb dbg_out_valid 1bytes +Thu 14:58: INFO : ec dbg_out_stall 1bytes +Thu 14:58: INFO : ed dynpcie_sth0_sth_compl_fifo_flags 1bytes +Thu 14:58: INFO : ee MemoryControllerPro_reg_no_rdstreams 1bytes +Thu 14:58: INFO : ef MemoryControllerPro_reg_no_wrstreams 1bytes +Thu 14:58: INFO : f0 MemoryControllerPro_phy_init_done 1bytes +Thu 14:58: INFO : f1 MemoryControllerPro_MemCtrl_Idle 1bytes +Thu 14:58: INFO : f2 MemoryControllerPro_MemCmd_QEmpty 1bytes +Thu 14:58: INFO : f3 MemoryControllerPro_MemCmd_QFull 1bytes +Thu 14:58: INFO : f4 MemoryControllerPro_Time 4bytes +Thu 14:58: INFO : f8 MemoryControllerPro_IdleTime 4bytes +Thu 14:58: INFO : fc MemoryControllerPro_INT_Sent 1bytes +Thu 14:58: INFO : fd MemoryControllerPro_TAG_Seen 1bytes +Thu 14:58: INFO : fe MemoryControllerPro_CMD_Counter0 4bytes +Thu 14:58: INFO : 102 MemoryControllerPro_Data_Counter0 4bytes +Thu 14:58: INFO : 106 MemoryControllerPro_CMD_Counter1 4bytes +Thu 14:58: INFO : 10a MemoryControllerPro_Data_Counter1 4bytes +Thu 14:58: INFO : 10e MemoryControllerPro_CMD_Counter2 4bytes +Thu 14:58: INFO : 112 MemoryControllerPro_Data_Counter2 4bytes +Thu 14:58: INFO : 116 MemoryControllerPro_Corrected_Errors 4bytes +Thu 14:58: INFO : 11a MemoryControllerPro_UnCorrected_Errors 4bytes +Thu 14:58: INFO : 11e MemoryControllerPro_Disable_DaemonCount 1bytes +Thu 14:58: INFO : 11f MemoryControllerPro_Int_Enable_AND 1bytes +Thu 14:58: INFO : 120 MemoryControllerPro_Int_Disable_OR 1bytes +Thu 14:58: INFO : 121 MemoryControllerPro_Debug_Reset 1bytes +Thu 14:58: INFO : 122 MemoryControllerPro_Arb_Control 1bytes +Thu 14:58: INFO : 123 clock_counters_base_clock_cclk 2bytes +Thu 14:58: INFO : 125 clock_counters_STREAM 2bytes +Thu 14:58: INFO : 127 clock_counters_mem_clk0 2bytes +Thu 14:58: INFO : 129 clock_counters_clk_pcie 2bytes +Thu 14:58: INFO : 12b seen_reset_reset_n 1bytes +Thu 14:58: INFO : 12c seen_reset_mem_rst0 1bytes +Thu 14:58: INFO : 12d seen_reset_STREAM_rst 1bytes +Thu 14:58: INFO : 12e seen_reset_STREAM_rst_delay 1bytes +Thu 14:58: INFO : 12f seen_reset_PCIE_rst 1bytes +Thu 14:58: INFO : 130 seen_reset_PCIE_rst_delay 1bytes +Thu 14:58: INFO : 131 seen_toggle_crash_input 1bytes +Thu 14:58: INFO : Mapped register chain length = 306 +Thu 14:58: INFO : Mapped memory report: +Thu 14:58: INFO : Memory 'MappedClockControl.STREAM_CLKPRIM' @ 4063232 +Thu 14:58: INFO : Memory 'MappedDRP.CHECKSUM' @ 3932160 +Thu 14:58: INFO : Memory 'Monitoring.PERFMONITOR' @ 3866624 +Thu 14:58: INFO : Not deleting directory (does not exist): tmp +Thu 14:58: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altfp_add_sub -f:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce.txt MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce.vhd > qmegawiz.log +Thu 14:58: INFO : Not deleting directory (does not exist): tmp +Thu 14:58: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altfp_add_sub -f:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce.txt MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce.vhd > qmegawiz.log +Thu 14:58: INFO : Not deleting directory (does not exist): tmp +Thu 14:58: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altfp_mult -f:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce.txt MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce.vhd > qmegawiz.log +Thu 14:58: INFO : ERROR: ld.so: object '/vol/cc/opt/maxeler/maxcompiler-2013.2.2/lib/maxeleros-sim/lib/libmaxeleros.so' from LD_PRELOAD cannot be preloaded: ignored. +Thu 14:58: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:58: INFO : All asynchronous jobs are now completed. +Thu 14:59: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... +Thu 14:59: INFO : All asynchronous jobs are now completed. +Thu 14:59: PROGRESS: Running back-end build (10 phases) +Thu 14:59: PROGRESS: (1/10) - Prepare MaxFile Data (GenerateMaxFileDataFile) +Thu 14:59: INFO : Build pass 'GenerateMaxFileDataFile' took 186.442 ms. +Thu 14:59: PROGRESS: (2/10) - Prepare for Placement (QuartusMap) +Thu 14:59: INFO : Starting quartus_map. (14:59:01 10/09/15) +Thu 14:59: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; quartus_map MAX4MAIAPeripheryTop --64bit --parallel=1 +Thu 14:59: INFO : Info: ******************************************************************* +Thu 14:59: INFO : Info: Running Quartus II 64-Bit Analysis & Synthesis +Thu 14:59: INFO : Info: Version 13.0.0 Build 156 04/24/2013 SJ Full Version +Thu 14:59: INFO : Info: Copyright (C) 1991-2013 Altera Corporation. All rights reserved. +Thu 14:59: INFO : Info: Your use of Altera Corporation's design tools, logic functions +Thu 14:59: INFO : Info: and other software and tools, and its AMPP partner logic +Thu 14:59: INFO : Info: functions, and any output files from any of the foregoing +Thu 14:59: INFO : Info: (including device programming or simulation files), and any +Thu 14:59: INFO : Info: associated documentation or information are expressly subject +Thu 14:59: INFO : Info: to the terms and conditions of the Altera Program License +Thu 14:59: INFO : Info: Subscription Agreement, Altera MegaCore Function License +Thu 14:59: INFO : Info: Agreement, or other applicable license agreement, including, +Thu 14:59: INFO : Info: without limitation, that your use is for the sole purpose of +Thu 14:59: INFO : Info: programming logic devices manufactured by Altera and sold by +Thu 14:59: INFO : Info: Altera or its authorized distributors. Please refer to the +Thu 14:59: INFO : Info: applicable agreement for further details. +Thu 14:59: INFO : Info: Processing started: Thu Sep 10 14:59:04 2015 +Thu 14:59: INFO : Info: Command: quartus_map MAX4MAIAPeripheryTop --parallel=1 +Thu 14:59: INFO : Info (12021): Found 6 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/altera_primitives.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: dff_ce_asyncsr-altera +Thu 14:59: INFO : Info (12022): Found design unit 2: dff_ce_syncsr-altera +Thu 14:59: INFO : Info (12022): Found design unit 3: dff_ce_syncsr_ne-altera +Thu 14:59: INFO : Info (12023): Found entity 1: dff_ce_asyncsr +Thu 14:59: INFO : Info (12023): Found entity 2: dff_ce_syncsr +Thu 14:59: INFO : Info (12023): Found entity 3: dff_ce_syncsr_ne +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/rg_buffer_sfh.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: rg_buffer_sfh-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: rg_buffer_sfh +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/rg_buffer_info.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: rg_buffer_info-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: rg_buffer_info +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/posted_credits_fifo.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: posted_credits_fifo-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: posted_credits_fifo +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_3_16_3_aclr_fwft.vhdl(101) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_3_16_3_aclr_fwft.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_3_16_3_aclr_fwft-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_3_16_3_aclr_fwft +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/rg_buffer_sth.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: rg_buffer_sth-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: rg_buffer_sth +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/rg_buffer_info_sth.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: rg_buffer_info_sth-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: rg_buffer_info_sth +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/sth_compl_fifo_debug.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: sth_compl_fifo_debug-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: sth_compl_fifo_debug +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of.vhdl(106) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../compl_fifo.vhdl(104) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/compl_fifo.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: compl_fifo-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: compl_fifo +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../pcie_tx_fifo.vhdl(104) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_tx_fifo.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_tx_fifo-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: pcie_tx_fifo +Thu 14:59: INFO : Info (12021): Found 2 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/cross_clock_pkg.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: cross_clock_pkg +Thu 14:59: INFO : Info (12022): Found design unit 2: cross_clock_pkg-body +Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/strobe_to_strobe.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: strobe_to_strobe_prim-altera +Thu 14:59: INFO : Info (12022): Found design unit 2: strobe_to_strobe-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: strobe_to_strobe_prim +Thu 14:59: INFO : Info (12023): Found entity 2: strobe_to_strobe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max4_cpld_flash_if/max4_cpld_flash_if.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: max4_cpld_flash_if-struct +Thu 14:59: INFO : Info (12023): Found entity 1: max4_cpld_flash_if +Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/basic_synchroniser/basic_synchroniser.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: basic_synchroniser_prim-altera +Thu 14:59: INFO : Info (12022): Found design unit 2: basic_synchroniser-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: basic_synchroniser_prim +Thu 14:59: INFO : Info (12023): Found entity 2: basic_synchroniser +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_events/max_events.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: max_events-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: max_events +Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/level_synchroniser/level_synchroniser.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: level_synchroniser_prim-altera +Thu 14:59: INFO : Info (12022): Found design unit 2: level_synchroniser-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: level_synchroniser_prim +Thu 14:59: INFO : Info (12023): Found entity 2: level_synchroniser +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max4_cpld_ioexpand/max4_cpld_ioexpand.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: max4_cpld_ioexpand-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: max4_cpld_ioexpand +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_xcvr_reconfig_SV.quartus.v +Thu 14:59: INFO : Info (12023): Found entity 1: pcie_xcvr_reconfig_SV +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV.v +Thu 14:59: INFO : Info (12023): Found entity 1: pcie_reconfig_SV +Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_xcvr_functions.sv +Thu 14:59: INFO : Info (12022): Found design unit 1: altera_xcvr_functions (SystemVerilog) (pcie_reconfig_SV) +Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_h.sv +Thu 14:59: INFO : Info (12022): Found design unit 1: sv_xcvr_h (SystemVerilog) (pcie_reconfig_SV) +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_resync.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_resync +Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_h.sv +Thu 14:59: INFO : Info (12022): Found design unit 1: alt_xcvr_reconfig_h (SystemVerilog) (pcie_reconfig_SV) +Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_dfe_cal_sweep_h.sv +Thu 14:59: INFO : Info (12022): Found design unit 1: sv_xcvr_dfe_cal_sweep_h (SystemVerilog) (pcie_reconfig_SV) +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cal_seq.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cal_seq +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_cif.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_cif +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_uif.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_uif +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_basic_acq.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_basic_acq +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_analog.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_analog +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_analog_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_analog_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_analog_datactrl.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_analog_datactrl +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_analog_rmw.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_analog_rmw +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_analog_ctrlsm.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_analog_ctrlsm +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_offset_cancellation.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_offset_cancellation +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_offset_cancellation_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_offset_cancellation_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_eyemon.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_eyemon +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_eyemon_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_eyemon_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_eyemon_ctrl_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_eyemon_ctrl_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_eyemon_ber_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_eyemon_ber_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/ber_reader_dcfifo.v +Thu 14:59: INFO : Info (12023): Found entity 1: ber_reader_dcfifo +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/step_to_mon_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: step_to_mon_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/mon_to_step_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: mon_to_step_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_reg_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_reg_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_cal_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_cal_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_cal_sweep_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_cal_sweep_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_cal_sweep_datapath_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_cal_sweep_datapath_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_oc_cal_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_oc_cal_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_pi_phase_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_pi_phase_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_step_to_mon_en_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_step_to_mon_en_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_adapt_tap_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_adapt_tap_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_ctrl_mux_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_ctrl_mux_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_local_reset_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_local_reset_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_cal_sim_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_cal_sim_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_adapt_tap_sim_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_adapt_tap_sim_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_adce.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_adce +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_adce_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_adce_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_adce_datactrl_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_adce_datactrl_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_sv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_cal.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_cal +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_control.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_control +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_datapath.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_pll_reset.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_pll_reset +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_eye_width.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_eye_width +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_align_clk.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_align_clk +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_get_sum.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_get_sum +Thu 14:59: INFO : Info (12021): Found 0 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_cal_sim_model.sv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_mif.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_mif +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_mif.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_mif +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_mif_ctrl.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_mif_ctrl +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_mif_avmm.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_mif_avmm +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_pll.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_pll +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_pll.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_pll +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_pll_ctrl.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_pll_ctrl +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_soc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_soc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_ram.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_ram +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_direct.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_direct +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_l2p_addr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_l2p_addr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_l2p_ch.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_l2p_ch +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_l2p_rom.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_l2p_rom +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_lif_csr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_lif_csr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_lif.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_lif +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_basic.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_basic +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_arbiter_acq.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_arbiter_acq +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_basic.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_basic +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_arbiter.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_arbiter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_m2s.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_m2s +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_wait_generate.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_wait_generate +Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_csr_selector.sv +Thu 14:59: INFO : Info (12023): Found entity 1: csr_mux +Thu 14:59: INFO : Info (12023): Found entity 2: csr_indexed_write_mux +Thu 14:59: INFO : Info (12023): Found entity 3: csr_indexed_read_only_reg +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_reconfig_bundle_to_basic.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_reconfig_bundle_to_basic +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu +Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_reconfig_cpu.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module +Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module +Thu 14:59: INFO : Info (12023): Found entity 3: alt_xcvr_reconfig_cpu_reconfig_cpu +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_master_translator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_translator +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_slave_translator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_translator +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_master_agent.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_agent +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_slave_agent.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_agent +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_burst_uncompressor.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_burst_uncompressor +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_avalon_sc_fifo.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_avalon_sc_fifo +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_addr_router.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_addr_router_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_addr_router +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_addr_router_001.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_addr_router_001_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_addr_router_001 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_id_router.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_id_router_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_id_router +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_id_router_001.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_id_router_001_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_id_router_001 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_reset_controller.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_controller +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_reset_synchronizer.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_synchronizer +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_cmd_xbar_demux.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_cmd_xbar_demux +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_cmd_xbar_demux_001.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_cmd_xbar_demux_001 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_arbitrator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_arbitrator +Thu 14:59: INFO : Info (12023): Found entity 2: altera_merlin_arb_adder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_cmd_xbar_mux.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_cmd_xbar_mux +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_rsp_xbar_mux.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_rsp_xbar_mux +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_irq_mapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_irq_mapper +Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1/MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh-RTL +Thu 14:59: INFO : Info (12022): Found design unit 2: mwaltclkctrl_quartusv13_0_0_gclk_numclk_1-RTL +Thu 14:59: INFO : Info (12023): Found entity 1: MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh +Thu 14:59: INFO : Info (12023): Found entity 2: MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_SV_hard_ip-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: pcie_SV_hard_ip +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altpcie_sv_hip_ast_hwtcl.v +Thu 14:59: INFO : Info (12023): Found entity 1: altpcie_sv_hip_ast_hwtcl +Thu 14:59: INFO : Info (12021): Found 7 design units, including 7 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altpcie_hip_256_pipen1b.v +Thu 14:59: INFO : Info (12023): Found entity 1: altpcie_hip_256_pipen1b +Thu 14:59: INFO : Info (12023): Found entity 2: altpcie_hip_bitsync2 +Thu 14:59: INFO : Info (12023): Found entity 3: altpcie_hip_bitsync +Thu 14:59: INFO : Info (12023): Found entity 4: altpcie_hip_vecsync2 +Thu 14:59: INFO : Info (12023): Found entity 5: altpcie_hip_vecsync +Thu 14:59: INFO : Info (12023): Found entity 6: hd_altpe3_hip_eq_bypass_ph3 +Thu 14:59: INFO : Info (12023): Found entity 7: hip_eq_dprio +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altpcie_rs_serdes.v +Thu 14:59: INFO : Info (12023): Found entity 1: altpcie_rs_serdes +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altpcie_rs_hip.v +Thu 14:59: INFO : Info (12023): Found entity 1: altpcie_rs_hip +Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altera_xcvr_functions.sv +Thu 14:59: INFO : Info (12022): Found design unit 1: altera_xcvr_functions (SystemVerilog) (pcie_SV_hard_ip) +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_pcs.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_pcs +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_pcs_ch.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_pcs_ch +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_pma.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_pma +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_reconfig_bundle_to_xcvr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_reconfig_bundle_to_xcvr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_reconfig_bundle_to_ip.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_reconfig_bundle_to_ip +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_reconfig_bundle_merger.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_reconfig_bundle_merger +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_rx_pma.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_rx_pma +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_tx_pma.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_tx_pma +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_tx_pma_ch.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_tx_pma_ch +Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_h.sv +Thu 14:59: INFO : Info (12022): Found design unit 1: sv_xcvr_h (SystemVerilog) (pcie_SV_hard_ip) +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_avmm_csr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_avmm_csr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_avmm_dcd.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_avmm_dcd +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_avmm.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_avmm +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_data_adapter.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_data_adapter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_native.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_native +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_plls.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_plls +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/alt_xcvr_resync.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_resync +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_10g_rx_pcs_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_10g_rx_pcs_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_10g_tx_pcs_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_10g_tx_pcs_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_8g_rx_pcs_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_8g_rx_pcs_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_8g_tx_pcs_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_8g_tx_pcs_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_8g_pcs_aggregate_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_8g_pcs_aggregate_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_common_pcs_pma_interface_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_common_pcs_pma_interface_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_common_pld_pcs_interface_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_common_pld_pcs_interface_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_pipe_gen1_2_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_pipe_gen1_2_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_pipe_gen3_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_pipe_gen3_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_rx_pcs_pma_interface_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_rx_pcs_pma_interface_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_rx_pld_pcs_interface_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_rx_pld_pcs_interface_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_tx_pcs_pma_interface_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_tx_pcs_pma_interface_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_tx_pld_pcs_interface_rbc.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_tx_pld_pcs_interface_rbc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_emsip_adapter.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_emsip_adapter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_pipe_native.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_pipe_native +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q_wrap.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: ddr3_72_800_sl_u_q_wrap-RTL +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_wrap +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_0002.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_0002 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_c0.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_c0 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_mm_st_converter.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_mm_st_converter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_addr_cmd.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_addr_cmd +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_addr_cmd_wrap.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_addr_cmd_wrap +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ddr2_odt_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ddr2_odt_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ddr3_odt_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ddr3_odt_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_lpddr2_addr_cmd.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_lpddr2_addr_cmd +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_odt_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_odt_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_rdwr_data_tmg.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rdwr_data_tmg +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_arbiter.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_arbiter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_burst_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_burst_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_cmd_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_cmd_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_csr.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_csr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_buffer.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_buffer +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_buffer_manager.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_buffer_manager +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_burst_tracking.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_burst_tracking +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_dataid_manager.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_dataid_manager +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_fifo.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_fifo +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_list.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_list +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_rdata_path.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rdata_path +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_wdata_path.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_wdata_path +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_decoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder +Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_decoder_32_syn.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder_32_decode +Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_decoder_32_altecc_decoder +Thu 14:59: INFO : Info (12023): Found entity 3: alt_mem_ddrx_ecc_decoder_32 +Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_decoder_64_syn.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder_64_decode +Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_decoder_64_altecc_decoder +Thu 14:59: INFO : Info (12023): Found entity 3: alt_mem_ddrx_ecc_decoder_64 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_encoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_encoder_32_syn.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_32_altecc_encoder +Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_encoder_32 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_encoder_64_syn.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_64_altecc_encoder +Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_encoder_64 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_encoder_decoder_wrapper.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_decoder_wrapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_axi_st_converter.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_axi_st_converter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_input_if.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_input_if +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_rank_timer.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rank_timer +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_sideband.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_sideband +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_tbp.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_tbp +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_timing_param.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_timing_param +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_controller.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_controller +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_controller_st_top.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_controller_st_top +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_if_nextgen_ddr3_controller_core.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_if_nextgen_ddr3_controller_core +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_slave_agent.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_agent +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_slave_translator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_translator +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_jumplogic.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_jumplogic +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_data_broadcast.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_data_broadcast +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_avalon_sc_fifo.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_avalon_sc_fifo +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_siii_wrapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_siii_wrapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_phy_mgr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_phy_mgr +Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module +Thu 14:59: INFO : Info (12023): Found entity 2: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module +Thu 14:59: INFO : Info (12023): Found entity 3: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_inst_ROM_no_ifdef_params.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_inst_ROM_no_ifdef_params +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_sv_phase_decode.v +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_sv_phase_decode +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_lfsr72.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr72 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_master_agent.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_agent +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_lfsr36.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr36 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_rsp_xbar_mux.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_rsp_xbar_mux +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_reset_synchronizer.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_synchronizer +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_id_router.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_id_router_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_sl_u_q_s0_id_router +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_cmd_xbar_demux_001.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_cmd_xbar_demux_001 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_addr_router_001.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_addr_router_001_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_sl_u_q_s0_addr_router_001 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_data_decoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_data_decoder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ddr3.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ddr3 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_mgr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_mgr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ac_ROM_no_ifdef_params.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ac_ROM_no_ifdef_params +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_data_mgr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_data_mgr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_rsp_xbar_demux_003.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_rsp_xbar_demux_003 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_siii_phase_decode.v +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_siii_phase_decode +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_id_router_003.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_id_router_003_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_sl_u_q_s0_id_router_003 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ram.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ram +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ram_csr.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ram_csr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_pattern_fifo.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_pattern_fifo +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ac_ROM_reg.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ac_ROM_reg +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_reg_file.v +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_reg_file +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_reset_controller.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_controller +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_core.sv +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_core +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_irq_mapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_irq_mapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_reg_file.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_reg_file +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_acv_wrapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_acv_wrapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_acv_phase_decode.v +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_acv_phase_decode +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_lfsr12.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr12 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_dm_decoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_dm_decoder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_inst_ROM_reg.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_inst_ROM_reg +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_master_translator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_translator +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_cmd_xbar_demux.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_cmd_xbar_demux +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_arbitrator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_arbitrator +Thu 14:59: INFO : Info (12023): Found entity 2: altera_merlin_arb_adder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_mem_if_sequencer_mem_no_ifdef_params.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_mem_no_ifdef_params +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_datamux.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_datamux +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_generic.sv +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_generic +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_addr_router.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_addr_router_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_sl_u_q_s0_addr_router +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_write_decoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_write_decoder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_burst_uncompressor.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_burst_uncompressor +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_read_datapath.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_read_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_sv_wrapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_sv_wrapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_bitcheck.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_bitcheck +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_di_buffer.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_di_buffer +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_di_buffer_wrap.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_di_buffer_wrap +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/afi_mux_ddr3_ddrx_use_shadow_regs.v +Thu 14:59: INFO : Info (12023): Found entity 1: afi_mux_ddr3_ddrx_use_shadow_regs +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_clock_pair_generator.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_clock_pair_generator +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_read_valid_selector.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_read_valid_selector +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_addr_cmd_datapath.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_addr_cmd_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_reset.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_reset +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_acv_ldc.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_acv_ldc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_memphy.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_memphy +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_reset_sync.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_reset_sync +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_new_io_pads.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_new_io_pads +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_fr_cycle_shifter.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_fr_cycle_shifter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_fr_cycle_extender.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_fr_cycle_extender +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_read_datapath.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_read_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_write_datapath.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_write_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_core_shadow_registers.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_core_shadow_registers +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_simple_ddio_out.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_simple_ddio_out +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_phy_csr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_phy_csr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_iss_probe.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_iss_probe +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_read_fifo_hard.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_read_fifo_hard +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_altdqdqs.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_altdqdqs +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altdq_dqs2_stratixv_use_shadow_regs.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altdq_dqs2_stratixv_use_shadow_regs +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q_wrap.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: ddr3_72_800_m_u_q_wrap-RTL +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_wrap +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_0002.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_0002 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_dll_stratixv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_dll_stratixv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_oct_stratixv.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_oct_stratixv +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_c0.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_c0 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_mm_st_converter.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_mm_st_converter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_addr_cmd.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_addr_cmd +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_addr_cmd_wrap.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_addr_cmd_wrap +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ddr2_odt_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ddr2_odt_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ddr3_odt_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ddr3_odt_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_lpddr2_addr_cmd.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_lpddr2_addr_cmd +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_odt_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_odt_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_rdwr_data_tmg.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rdwr_data_tmg +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_arbiter.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_arbiter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_burst_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_burst_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_cmd_gen.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_cmd_gen +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_csr.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_csr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_buffer.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_buffer +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_buffer_manager.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_buffer_manager +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_burst_tracking.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_burst_tracking +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_dataid_manager.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_dataid_manager +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_fifo.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_fifo +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_list.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_list +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_rdata_path.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rdata_path +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_wdata_path.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_wdata_path +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_decoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder +Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_decoder_32_syn.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder_32_decode +Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_decoder_32_altecc_decoder +Thu 14:59: INFO : Info (12023): Found entity 3: alt_mem_ddrx_ecc_decoder_32 +Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_decoder_64_syn.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder_64_decode +Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_decoder_64_altecc_decoder +Thu 14:59: INFO : Info (12023): Found entity 3: alt_mem_ddrx_ecc_decoder_64 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_encoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_encoder_32_syn.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_32_altecc_encoder +Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_encoder_32 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_encoder_64_syn.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_64_altecc_encoder +Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_encoder_64 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_encoder_decoder_wrapper.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_decoder_wrapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_axi_st_converter.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_axi_st_converter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_input_if.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_input_if +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_rank_timer.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rank_timer +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_sideband.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_sideband +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_tbp.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_tbp +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_timing_param.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_timing_param +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_controller.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_controller +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_controller_st_top.v +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_controller_st_top +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_if_nextgen_ddr3_controller_core.sv +Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_if_nextgen_ddr3_controller_core +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_slave_agent.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_agent +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_slave_translator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_translator +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_jumplogic.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_jumplogic +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_data_broadcast.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_data_broadcast +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_avalon_sc_fifo.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_avalon_sc_fifo +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_siii_wrapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_siii_wrapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_phy_mgr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_phy_mgr +Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module +Thu 14:59: INFO : Info (12023): Found entity 2: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module +Thu 14:59: INFO : Info (12023): Found entity 3: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_rsp_xbar_mux.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_rsp_xbar_mux +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_inst_ROM_no_ifdef_params.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_inst_ROM_no_ifdef_params +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_sv_phase_decode.v +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_sv_phase_decode +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_rsp_xbar_demux_003.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_rsp_xbar_demux_003 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_lfsr72.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr72 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_addr_router_001.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_addr_router_001_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_m_u_q_s0_addr_router_001 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_master_agent.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_agent +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_lfsr36.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr36 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_reset_synchronizer.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_synchronizer +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_addr_router.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_addr_router_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_m_u_q_s0_addr_router +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_data_decoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_data_decoder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ddr3.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ddr3 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_mgr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_mgr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ac_ROM_no_ifdef_params.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ac_ROM_no_ifdef_params +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_data_mgr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_data_mgr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_siii_phase_decode.v +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_siii_phase_decode +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ram.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ram +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ram_csr.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ram_csr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_pattern_fifo.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_pattern_fifo +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ac_ROM_reg.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ac_ROM_reg +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_reg_file.v +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_reg_file +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_reset_controller.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_controller +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_core.sv +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_core +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_reg_file.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_reg_file +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_acv_wrapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_acv_wrapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_irq_mapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_irq_mapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_acv_phase_decode.v +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_acv_phase_decode +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_id_router.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_id_router_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_m_u_q_s0_id_router +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_lfsr12.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr12 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_dm_decoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_dm_decoder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_inst_ROM_reg.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_inst_ROM_reg +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_master_translator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_translator +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_id_router_003.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_id_router_003_default_decode +Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_m_u_q_s0_id_router_003 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_cmd_xbar_demux.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_cmd_xbar_demux +Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_arbitrator.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_arbitrator +Thu 14:59: INFO : Info (12023): Found entity 2: altera_merlin_arb_adder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_sequencer_mem_no_ifdef_params.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_mem_no_ifdef_params +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_datamux.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_datamux +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_generic.sv +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_generic +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_write_decoder.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_write_decoder +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_cmd_xbar_demux_001.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_cmd_xbar_demux_001 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_burst_uncompressor.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_burst_uncompressor +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_read_datapath.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_read_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_sv_wrapper.sv +Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_sv_wrapper +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_bitcheck.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_bitcheck +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_di_buffer.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_di_buffer +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_di_buffer_wrap.v +Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_di_buffer_wrap +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/afi_mux_ddr3_ddrx_use_shadow_regs.v +Thu 14:59: INFO : Info (12023): Found entity 1: afi_mux_ddr3_ddrx_use_shadow_regs +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_clock_pair_generator.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_clock_pair_generator +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_read_valid_selector.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_read_valid_selector +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_addr_cmd_datapath.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_addr_cmd_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_reset.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_reset +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_acv_ldc.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_acv_ldc +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_memphy.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_memphy +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_reset_sync.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_reset_sync +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_new_io_pads.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_new_io_pads +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_fr_cycle_shifter.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_fr_cycle_shifter +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_fr_cycle_extender.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_fr_cycle_extender +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_read_datapath.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_read_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_write_datapath.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_write_datapath +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_core_shadow_registers.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_core_shadow_registers +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_simple_ddio_out.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_simple_ddio_out +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_phy_csr.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_phy_csr +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_iss_probe.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_iss_probe +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_read_fifo_hard.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_read_fifo_hard +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0 +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_altdqdqs.v +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_altdqdqs +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altdq_dqs2_stratixv_use_shadow_regs.sv +Thu 14:59: INFO : Info (12023): Found entity 1: altdq_dqs2_stratixv_use_shadow_regs +Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_pll0.sv +Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_pll0 +Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena/MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg-RTL +Thu 14:59: INFO : Info (12022): Found design unit 2: mwaltclkctrl_quartusv13_0_0_auto_numclk_1_ena-RTL +Thu 14:59: INFO : Info (12023): Found entity 1: MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg +Thu 14:59: INFO : Info (12023): Found entity 2: MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena +Thu 14:59: INFO : Info (12021): Found 6 design units, including 6 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/altera_pll_reconfig_top/altera_pll_reconfig_top.quartus.v +Thu 14:59: INFO : Info (12023): Found entity 1: altera_pll_reconfig_top +Thu 14:59: INFO : Info (12023): Found entity 2: self_reset +Thu 14:59: INFO : Info (12023): Found entity 3: dprio_mux +Thu 14:59: INFO : Info (12023): Found entity 4: fpll_dprio_init +Thu 14:59: INFO : Info (12023): Found entity 5: dyn_phase_shift +Thu 14:59: INFO : Info (12023): Found entity 6: generic_lcell_comb +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/reset_control/reset_control.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: reset_control-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: reset_control +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_SV_pcie_rx/max_SV_pcie_rx.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: max_SV_pcie_rx-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: max_SV_pcie_rx +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_SV_pcie_tx/max_SV_pcie_tx.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: max_SV_pcie_tx-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: max_SV_pcie_tx +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_pcie_slave_req_dispatcher/max_pcie_slave_req_dispatcher.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: max_pcie_slave_req_dispatcher-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: max_pcie_slave_req_dispatcher +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_SV_pcie_slave/max_SV_pcie_slave.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: max_SV_pcie_slave-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: max_SV_pcie_slave +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/start_of_day_reset/start_of_day_reset.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: start_of_day_reset-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: start_of_day_reset +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/perf_monitor/perf_monitor.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: perf_monitor-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: perf_monitor +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DoneGen/DoneGen.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: DoneGen-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: DoneGen +Thu 14:59: INFO : Info (12021): Found 2 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/MCP_ECC_Pkg.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: MCP_ECC +Thu 14:59: INFO : Info (12022): Found design unit 2: MCP_ECC-body +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/MemCtrlPro_Altera.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: MemCtrlPro_Altera-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: MemCtrlPro_Altera +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/Async_FIFO_Altera.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: Async_FIFO_Altera-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: Async_FIFO_Altera +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/Sync_FIFO_Altera.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: Sync_FIFO_Altera-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: Sync_FIFO_Altera +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/DualPortRAM_SyncRd_Altera.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: DualPortRAM_SyncRd_Altera-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: DualPortRAM_SyncRd_Altera +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_register/mapped_register.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_register-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: mapped_register +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_register_readable/mapped_register_readable.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_register_readable-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: mapped_register_readable +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_posted_credits_writer/pcie_posted_credits_writer.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_posted_credits_writer-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: pcie_posted_credits_writer +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_slave_streaming_sfh_ring/pcie_slave_streaming_sfh_ring.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_slave_streaming_sfh_ring-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: pcie_slave_streaming_sfh_ring +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_slave_streaming_sth_ring/pcie_slave_streaming_sth_ring.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_slave_streaming_sth_ring-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: pcie_slave_streaming_sth_ring +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/fast_request_arbiter/fast_request_arbiter.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: fast_request_arbiter-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: fast_request_arbiter +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/priority_encoder/priority_encoder.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: priority_encoder-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: priority_encoder +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/write_request_encoder/write_request_encoder.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: write_request_encoder-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: write_request_encoder +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/dualaspectreg_int/dualaspectreg_int.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: dualaspectreg_int-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: dualaspectreg_int +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/dualaspectmuxpipe_mux2/dualaspectmuxpipe_mux2.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: dualaspectmuxpipe_mux2-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: dualaspectmuxpipe_mux2 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/dualaspectmuxpipe_counter/dualaspectmuxpipe_counter.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: dualaspectmuxpipe_counter-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: dualaspectmuxpipe_counter +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/dualaspectmuxpipe_mux4/dualaspectmuxpipe_mux4.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: dualaspectmuxpipe_mux4-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: dualaspectmuxpipe_mux4 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonDesignControl/PhotonDesignControl.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonDesignControl-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonDesignControl +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49/SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SimpleSR/SimpleSR.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SimpleSR-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SimpleSR +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33/SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49/SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 +Thu 14:59: INFO : Info (12021): Found 52 design units, including 26 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_qud-RTL +Thu 14:59: INFO : Info (12022): Found design unit 2: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_02g-RTL +Thu 14:59: INFO : Info (12022): Found design unit 3: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3e8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 4: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 5: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 6: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 7: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3v7-RTL +Thu 14:59: INFO : Info (12022): Found design unit 8: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7-RTL +Thu 14:59: INFO : Info (12022): Found design unit 9: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7-RTL +Thu 14:59: INFO : Info (12022): Found design unit 10: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08-RTL +Thu 14:59: INFO : Info (12022): Found design unit 11: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 12: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_te9-RTL +Thu 14:59: INFO : Info (12022): Found design unit 13: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 14: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_nh8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 15: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 16: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 17: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 18: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9-RTL +Thu 14:59: INFO : Info (12022): Found design unit 19: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_n28-RTL +Thu 14:59: INFO : Info (12022): Found design unit 20: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28-RTL +Thu 14:59: INFO : Info (12022): Found design unit 21: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28-RTL +Thu 14:59: INFO : Info (12022): Found design unit 22: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48-RTL +Thu 14:59: INFO : Info (12022): Found design unit 23: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39-RTL +Thu 14:59: INFO : Info (12022): Found design unit 24: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina-RTL +Thu 14:59: INFO : Info (12022): Found design unit 25: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj-RTL +Thu 14:59: INFO : Info (12022): Found design unit 26: mwfloatingpointunit_quartusv13_0_0_add_sub_11x53to11x53_lat14_add_ce-RTL +Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_qud +Thu 14:59: INFO : Info (12023): Found entity 2: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_02g +Thu 14:59: INFO : Info (12023): Found entity 3: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3e8 +Thu 14:59: INFO : Info (12023): Found entity 4: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8 +Thu 14:59: INFO : Info (12023): Found entity 5: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8 +Thu 14:59: INFO : Info (12023): Found entity 6: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8 +Thu 14:59: INFO : Info (12023): Found entity 7: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3v7 +Thu 14:59: INFO : Info (12023): Found entity 8: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7 +Thu 14:59: INFO : Info (12023): Found entity 9: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7 +Thu 14:59: INFO : Info (12023): Found entity 10: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08 +Thu 14:59: INFO : Info (12023): Found entity 11: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8 +Thu 14:59: INFO : Info (12023): Found entity 12: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_te9 +Thu 14:59: INFO : Info (12023): Found entity 13: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8 +Thu 14:59: INFO : Info (12023): Found entity 14: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_nh8 +Thu 14:59: INFO : Info (12023): Found entity 15: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8 +Thu 14:59: INFO : Info (12023): Found entity 16: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8 +Thu 14:59: INFO : Info (12023): Found entity 17: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8 +Thu 14:59: INFO : Info (12023): Found entity 18: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9 +Thu 14:59: INFO : Info (12023): Found entity 19: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_n28 +Thu 14:59: INFO : Info (12023): Found entity 20: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28 +Thu 14:59: INFO : Info (12023): Found entity 21: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28 +Thu 14:59: INFO : Info (12023): Found entity 22: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48 +Thu 14:59: INFO : Info (12023): Found entity 23: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39 +Thu 14:59: INFO : Info (12023): Found entity 24: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina +Thu 14:59: INFO : Info (12023): Found entity 25: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj +Thu 14:59: INFO : Info (12023): Found entity 26: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_dynamic_offset16/SpmvReductionKernel_dynamic_offset16.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel_dynamic_offset16-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel_dynamic_offset16 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33/SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Linear1DAddressGen/Linear1DAddressGen.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: Linear1DAddressGen-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: Linear1DAddressGen +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49/SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 +Thu 14:59: INFO : Info (12021): Found 52 design units, including 26 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_qud-RTL +Thu 14:59: INFO : Info (12022): Found design unit 2: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_ffb-RTL +Thu 14:59: INFO : Info (12022): Found design unit 3: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3e8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 4: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 5: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 6: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 7: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3v7-RTL +Thu 14:59: INFO : Info (12022): Found design unit 8: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7-RTL +Thu 14:59: INFO : Info (12022): Found design unit 9: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7-RTL +Thu 14:59: INFO : Info (12022): Found design unit 10: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08-RTL +Thu 14:59: INFO : Info (12022): Found design unit 11: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 12: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_te9-RTL +Thu 14:59: INFO : Info (12022): Found design unit 13: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 14: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_nh8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 15: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 16: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 17: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 18: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8-RTL +Thu 14:59: INFO : Info (12022): Found design unit 19: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_n28-RTL +Thu 14:59: INFO : Info (12022): Found design unit 20: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28-RTL +Thu 14:59: INFO : Info (12022): Found design unit 21: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28-RTL +Thu 14:59: INFO : Info (12022): Found design unit 22: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48-RTL +Thu 14:59: INFO : Info (12022): Found design unit 23: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48-RTL +Thu 14:59: INFO : Info (12022): Found design unit 24: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48-RTL +Thu 14:59: INFO : Info (12022): Found design unit 25: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj-RTL +Thu 14:59: INFO : Info (12022): Found design unit 26: mwfloatingpointunit_quartusv13_0_0_add_sub_11x53to11x53_lat10_add_ce-RTL +Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_qud +Thu 14:59: INFO : Info (12023): Found entity 2: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_ffb +Thu 14:59: INFO : Info (12023): Found entity 3: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3e8 +Thu 14:59: INFO : Info (12023): Found entity 4: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8 +Thu 14:59: INFO : Info (12023): Found entity 5: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8 +Thu 14:59: INFO : Info (12023): Found entity 6: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8 +Thu 14:59: INFO : Info (12023): Found entity 7: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3v7 +Thu 14:59: INFO : Info (12023): Found entity 8: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7 +Thu 14:59: INFO : Info (12023): Found entity 9: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7 +Thu 14:59: INFO : Info (12023): Found entity 10: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08 +Thu 14:59: INFO : Info (12023): Found entity 11: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8 +Thu 14:59: INFO : Info (12023): Found entity 12: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_te9 +Thu 14:59: INFO : Info (12023): Found entity 13: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8 +Thu 14:59: INFO : Info (12023): Found entity 14: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_nh8 +Thu 14:59: INFO : Info (12023): Found entity 15: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8 +Thu 14:59: INFO : Info (12023): Found entity 16: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8 +Thu 14:59: INFO : Info (12023): Found entity 17: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8 +Thu 14:59: INFO : Info (12023): Found entity 18: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8 +Thu 14:59: INFO : Info (12023): Found entity 19: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_n28 +Thu 14:59: INFO : Info (12023): Found entity 20: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28 +Thu 14:59: INFO : Info (12023): Found entity 21: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28 +Thu 14:59: INFO : Info (12023): Found entity 22: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48 +Thu 14:59: INFO : Info (12023): Found entity 23: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48 +Thu 14:59: INFO : Info (12023): Found entity 24: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48 +Thu 14:59: INFO : Info (12023): Found entity 25: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj +Thu 14:59: INFO : Info (12023): Found entity 26: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce +Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce/MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco-RTL +Thu 14:59: INFO : Info (12022): Found design unit 2: mwfloatingpointunit_quartusv13_0_0_mult_11x53to11x53_lat10_ce-RTL +Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco +Thu 14:59: INFO : Info (12023): Found entity 2: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33/SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ConditionalAdd/ConditionalAdd.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: ConditionalAdd-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: ConditionalAdd +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ConditionalAddSubtract/ConditionalAddSubtract.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: ConditionalAddSubtract-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: ConditionalAddSubtract +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49/SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32/SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/TriAdd/TriAdd.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: TriAdd-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: TriAdd +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ManagerStateMachine_readControl/ManagerStateMachine_readControl.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: ManagerStateMachine_readControl-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: ManagerStateMachine_readControl +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ManagerStateMachine_csrDecoder/ManagerStateMachine_csrDecoder.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: ManagerStateMachine_csrDecoder-StateMachine +Thu 14:59: INFO : Info (12023): Found entity 1: ManagerStateMachine_csrDecoder +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/signal_forwarding_adapter/signal_forwarding_adapter.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: signal_forwarding_adapter-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: signal_forwarding_adapter +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/common_packet_parser/common_packet_parser.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: common_packet_parser-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: common_packet_parser +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_memories_adapter/mapped_memories_adapter.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_memories_adapter-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: mapped_memories_adapter +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_memories_controller_core/mapped_memories_controller_core.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_memories_controller_core-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: mapped_memories_controller_core +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_registers_controller/mapped_registers_controller.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_registers_controller-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: mapped_registers_controller +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mec_switch_arbiter/mec_switch_arbiter.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: mec_switch_arbiter-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: mec_switch_arbiter +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_clock_control/mapped_clock_control.quartus.vhd +Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_clock_control-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: mapped_clock_control +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mec_switch_arbiter_i.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: mec_switch_arbiter_i-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: mec_switch_arbiter_i +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedClockControl_id_3e.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedClockControl_id_3e-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedClockControl_id_3e +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/stream_clkprim_lock_count_32.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: stream_clkprim_lock_count_32-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: stream_clkprim_lock_count_32 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SanityBlock_cclk_STREAM_mem_clk0_clk_pcie.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SanityBlock_cclk_STREAM_mem_clk0_clk_pcie-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SanityBlock_cclk_STREAM_mem_clk0_clk_pcie +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_element_switch/mapped_element_switch.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_element_switch-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: mapped_element_switch +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_element_switch/src_to_dst_control.quartus.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: src_to_dst_control-rtl +Thu 14:59: INFO : Info (12023): Found entity 1: src_to_dst_control +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAX4MAIAPeripheryTop.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MAX4MAIAPeripheryTop-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MAX4MAIAPeripheryTop +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAX4CPLDInterface.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MAX4CPLDInterface-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MAX4CPLDInterface +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAXEvents.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MAXEvents-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MAXEvents +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixPCIeBase.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixPCIeBase-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixPCIeBase +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/TransceiverReconfig.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: TransceiverReconfig-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: TransceiverReconfig +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../StratixVHardIPPCIe.vhdl(503) +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../StratixVHardIPPCIe.vhdl(510) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVHardIPPCIe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVHardIPPCIe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixVHardIPPCIe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_6_controller.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_6_controller-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_6_controller +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_5_controller.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_5_controller-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_5_controller +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_4_controller.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_4_controller-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_4_controller +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_3_controller.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_3_controller-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_3_controller +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_2_controller.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_2_controller-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_2_controller +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_1_controller.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_1_controller-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_1_controller +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraClockGenerator_250_100_STREAM.vhdl(107) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraClockGenerator_250_100_STREAM.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraClockGenerator_250_100_STREAM-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraClockGenerator_250_100_STREAM +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../StratixVClockManager_in250_out_f100p0dc50_f100p180dc50.vhdl(276) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVClockManager_in250_out_f100p0dc50_f100p180dc50.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVClockManager_in250_out_f100p0dc50_f100p180dc50-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixVClockManager_in250_out_f100p0dc50_f100p180dc50 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAX4FPGATop.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MAX4FPGATop-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MAX4FPGATop +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraStreamFifo_128_64_128_afv_95_pushin_pushout.vhdl(115) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraStreamFifo_128_64_128_afv_95_pushin_pushout.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraStreamFifo_128_64_128_afv_95_pushin_pushout-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraStreamFifo_128_64_128_afv_95_pushin_pushout +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PCIeEA.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PCIeEA-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PCIeEA +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_34_512_34_dualclock_aclr.vhdl(110) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_34_512_34_dualclock_aclr.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_34_512_34_dualclock_aclr-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_34_512_34_dualclock_aclr +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixPCIeInterface.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StratixPCIeInterface-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StratixPCIeInterface +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAX4PCIeSlaveInterface.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MAX4PCIeSlaveInterface-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MAX4PCIeSlaveInterface +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FPGAWrapperEntity_Manager_Spmv.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FPGAWrapperEntity_Manager_Spmv-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FPGAWrapperEntity_Manager_Spmv +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PerfMonitor.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PerfMonitor-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PerfMonitor +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WideFifoWithLevel_3073_512_16_16_false_792_TO-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WideFifoWithLevel_3073_512_16_16_false_792_TO +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22.vhdl(115) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22.vhdl(115) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WideFifoWithLevel_3072_512_16_16_false_792_FROM-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WideFifoWithLevel_3072_512_16_16_false_792_FROM +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490.vhdl(115) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490.vhdl(115) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DDRAddressBitSwap8GBOpt.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DDRAddressBitSwap8GBOpt-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DDRAddressBitSwap8GBOpt +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedElementAdapterForwarder.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedElementAdapterForwarder-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedElementAdapterForwarder +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PCIeStreaming_2_4.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PCIeStreaming_2_4-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PCIeStreaming_2_4 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PCIeSlaveStreamFromHost.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PCIeSlaveStreamFromHost-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PCIeSlaveStreamFromHost +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PCIeSlaveStreamToHost.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PCIeSlaveStreamToHost-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PCIeSlaveStreamToHost +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SlaveStreamingCreditsBarParser.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SlaveStreamingCreditsBarParser-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SlaveStreamingCreditsBarParser +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SlaveStreamingRingConfigBarParser.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SlaveStreamingRingConfigBarParser-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SlaveStreamingRingConfigBarParser +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemWriteRequestArbiter.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MemWriteRequestArbiter-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MemWriteRequestArbiter +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FastRequestArbiter_req5.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FastRequestArbiter_req5-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FastRequestArbiter_req5 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/TagGenerator.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: TagGenerator-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: TagGenerator +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/RequestEncoder.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: RequestEncoder-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: RequestEncoder +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_128_512_128_aclr_afv448.vhdl(104) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_128_512_128_aclr_afv448.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_128_512_128_aclr_afv448-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_128_512_128_aclr_afv448 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_115_512_115_aclr_fwft.vhdl(101) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_115_512_115_aclr_fwft.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_115_512_115_aclr_fwft-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_115_512_115_aclr_fwft +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ReadComplRequestArbiter.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: ReadComplRequestArbiter-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: ReadComplRequestArbiter +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FastRequestArbiter_req1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FastRequestArbiter_req1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FastRequestArbiter_req1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "keep_hierarchy" at ../../../Manager_Spmv.vhdl(1375) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_80.vhdl(117) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_80.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_80-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_80 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_58.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_58.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_58-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_58 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_55.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_55.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_55-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_55 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_52.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_52.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_52-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_52 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_50.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_50.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_50-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_50 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_46.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_46.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_46-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_46 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_48.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_48.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_48-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_48 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_42.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_42.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_42-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_42 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_44.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_44.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_44-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_44 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_40.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_40.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_40-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_40 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_78.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_78.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_78-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_78 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_36.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_36.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_36-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_36 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_34.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_34.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_34-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_34 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_74.vhdl(119) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_74.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_74-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_74 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_38.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_38.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_38-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_38 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_5.vhdl(113) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_5.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_5-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_5 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_66.vhdl(119) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_66.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_66-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_66 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_72.vhdl(110) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_72.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_72-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_72 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_68.vhdl(117) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_68.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_68-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_68 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_64.vhdl(110) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_64.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_64-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_64 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_70.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_70-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_70 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StreamPullPushAdapter3072.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StreamPullPushAdapter3072-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StreamPullPushAdapter3072 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_61.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_61-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_61 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectReg_64_128.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectReg_64_128-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectReg_64_128 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_17.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_17-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_17 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectCounterPipelined_1536_3072.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectCounterPipelined_1536_3072-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectCounterPipelined_1536_3072 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_31.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_31-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_31 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectMux_128_64_COUNTER_PIPELINED.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectMux_128_64_COUNTER_PIPELINED-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectMux_128_64_COUNTER_PIPELINED +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectCounterPipelined_64_128.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectCounterPipelined_64_128-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectCounterPipelined_64_128 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_14.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_14-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_14 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectReg_128_3072.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectReg_128_3072-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectReg_128_3072 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectMux_128_32_COUNTER_PIPELINED.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectMux_128_32_COUNTER_PIPELINED-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectMux_128_32_COUNTER_PIPELINED +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectCounterPipelined_32_128.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectCounterPipelined_32_128-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectCounterPipelined_32_128 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_output.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_output-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_output +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvPaddingKernel_streamwrapper.vhdl(358) +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvPaddingKernel_streamwrapper.vhdl(359) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel_streamwrapper.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvPaddingKernel_streamwrapper-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvPaddingKernel_streamwrapper +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_20.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_20-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_20 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_19.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_19-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_19 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_18.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_18-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_18 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvPaddingKernel-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvPaddingKernel +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/OutputRegisterEntity_48.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: OutputRegisterEntity_48-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: OutputRegisterEntity_48 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_64_pipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_64_pipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_64_pipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_64.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_64-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_64 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonBitwiseOp_1_Andnopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonBitwiseOp_1_Andnopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonBitwiseOp_1_Andnopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonBitwiseNot_1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonBitwiseNot_1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonBitwiseNot_1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x5.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x5-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x5 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x5_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x5_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x5_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvReductionKernel_streamwrapper.vhdl(341) +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvReductionKernel_streamwrapper.vhdl(342) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_streamwrapper.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel_streamwrapper-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel_streamwrapper +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_17.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_17-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_17 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_16.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_16-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_16 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_ee38d306568098454952bd3e86e61f39.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_ee38d306568098454952bd3e86e61f39-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_ee38d306568098454952bd3e86e61f39 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0.vhdl(82) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvReductionKernel_dynamic_offset16.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvReductionKernel_dynamic_offset16-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvReductionKernel_dynamic_offset16 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x14.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x14-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x14 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x14_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x14_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x14_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_vromLoad.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_vromLoad-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_vromLoad +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_values.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_values-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_values +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_cmd_values_0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_cmd_values_0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_cmd_values_0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Linear1DAddressGen_1_addrgen_cmd_values.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Linear1DAddressGen_1_addrgen_cmd_values-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Linear1DAddressGen_1_addrgen_cmd_values +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_62befbd42223e4c6f7557ca75e01e116.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_62befbd42223e4c6f7557ca75e01e116-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_62befbd42223e4c6f7557ca75e01e116 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_indptr.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_indptr-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_indptr +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_cmd_indptr_0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_cmd_indptr_0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_cmd_indptr_0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Linear1DAddressGen_1_addrgen_cmd_indptr.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Linear1DAddressGen_1_addrgen_cmd_indptr-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Linear1DAddressGen_1_addrgen_cmd_indptr +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_fromcpu.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_fromcpu-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_fromcpu +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_cpu2lmem.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_cpu2lmem-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_cpu2lmem +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_cmd_cpu2lmem_0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_cmd_cpu2lmem_0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_cmd_cpu2lmem_0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Linear1DAddressGen_1_addrgen_cmd_cpu2lmem.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Linear1DAddressGen_1_addrgen_cmd_cpu2lmem-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Linear1DAddressGen_1_addrgen_cmd_cpu2lmem +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_SpmvKernel.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_SpmvKernel-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_SpmvKernel +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvKernel_streamwrapper.vhdl(621) +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvKernel_streamwrapper.vhdl(622) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_streamwrapper.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvKernel_streamwrapper-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvKernel_streamwrapper +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_15.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_15-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_15 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_14.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_14-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_14 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_13.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_13-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_13 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_12.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_12-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_12 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_11.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_11-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_11 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_10.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_10-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_10 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_9.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_9-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_9 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_8.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_8-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_8 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_7.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_7-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_7 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_6.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_6-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_6 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_5.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_5-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_5 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_4.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_4-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_4 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_3.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_3-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_3 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvKernel-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvKernel +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0.vhdl(82) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_64_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_64_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_64_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_64x5.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_64x5-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_64x5 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_64x5_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_64x5_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_64x5_reg1 +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0.vhdl(82) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_64x10.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_64x10-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_64x10 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_64x10_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_64x10_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_64x10_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_3072.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_3072-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_3072 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x10.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x10-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x10 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x10_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x10_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x10_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x1_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x1_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x1_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_1_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_1_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_1_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonBitwiseOp_1_Ornopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonBitwiseOp_1_Ornopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonBitwiseOp_1_Ornopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x11.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x11-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x11 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x11_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x11_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x11_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_32_pipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_32_pipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_32_pipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x18.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x18-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x18 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x18_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x18_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x18_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_32x16.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_32x16-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_32x16 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_32x16_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_32x16_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_32x16_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_32.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_32-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_32 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Pulse_cycles1_initF.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Pulse_cycles1_initF-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Pulse_cycles1_initF +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x40.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x40-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x40 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x80.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x80-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x80 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvCacheKernel_streamwrapper.vhdl(447) +Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvCacheKernel_streamwrapper.vhdl(448) +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_streamwrapper.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvCacheKernel_streamwrapper-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvCacheKernel_streamwrapper +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_2.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_2-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_2 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvCacheKernel-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SpmvCacheKernel +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_32_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_32_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_32_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_32x1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_32x1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_32x1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_32x1_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_32x1_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_32x1_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_3_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_3_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_3_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_3x1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_3x1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_3x1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_3x1_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_3x1_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_3x1_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Pulse_cycles1_initT.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: Pulse_cycles1_initT-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: Pulse_cycles1_initT +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_1536.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_1536-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_1536 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WordLevelShifter_Left_Circular_1_48_6.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: WordLevelShifter_Left_Circular_1_48_6-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: WordLevelShifter_Left_Circular_1_48_6 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_6_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_6_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_6_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_64x1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_64x1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_64x1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_64x1_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_64x1_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_64x1_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonBitwiseOp_1_Andpipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonBitwiseOp_1_Andpipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: PhotonBitwiseOp_1_Andpipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_6x1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_6x1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_6x1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_6x1_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_6x1_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_6x1_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x23.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x23-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x23 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x23_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x23_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x23_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x22.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x22-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x22 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x22_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x22_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x22_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x21.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x21-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x21 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x21_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x21_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x21_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x20.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x20-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x20 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x20_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x20_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x20_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x19.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x19-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x19 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x19_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x19_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x19_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x17.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x17-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x17 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x17_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x17_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x17_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x16.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x16-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x16 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x16_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x16_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x16_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x15.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x15-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x15 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x15_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x15_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x15_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x13.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x13-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x13 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x13_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x13_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x13_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x12.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x12-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x12 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x12_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x12_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x12_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x9.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x9-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x9 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x9_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x9_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x9_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x8.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x8-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x8 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x8_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x8_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x8_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x7.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x7-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x7 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x7_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x7_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x7_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x6.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x6-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x6 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x6_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x6_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x6_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x4.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x4-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x4 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x4_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x4_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x4_reg1 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x3.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x3-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x3 +Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x3_reg1.vhdl +Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x3_reg1-MaxDC +Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x3_reg1 +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x2.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x2-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MultiStageDelay_1x2 +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x2_reg1.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: SRLDelay_1x2_reg1-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: SRLDelay_1x2_reg1 +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_48.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_48-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_48 +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_readControl.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_readControl-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_readControl +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_colptr.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: WrapperNodeIO_colptr-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: WrapperNodeIO_colptr +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_csrDecoder.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_csrDecoder-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_csrDecoder +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_d913f77b396d0027f51d31cc753659b2.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegBlock_d913f77b396d0027f51d31cc753659b2-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegBlock_d913f77b396d0027f51d31cc753659b2 +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedDRP_Addr_3c0000_ChecksumMappedDRP.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedDRP_Addr_3c0000_ChecksumMappedDRP-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedDRP_Addr_3c0000_ChecksumMappedDRP +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ChecksumMappedDRP_RAM.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: ChecksumMappedDRP_RAM-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: ChecksumMappedDRP_RAM +Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "keep_hierarchy" at ../../../SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0.vhdl(219) +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0 +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830 +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SignalForwardingEA.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: SignalForwardingEA-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: SignalForwardingEA +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/CommonPacketParser_SignalForwarding.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: CommonPacketParser_SignalForwarding-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: CommonPacketParser_SignalForwarding +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ControlMux.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: ControlMux-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: ControlMux +Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "keep_hierarchy" at ../../../MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1.vhdl(328) +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1 +Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_36_512_36_dualclock_aclr.vhdl(110) +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_36_512_36_dualclock_aclr.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_36_512_36_dualclock_aclr-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: AlteraFifoEntity_36_512_36_dualclock_aclr +Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_71_512_71_dualclock_aclr.vhdl(110) +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_71_512_71_dualclock_aclr.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_71_512_71_dualclock_aclr-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: AlteraFifoEntity_71_512_71_dualclock_aclr +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedMemoriesEA.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedMemoriesEA-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedMemoriesEA +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/CommonPacketParser_MappedMemories.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: CommonPacketParser_MappedMemories-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: CommonPacketParser_MappedMemories +Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "keep_hierarchy" at ../../../MappedRegistersController_306.vhdl(193) +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegistersController_306.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegistersController_306-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegistersController_306 +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegistersEA.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegistersEA-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegistersEA +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/CommonPacketParser_MappedRegisters.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: CommonPacketParser_MappedRegisters-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: CommonPacketParser_MappedRegisters +Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe.vhdl +Thu 15:00: INFO : Info (12022): Found design unit 1: MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe-MaxDC +Thu 15:00: INFO : Info (12023): Found entity 1: MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe +Thu 15:00: INFO : Warning (10236): Verilog HDL Implicit Net warning at altpcie_hip_256_pipen1b.v(3218): created implicit net for "swdnout" +Thu 15:00: INFO : Warning (10236): Verilog HDL Implicit Net warning at altpcie_hip_256_pipen1b.v(3219): created implicit net for "swupout" +Thu 15:00: INFO : Info (12127): Elaborating entity "MAX4MAIAPeripheryTop" for the top level hierarchy +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1286): object "pciebase_i_sim_pipe_rate" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1287): object "pciebase_i_sim_ltssmstate" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1288): object "pciebase_i_eidleinfersel0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1289): object "pciebase_i_eidleinfersel1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1290): object "pciebase_i_eidleinfersel2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1291): object "pciebase_i_eidleinfersel3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1292): object "pciebase_i_eidleinfersel4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1293): object "pciebase_i_eidleinfersel5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1294): object "pciebase_i_eidleinfersel6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1295): object "pciebase_i_eidleinfersel7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1296): object "pciebase_i_powerdown0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1297): object "pciebase_i_powerdown1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1298): object "pciebase_i_powerdown2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1299): object "pciebase_i_powerdown3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1300): object "pciebase_i_powerdown4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1301): object "pciebase_i_powerdown5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1302): object "pciebase_i_powerdown6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1303): object "pciebase_i_powerdown7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1304): object "pciebase_i_rxpolarity0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1305): object "pciebase_i_rxpolarity1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1306): object "pciebase_i_rxpolarity2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1307): object "pciebase_i_rxpolarity3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1308): object "pciebase_i_rxpolarity4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1309): object "pciebase_i_rxpolarity5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1310): object "pciebase_i_rxpolarity6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1311): object "pciebase_i_rxpolarity7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1312): object "pciebase_i_txcompl0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1313): object "pciebase_i_txcompl1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1314): object "pciebase_i_txcompl2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1315): object "pciebase_i_txcompl3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1316): object "pciebase_i_txcompl4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1317): object "pciebase_i_txcompl5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1318): object "pciebase_i_txcompl6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1319): object "pciebase_i_txcompl7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1320): object "pciebase_i_txdata0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1321): object "pciebase_i_txdata1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1322): object "pciebase_i_txdata2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1323): object "pciebase_i_txdata3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1324): object "pciebase_i_txdata4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1325): object "pciebase_i_txdata5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1326): object "pciebase_i_txdata6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1327): object "pciebase_i_txdata7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1328): object "pciebase_i_txdatak0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1329): object "pciebase_i_txdatak1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1330): object "pciebase_i_txdatak2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1331): object "pciebase_i_txdatak3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1332): object "pciebase_i_txdatak4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1333): object "pciebase_i_txdatak5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1334): object "pciebase_i_txdatak6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1335): object "pciebase_i_txdatak7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1336): object "pciebase_i_txdetectrx0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1337): object "pciebase_i_txdetectrx1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1338): object "pciebase_i_txdetectrx2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1339): object "pciebase_i_txdetectrx3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1340): object "pciebase_i_txdetectrx4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1341): object "pciebase_i_txdetectrx5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1342): object "pciebase_i_txdetectrx6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1343): object "pciebase_i_txdetectrx7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1344): object "pciebase_i_txelecidle0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1345): object "pciebase_i_txelecidle1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1346): object "pciebase_i_txelecidle2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1347): object "pciebase_i_txelecidle3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1348): object "pciebase_i_txelecidle4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1349): object "pciebase_i_txelecidle5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1350): object "pciebase_i_txelecidle6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1351): object "pciebase_i_txelecidle7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1352): object "pciebase_i_txdeemph0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1353): object "pciebase_i_txdeemph1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1354): object "pciebase_i_txdeemph2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1355): object "pciebase_i_txdeemph3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1356): object "pciebase_i_txdeemph4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1357): object "pciebase_i_txdeemph5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1358): object "pciebase_i_txdeemph6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1359): object "pciebase_i_txdeemph7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1360): object "pciebase_i_txswing0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1361): object "pciebase_i_txswing1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1362): object "pciebase_i_txswing2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1363): object "pciebase_i_txswing3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1364): object "pciebase_i_txswing4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1365): object "pciebase_i_txswing5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1366): object "pciebase_i_txswing6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1367): object "pciebase_i_txswing7" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1368): object "pciebase_i_txmargin0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1369): object "pciebase_i_txmargin1" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1370): object "pciebase_i_txmargin2" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1371): object "pciebase_i_txmargin3" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1372): object "pciebase_i_txmargin4" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1373): object "pciebase_i_txmargin5" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1374): object "pciebase_i_txmargin6" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1375): object "pciebase_i_txmargin7" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "MAX4FPGATop" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(956): object "wrapper_pcie_pcie_control_sfh_done" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(958): object "wrapper_pcie_pcie_control_sth_stall" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1029): object "max4pcieslaveinterface_i_flush" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1031): object "max4pcieslaveinterface_i_soft_reset" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1032): object "max4pcieslaveinterface_i_throttle_limit" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1059): object "max4pcieslaveinterface_i_maxring_s_fh" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1060): object "max4pcieslaveinterface_i_maxring_s_set_highz_n" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1061): object "max4pcieslaveinterface_i_maxring_id_fh" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1062): object "max4pcieslaveinterface_i_maxring_id_set_highz_n" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1076): object "max4pcieslaveinterface_i_compl_fifo_flags" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1079): object "max4pcieslaveinterface_i_compute_reset_n" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1086): object "max4pcieslaveinterface_i_local_ifpga_session_key" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1194): object "ftb_archange_mappedelementsswitchpcieea_out_push_done" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1197): object "ftb_mappedelementsswitchpcieea_full" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1199): object "ftb_mappedelementsswitchpcieea_wr_data_count" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "FPGAWrapperEntity_Manager_Spmv" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1008): object "inst_ln11_synchroniser_level_dst" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1009): object "inst_ln11_synchroniser1_level_dst" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1010): object "inst_ln11_synchroniser2_level_dst" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1022): object "inst_ln32_mappedclockcontrol_clkbuf_clksel0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1085): object "signalforwardingadapter_i_port_out_sysmon_reset" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1086): object "signalforwardingadapter_i_port_out_pcc_switch_regs" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1087): object "signalforwardingadapter_i_port_out_pcc_start" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1088): object "signalforwardingadapter_i_port_out_pcc_reset" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1123): object "inst_ln11_synchroniser5_level_dst" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1187): object "inst_ln11_synchroniser10_level_dst" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1188): object "inst_ln11_synchroniser11_level_dst" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1265): object "memctrlpro_maia_sodimms_eos" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "basic_synchroniser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser" +Thu 15:00: INFO : Info (12128): Elaborating entity "basic_synchroniser_prim" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src" +Thu 15:00: INFO : Info (12128): Elaborating entity "dff_ce_asyncsr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src|dff_ce_asyncsr:\g_slice_packing:0:i_sync0" +Thu 15:00: INFO : Info (12128): Elaborating entity "LPM_FF" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src|dff_ce_asyncsr:\g_slice_packing:0:i_sync0|LPM_FF:dff" +Thu 15:00: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src|dff_ce_asyncsr:\g_slice_packing:0:i_sync0|LPM_FF:dff" +Thu 15:00: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src|dff_ce_asyncsr:\g_slice_packing:0:i_sync0|LPM_FF:dff" with the following parameter: +Thu 15:00: INFO : Info (12134): Parameter "LPM_WIDTH" = "1" +Thu 15:00: INFO : Info (12134): Parameter "LPM_AVALUE" = "UNUSED" +Thu 15:00: INFO : Info (12134): Parameter "LPM_SVALUE" = "UNUSED" +Thu 15:00: INFO : Info (12134): Parameter "LPM_PVALUE" = "UNUSED" +Thu 15:00: INFO : Info (12134): Parameter "LPM_FFTYPE" = "DFF" +Thu 15:00: INFO : Info (12134): Parameter "LPM_TYPE" = "DFF" +Thu 15:00: INFO : Info (12134): Parameter "LPM_HINT" = "UNUSED" +Thu 15:00: INFO : Info (12128): Elaborating entity "SanityBlock_cclk_STREAM_mem_clk0_clk_pcie" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SanityBlock_cclk_STREAM_mem_clk0_clk_pcie:SanityBlock_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SanityBlock_cclk_STREAM_mem_clk0_clk_pcie:SanityBlock_i|MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e:MappedRegBlock_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SanityBlock_cclk_STREAM_mem_clk0_clk_pcie:SanityBlock_i|MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e:MappedRegBlock_i|mapped_register_readable:inst_ln484_mappedregblock" +Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SanityBlock_cclk_STREAM_mem_clk0_clk_pcie:SanityBlock_i|MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e:MappedRegBlock_i|mapped_register_readable:inst_ln484_mappedregblock4" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedClockControl_id_3e" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedClockControl_id_3e:inst_ln32_mappedclockcontrol" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedClockControl_id_3e.vhdl(145): object "inst_ln200_mappedclockcontrol_cc_reg_pll_ce" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "stream_clkprim_lock_count_32" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedClockControl_id_3e:inst_ln32_mappedclockcontrol|stream_clkprim_lock_count_32:inst_ln16_plllockinstrumentation" +Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_clock_control" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedClockControl_id_3e:inst_ln32_mappedclockcontrol|mapped_clock_control:inst_ln200_mappedclockcontrol" +Thu 15:00: INFO : Info (12128): Elaborating entity "reset_control" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|reset_control:inst_ln21_resetcontrol" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe:MappedElementSwitch_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_element_switch" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe:MappedElementSwitch_i|mapped_element_switch:MappedElementSwitchExternal_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "mec_switch_arbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe:MappedElementSwitch_i|mapped_element_switch:MappedElementSwitchExternal_i|mec_switch_arbiter:request_source_arbiter" +Thu 15:00: INFO : Info (12128): Elaborating entity "src_to_dst_control" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe:MappedElementSwitch_i|mapped_element_switch:MappedElementSwitchExternal_i|src_to_dst_control:request_source_control" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegistersController_306" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedRegistersController_306.vhdl(168): object "mappedregistersea_i_reserved_0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedRegistersController_306.vhdl(170): object "mappedregistersea_i_is_response_header" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedRegistersController_306.vhdl(172): object "mappedregistersea_i_reserved_1" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegistersEA" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|MappedRegistersEA:MappedRegistersEA_i" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedRegistersEA.vhdl(148): object "commonpacketparser_i_ea_manual_rdy" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "CommonPacketParser_MappedRegisters" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|MappedRegistersEA:MappedRegistersEA_i|CommonPacketParser_MappedRegisters:CommonPacketParser_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "common_packet_parser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|MappedRegistersEA:MappedRegistersEA_i|CommonPacketParser_MappedRegisters:CommonPacketParser_i|common_packet_parser:CommonPacketParserExternal_MappedRegisters" +Thu 15:00: INFO : Info (12128): Elaborating entity "ControlMux" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|MappedRegistersEA:MappedRegistersEA_i|CommonPacketParser_MappedRegisters:CommonPacketParser_i|ControlMux:control_mux" +Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_registers_controller" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|mapped_registers_controller:MappedRegistersControllerExternal_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1.vhdl(261): object "mappedmemoriesea_i_reserved_0" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1.vhdl(264): object "mappedmemoriesea_i_is_response_header" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_memories_controller_core" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|mapped_memories_controller_core:MappedMemoriesControllerCoreExternal_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedMemoriesEA" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|MappedMemoriesEA:MappedmemoriesEA_i" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedMemoriesEA.vhdl(150): object "commonpacketparser_i_ea_manual_rdy" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "CommonPacketParser_MappedMemories" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|MappedMemoriesEA:MappedmemoriesEA_i|CommonPacketParser_MappedMemories:CommonPacketParser_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_memories_adapter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|mapped_memories_adapter:mapped_memories_domain_adapter_drp" +Thu 15:00: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_71_512_71_dualclock_aclr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp" +Thu 15:00: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo" +Thu 15:00: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo" +Thu 15:00: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:00: INFO : Info (12134): Parameter "lpm_width" = "71" +Thu 15:00: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:00: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:00: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:00: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:00: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:00: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:00: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:00: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:00: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:00: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:00: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:00: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:00: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:00: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:00: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_cu42.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: dcfifo_cu42 +Thu 15:00: INFO : Info (12128): Elaborating entity "dcfifo_cu42" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_p07.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: a_graycounter_p07 +Thu 15:00: INFO : Info (12128): Elaborating entity "a_graycounter_p07" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|a_graycounter_p07:rdptr_g1p" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_lec.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: a_graycounter_lec +Thu 15:00: INFO : Info (12128): Elaborating entity "a_graycounter_lec" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|a_graycounter_lec:wrptr_g1p" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_88e1.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: altsyncram_88e1 +Thu 15:00: INFO : Info (12128): Elaborating entity "altsyncram_88e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_qld.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: alt_synch_pipe_qld +Thu 15:00: INFO : Info (12128): Elaborating entity "alt_synch_pipe_qld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|alt_synch_pipe_qld:rs_dgwp" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_pe9.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: dffpipe_pe9 +Thu 15:00: INFO : Info (12128): Elaborating entity "dffpipe_pe9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|alt_synch_pipe_qld:rs_dgwp|dffpipe_pe9:dffpipe12" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_rld.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: alt_synch_pipe_rld +Thu 15:00: INFO : Info (12128): Elaborating entity "alt_synch_pipe_rld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|alt_synch_pipe_rld:ws_dgrp" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_qe9.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: dffpipe_qe9 +Thu 15:00: INFO : Info (12128): Elaborating entity "dffpipe_qe9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|alt_synch_pipe_rld:ws_dgrp|dffpipe_qe9:dffpipe15" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_b16.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: cmpr_b16 +Thu 15:00: INFO : Info (12128): Elaborating entity "cmpr_b16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|cmpr_b16:rdempty_eq_comp" +Thu 15:00: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_36_512_36_dualclock_aclr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp" +Thu 15:00: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo" +Thu 15:00: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo" +Thu 15:00: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:00: INFO : Info (12134): Parameter "lpm_width" = "36" +Thu 15:00: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:00: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:00: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:00: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:00: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:00: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:00: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:00: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:00: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:00: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:00: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:00: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:00: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:00: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:00: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_eu42.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: dcfifo_eu42 +Thu 15:00: INFO : Info (12128): Elaborating entity "dcfifo_eu42" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_a8e1.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: altsyncram_a8e1 +Thu 15:00: INFO : Info (12128): Elaborating entity "altsyncram_a8e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|altsyncram_a8e1:fifo_ram" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_sld.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: alt_synch_pipe_sld +Thu 15:00: INFO : Info (12128): Elaborating entity "alt_synch_pipe_sld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|alt_synch_pipe_sld:rs_dgwp" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_re9.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: dffpipe_re9 +Thu 15:00: INFO : Info (12128): Elaborating entity "dffpipe_re9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|alt_synch_pipe_sld:rs_dgwp|dffpipe_re9:dffpipe6" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_tld.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: alt_synch_pipe_tld +Thu 15:00: INFO : Info (12128): Elaborating entity "alt_synch_pipe_tld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|alt_synch_pipe_tld:ws_dgrp" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_se9.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: dffpipe_se9 +Thu 15:00: INFO : Info (12128): Elaborating entity "dffpipe_se9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|alt_synch_pipe_tld:ws_dgrp|dffpipe_se9:dffpipe9" +Thu 15:00: INFO : Info (12128): Elaborating entity "SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0.vhdl(194): object "signalforwardingea_i_is_response_header" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "SignalForwardingEA" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|SignalForwardingEA:SignalForwardingEA_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "CommonPacketParser_SignalForwarding" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|SignalForwardingEA:SignalForwardingEA_i|CommonPacketParser_SignalForwarding:CommonPacketParser_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "common_packet_parser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|SignalForwardingEA:SignalForwardingEA_i|CommonPacketParser_SignalForwarding:CommonPacketParser_i|common_packet_parser:CommonPacketParserExternal_SignalForwarding" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock" +Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock|mapped_register:inst_ln504_mappedregblock" +Thu 15:00: INFO : Info (12128): Elaborating entity "signal_forwarding_adapter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|signal_forwarding_adapter:SignalForwardingAdapterExternal_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedDRP_Addr_3c0000_ChecksumMappedDRP" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp" +Thu 15:00: INFO : Info (12128): Elaborating entity "ChecksumMappedDRP_RAM" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i" +Thu 15:00: INFO : Info (12128): Elaborating entity "SRLDelay_1x2_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|SRLDelay_1x2_reg1:rd_delay" +Thu 15:00: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|SRLDelay_1x2_reg1:rd_delay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:00: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|altsyncram:checksum_mem" +Thu 15:00: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|altsyncram:checksum_mem" +Thu 15:00: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|altsyncram:checksum_mem" with the following parameter: +Thu 15:00: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:00: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:00: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:00: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:00: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:00: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:00: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:00: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:00: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:00: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:00: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:00: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" +Thu 15:00: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:00: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:00: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:00: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:00: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:00: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:00: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:00: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:00: INFO : Info (12134): Parameter "init_file" = "32x512_ROM_SINGLE_PORT_ireg_checksum.mif" +Thu 15:00: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:00: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:00: INFO : Info (12134): Parameter "numwords_a" = "512" +Thu 15:00: INFO : Info (12134): Parameter "numwords_b" = "0" +Thu 15:00: INFO : Info (12134): Parameter "operation_mode" = "ROM" +Thu 15:00: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:00: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:00: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" +Thu 15:00: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:00: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:00: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:00: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:00: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:00: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:00: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:00: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:00: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:00: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:00: INFO : Info (12134): Parameter "width_b" = "1" +Thu 15:00: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:00: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:00: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:00: INFO : Info (12134): Parameter "widthad_a" = "9" +Thu 15:00: INFO : Info (12134): Parameter "widthad_b" = "1" +Thu 15:00: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:00: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:00: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:00: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:00: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_8754.tdf +Thu 15:00: INFO : Info (12023): Found entity 1: altsyncram_8754 +Thu 15:00: INFO : Info (12128): Elaborating entity "altsyncram_8754" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|altsyncram:checksum_mem|altsyncram_8754:auto_generated" +Thu 15:00: INFO : Info (12128): Elaborating entity "Manager_Spmv" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv.vhdl(1148): object "indptr_indptr_almost_empty" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_csrDecoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_csrDecoder:csrDecoder" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegBlock_d913f77b396d0027f51d31cc753659b2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_csrDecoder:csrDecoder|MappedRegBlock_d913f77b396d0027f51d31cc753659b2:inst_ln130_mappedregblock" +Thu 15:00: INFO : Info (12128): Elaborating entity "ManagerStateMachine_csrDecoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_csrDecoder:csrDecoder|ManagerStateMachine_csrDecoder:inst_ln165_statemachineentitycore" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at ManagerStateMachine_csrDecoder.vhdl(267): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at ManagerStateMachine_csrDecoder.vhdl(268): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "WrapperNodeIO_colptr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_colptr:colptr" +Thu 15:00: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_readControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_readControl:readControl" +Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_readControl:readControl|MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc:inst_ln130_mappedregblock" +Thu 15:00: INFO : Info (12128): Elaborating entity "ManagerStateMachine_readControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_readControl:readControl|ManagerStateMachine_readControl:inst_ln165_statemachineentitycore" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at ManagerStateMachine_readControl.vhdl(324): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at ManagerStateMachine_readControl.vhdl(325): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:00: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel" +Thu 15:00: INFO : Info (12128): Elaborating entity "SpmvCacheKernel_streamwrapper" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock" +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(332): object "spmvcachekernel_core_loadenabled_out_output_control" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(338): object "spmvcachekernel_core_matrixvalues_output_control" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(343): object "spmvcachekernel_core_vectorvalues_output_control" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(362): object "control_sm_pcc_finished" assigned a value but never read +Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(374): object "control_sm_next_flush_level" assigned a value but never read +Thu 15:02: INFO : Info (12128): Elaborating entity "SpmvCacheKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core" +Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(1013): object "node_id478_nodedivmod_quotient" assigned a value but never read +Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(6855): object "node_id4_nodecounterv1_wrap" assigned a value but never read +Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(6972): object "node_id8177_nodedivmod_quotient" assigned a value but never read +Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(13130): object "node_id16178_nodecounterv1_wrap" assigned a value but never read +Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(13137): object "node_id16184_nodecounterv1_wrap" assigned a value but never read +Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonBitwiseNot_1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonBitwiseNot_1:node_id15916_nodenot" +Thu 15:02: INFO : Info (12128): Elaborating entity "dff_ce_syncsr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|dff_ce_syncsr:node_id2_nodeinput_ce_pipereg_inst_0" +Thu 15:02: INFO : Info (12128): Elaborating entity "LPM_FF" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|dff_ce_syncsr:node_id2_nodeinput_ce_pipereg_inst_0|LPM_FF:dff" +Thu 15:02: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|dff_ce_syncsr:node_id2_nodeinput_ce_pipereg_inst_0|LPM_FF:dff" +Thu 15:02: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|dff_ce_syncsr:node_id2_nodeinput_ce_pipereg_inst_0|LPM_FF:dff" with the following parameter: +Thu 15:02: INFO : Info (12134): Parameter "LPM_WIDTH" = "1" +Thu 15:02: INFO : Info (12134): Parameter "LPM_AVALUE" = "UNUSED" +Thu 15:02: INFO : Info (12134): Parameter "LPM_SVALUE" = "UNUSED" +Thu 15:02: INFO : Info (12134): Parameter "LPM_PVALUE" = "UNUSED" +Thu 15:02: INFO : Info (12134): Parameter "LPM_FFTYPE" = "DFF" +Thu 15:02: INFO : Info (12134): Parameter "LPM_TYPE" = "LPM_FF" +Thu 15:02: INFO : Info (12134): Parameter "LPM_HINT" = "UNUSED" +Thu 15:02: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_1:node_id2_nodeinput_loadenabled_inloadenabled_in_data0_reg" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x1:node_id17896_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x1:node_id17896_nodefifo|SRLDelay_1x1_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x5:node_id19579_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x5_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x5:node_id19579_nodefifo|SRLDelay_1x5_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x5:node_id19579_nodefifo|SRLDelay_1x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonBitwiseOp_1_Andnopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonBitwiseOp_1_Andnopipe:node_id15925_nodeand" +Thu 15:02: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_48:node_id70_nodeinput_readmaskreadmask_data0_reg" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe:node_id282_nodecast" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe:node_id16189_nodetriadd" +Thu 15:02: INFO : Info (12128): Elaborating entity "TriAdd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe:node_id16189_nodetriadd|TriAdd:inst_ln20_triadd" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x2:node_id16217_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x3" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x3:node_id16219_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x3_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x3:node_id16219_nodefifo|SRLDelay_1x3_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x3:node_id16219_nodefifo|SRLDelay_1x3_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x4" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x4:node_id16221_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x4_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x4:node_id16221_nodefifo|SRLDelay_1x4_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x4:node_id16221_nodefifo|SRLDelay_1x4_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x6" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x6:node_id16225_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x6_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x6:node_id16225_nodefifo|SRLDelay_1x6_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x6:node_id16225_nodefifo|SRLDelay_1x6_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x7:node_id16227_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x7_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x7:node_id16227_nodefifo|SRLDelay_1x7_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x7:node_id16227_nodefifo|SRLDelay_1x7_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x8:node_id16229_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x8_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x8:node_id16229_nodefifo|SRLDelay_1x8_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x8:node_id16229_nodefifo|SRLDelay_1x8_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x9:node_id16231_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x9_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x9:node_id16231_nodefifo|SRLDelay_1x9_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x9:node_id16231_nodefifo|SRLDelay_1x9_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x10" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x10:node_id16233_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x10_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x10:node_id16233_nodefifo|SRLDelay_1x10_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x10:node_id16233_nodefifo|SRLDelay_1x10_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x11" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x11:node_id16235_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x11_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x11:node_id16235_nodefifo|SRLDelay_1x11_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x11:node_id16235_nodefifo|SRLDelay_1x11_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x12" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x12:node_id16237_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x12_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x12:node_id16237_nodefifo|SRLDelay_1x12_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x12:node_id16237_nodefifo|SRLDelay_1x12_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x13" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x13:node_id16239_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x13_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x13:node_id16239_nodefifo|SRLDelay_1x13_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x13:node_id16239_nodefifo|SRLDelay_1x13_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x14" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x14:node_id16241_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x14_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x14:node_id16241_nodefifo|SRLDelay_1x14_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x14:node_id16241_nodefifo|SRLDelay_1x14_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x15" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x15:node_id16243_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x15_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x15:node_id16243_nodefifo|SRLDelay_1x15_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x15:node_id16243_nodefifo|SRLDelay_1x15_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x16:node_id16245_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x16_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x16:node_id16245_nodefifo|SRLDelay_1x16_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x16:node_id16245_nodefifo|SRLDelay_1x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x17" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x17:node_id16247_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x17_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x17:node_id16247_nodefifo|SRLDelay_1x17_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x17:node_id16247_nodefifo|SRLDelay_1x17_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x18" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x18:node_id16249_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x18_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x18:node_id16249_nodefifo|SRLDelay_1x18_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x18:node_id16249_nodefifo|SRLDelay_1x18_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x19" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x19:node_id16251_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x19_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x19:node_id16251_nodefifo|SRLDelay_1x19_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x19:node_id16251_nodefifo|SRLDelay_1x19_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x20" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x20:node_id16253_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x20_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x20:node_id16253_nodefifo|SRLDelay_1x20_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x20:node_id16253_nodefifo|SRLDelay_1x20_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x21" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x21:node_id16255_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x21_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x21:node_id16255_nodefifo|SRLDelay_1x21_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x21:node_id16255_nodefifo|SRLDelay_1x21_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x22" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x22:node_id16257_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x22_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x22:node_id16257_nodefifo|SRLDelay_1x22_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x22:node_id16257_nodefifo|SRLDelay_1x22_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x23" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x23:node_id16259_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x23_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x23:node_id16259_nodefifo|SRLDelay_1x23_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x23:node_id16259_nodefifo|SRLDelay_1x23_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1:node_id16212_nodeadd" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1:node_id575_nodelt" +Thu 15:02: INFO : Info (12128): Elaborating entity "Pulse_cycles1_initT" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Pulse_cycles1_initT:node_id470_nodepulse" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe:node_id474_nodecast" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_6x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_6x1:node_id16260_nodefifo" +Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_6x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_6x1:node_id16260_nodefifo|SRLDelay_6x1_reg1:SRLDelay" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe:node_id476_nodeadd" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000:node_id478_nodedivmod" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000:node_id478_nodedivmod|MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000:inst_ln49_maxdcintegerdiv" +Thu 15:02: INFO : Info (12128): Elaborating entity "ConditionalAddSubtract" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000:node_id478_nodedivmod|MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000:inst_ln49_maxdcintegerdiv|ConditionalAddSubtract:inst_ln20_condaddsub" +Thu 15:02: INFO : Info (12128): Elaborating entity "ConditionalAddSubtract" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000:node_id478_nodedivmod|MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000:inst_ln49_maxdcintegerdiv|ConditionalAddSubtract:inst_ln20_condaddsub6" +Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_6_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonMUX_1_2_6_nopipe:node_id473_nodemux" +Thu 15:02: INFO : Info (12128): Elaborating entity "WordLevelShifter_Left_Circular_1_48_6" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|WordLevelShifter_Left_Circular_1_48_6:node_id576_nodewordlevelshift" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|WordLevelShifter_Left_Circular_1_48_6:node_id576_nodewordlevelshift|MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0:inst_ln23_maxdcsinglelutconstdiv" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|WordLevelShifter_Left_Circular_1_48_6:node_id576_nodewordlevelshift|MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0:inst_ln23_maxdcsinglelutconstdiv1" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|WordLevelShifter_Left_Circular_1_48_6:node_id576_nodewordlevelshift|MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0:inst_ln23_maxdcsinglelutconstdiv2" +Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonBitwiseOp_1_Andpipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonBitwiseOp_1_Andpipe:node_id64_nodeand" +Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_3_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonMUX_1_2_3_nopipe:node_id1343_nodemux" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe:node_id1348_nodesub" +Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe:node_id1345_nodeadd" +Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_3x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_3x1:node_id16262_nodefifo" +Thu 15:03: INFO : Info (12128): Elaborating entity "SRLDelay_3x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_3x1:node_id16262_nodefifo|SRLDelay_3x1_reg1:SRLDelay" +Thu 15:03: INFO : Info (12128): Elaborating entity "MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe:node_id8031_nodeeq" +Thu 15:03: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_3072" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_3072:node_id77_nodeinput_valuesvalues_data0_reg" +Thu 15:03: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_64_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonMUX_1_2_64_nopipe:node_id8047_nodemux" +Thu 15:03: INFO : Info (12128): Elaborating entity "MultiStageDelay_64x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_64x1:node_id16287_nodefifo" +Thu 15:03: INFO : Info (12128): Elaborating entity "SRLDelay_64x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_64x1:node_id16287_nodefifo|SRLDelay_64x1_reg1:SRLDelay" +Thu 15:03: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32:node_id4_nodecounterv1" +Thu 15:03: INFO : Info (12128): Elaborating entity "SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32:node_id4_nodecounterv1|SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32:inst_ln165_statemachineentitycore" +Thu 15:03: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:03: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:03: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe:node_id59_nodecast" +Thu 15:03: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_64" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_64:node_id11_nodeinput_vromloadvromload_data0_reg" +Thu 15:03: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_1536" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_1536:node_id180_nodeinput_indptrindptr_data0_reg" +Thu 15:03: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_32_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonMUX_1_2_32_nopipe:node_id15746_nodemux" +Thu 15:03: INFO : Info (12128): Elaborating entity "MultiStageDelay_32x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_32x1:node_id17924_nodefifo" +Thu 15:03: INFO : Info (12128): Elaborating entity "SRLDelay_32x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_32x1:node_id17924_nodefifo|SRLDelay_32x1_reg1:SRLDelay" +Thu 15:03: INFO : Info (12128): Elaborating entity "Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam" +Thu 15:03: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0" +Thu 15:03: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0|altsyncram:inst_ln61_mwblockmem" +Thu 15:03: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0|altsyncram:inst_ln61_mwblockmem" +Thu 15:03: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0|altsyncram:inst_ln61_mwblockmem" with the following parameter: +Thu 15:03: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:03: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:03: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:03: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:03: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:03: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:03: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:03: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:03: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:03: INFO : Info (12134): Parameter "clock_enable_input_a" = "NORMAL" +Thu 15:03: INFO : Info (12134): Parameter "clock_enable_input_b" = "NORMAL" +Thu 15:03: INFO : Info (12134): Parameter "clock_enable_output_a" = "NORMAL" +Thu 15:03: INFO : Info (12134): Parameter "clock_enable_output_b" = "NORMAL" +Thu 15:03: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:03: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:03: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:03: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:03: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:03: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:03: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:03: INFO : Info (12134): Parameter "init_file" = "UNUSED" +Thu 15:03: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:03: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:03: INFO : Info (12134): Parameter "numwords_a" = "2048" +Thu 15:03: INFO : Info (12134): Parameter "numwords_b" = "2048" +Thu 15:03: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:03: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:03: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:03: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" +Thu 15:03: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" +Thu 15:03: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:03: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:03: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:03: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:03: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA" +Thu 15:03: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:03: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:03: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:03: INFO : Info (12134): Parameter "width_a" = "64" +Thu 15:03: INFO : Info (12134): Parameter "width_b" = "64" +Thu 15:03: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:03: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:03: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:03: INFO : Info (12134): Parameter "widthad_a" = "11" +Thu 15:03: INFO : Info (12134): Parameter "widthad_b" = "11" +Thu 15:03: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:03: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:03: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:03: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:03: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:03: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_rn24.tdf +Thu 15:03: INFO : Info (12023): Found entity 1: altsyncram_rn24 +Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram_rn24" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0|altsyncram:inst_ln61_mwblockmem|altsyncram_rn24:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id16178_nodecounterv1" +Thu 15:04: INFO : Info (12128): Elaborating entity "SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id16178_nodecounterv1|SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:inst_ln165_statemachineentitycore" +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:04: INFO : Info (12128): Elaborating entity "OutputRegisterEntity_48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|OutputRegisterEntity_48:node_id16181current_run_cycle_count_reg" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1:node_id16187_nodeeq" +Thu 15:04: INFO : Info (12128): Elaborating entity "MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block" +Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock" +Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock7" +Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock10" +Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register_readable:inst_ln484_mappedregblock1" +Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register_readable:inst_ln484_mappedregblock14" +Thu 15:04: INFO : Info (12128): Elaborating entity "dff_ce_syncsr_ne" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|dff_ce_syncsr_ne:inst_ln44_alteraflipflops" +Thu 15:04: INFO : Info (12128): Elaborating entity "PhotonDesignControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|PhotonDesignControl:control_sm" +Thu 15:04: INFO : Info (12128): Elaborating entity "FillLevelCounter_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_0:ce_fill_0_0_pdc0" +Thu 15:04: INFO : Info (12128): Elaborating entity "FillLevelCounter_1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_1:ce_fill_0_1_pdc0" +Thu 15:04: INFO : Info (12128): Elaborating entity "FlushLevelCounter_2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_2:ce_flush_0_2_pdc0" +Thu 15:04: INFO : Info (12128): Elaborating entity "level_synchroniser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|level_synchroniser:inst_ln11_synchroniser" +Thu 15:04: INFO : Info (12128): Elaborating entity "level_synchroniser_prim" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|level_synchroniser:inst_ln11_synchroniser|level_synchroniser_prim:\g_wide:0:g_width1:sync_level_src" +Thu 15:04: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_SpmvKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel" +Thu 15:04: INFO : Info (12128): Elaborating entity "SpmvKernel_streamwrapper" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock" +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_streamwrapper.vhdl(457): object "spmvkernel_core_output_output_control" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_streamwrapper.vhdl(474): object "control_sm_pcc_finished" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_streamwrapper.vhdl(486): object "control_sm_next_flush_level" assigned a value but never read +Thu 15:04: INFO : Info (12128): Elaborating entity "SpmvKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core" +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(508): object "node_id538_nodecounterv1_wrap" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(549): object "node_id320_nodedivmod_quotient" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(656): object "node_id474_nodecounterv1_wrap" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(675): object "node_id410_nodecounterv1_wrap" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(694): object "node_id346_nodecounterv1_wrap" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(981): object "node_id614_nodecounterv1_wrap" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(988): object "node_id620_nodecounterv1_wrap" assigned a value but never read +Thu 15:04: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x80" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0" +Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:04: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_input_a" = "NORMAL" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_input_b" = "NORMAL" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_output_a" = "NORMAL" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_output_b" = "NORMAL" +Thu 15:04: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:04: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:04: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:04: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:04: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "init_file" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:04: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:04: INFO : Info (12134): Parameter "numwords_a" = "128" +Thu 15:04: INFO : Info (12134): Parameter "numwords_b" = "128" +Thu 15:04: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:04: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:04: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:04: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA" +Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:04: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:04: INFO : Info (12134): Parameter "width_a" = "1" +Thu 15:04: INFO : Info (12134): Parameter "width_b" = "1" +Thu 15:04: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:04: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:04: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:04: INFO : Info (12134): Parameter "widthad_a" = "7" +Thu 15:04: INFO : Info (12134): Parameter "widthad_b" = "7" +Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_de24.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: altsyncram_de24 +Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram_de24" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0|altsyncram_de24:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x40" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0" +Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:04: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_input_a" = "NORMAL" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_input_b" = "NORMAL" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_output_a" = "NORMAL" +Thu 15:04: INFO : Info (12134): Parameter "clock_enable_output_b" = "NORMAL" +Thu 15:04: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:04: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:04: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:04: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:04: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "init_file" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:04: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:04: INFO : Info (12134): Parameter "numwords_a" = "64" +Thu 15:04: INFO : Info (12134): Parameter "numwords_b" = "64" +Thu 15:04: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:04: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:04: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:04: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA" +Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:04: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:04: INFO : Info (12134): Parameter "width_a" = "1" +Thu 15:04: INFO : Info (12134): Parameter "width_b" = "1" +Thu 15:04: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:04: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:04: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:04: INFO : Info (12134): Parameter "widthad_a" = "6" +Thu 15:04: INFO : Info (12134): Parameter "widthad_b" = "6" +Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_9b24.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: altsyncram_9b24 +Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram_9b24" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0|altsyncram_9b24:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id538_nodecounterv1" +Thu 15:04: INFO : Info (12128): Elaborating entity "SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id538_nodecounterv1|SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:inst_ln165_statemachineentitycore" +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id547_nodeeq" +Thu 15:04: INFO : Info (12128): Elaborating entity "Pulse_cycles1_initF" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|Pulse_cycles1_initF:node_id540_nodepulse" +Thu 15:04: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_32" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|InputRegisterEntity2013_32:node_id314_nodeinput_cyclecountercyclecounter_data0_reg" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1:node_id318_nodeadd" +Thu 15:04: INFO : Info (12128): Elaborating entity "MultiStageDelay_32x16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo" +Thu 15:04: INFO : Info (12128): Elaborating entity "SRLDelay_32x16_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay" +Thu 15:04: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe:node_id321_nodecast" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1:node_id322_nodesub" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv" +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18.vhdl(88): object "inst_ln37_maxdcunsigneddiv_round_bit" assigned a value but never read +Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18.vhdl(89): object "inst_ln37_maxdcunsigneddiv_sticky_bit" assigned a value but never read +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv" +Thu 15:04: INFO : Info (12128): Elaborating entity "ConditionalAddSubtract" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|ConditionalAddSubtract:inst_ln20_condaddsub" +Thu 15:04: INFO : Info (12128): Elaborating entity "ConditionalAddSubtract" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|ConditionalAddSubtract:inst_ln20_condaddsub1" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1:node_id326_nodeeq" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe:node_id624_nodecondadd" +Thu 15:04: INFO : Info (12128): Elaborating entity "ConditionalAdd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe:node_id624_nodecondadd|ConditionalAdd:inst_ln19_condadd" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id338_nodegt" +Thu 15:04: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_32_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|PhotonMUX_1_2_32_pipe:node_id342_nodemux" +Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id343_nodegte" +Thu 15:04: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_1_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|PhotonMUX_1_2_1_nopipe:node_id402_nodemux" +Thu 15:04: INFO : Info (12128): Elaborating entity "PhotonBitwiseOp_1_Ornopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|PhotonBitwiseOp_1_Ornopipe:node_id359_nodeor" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_add_adder" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_add_adder" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_add_adder" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_esi.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_esi +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_esi" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_add_adder|add_sub_esi:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_adj_adder" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_adj_adder" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_adj_adder" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "13" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_9vg.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_9vg +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_9vg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_adj_adder|add_sub_9vg:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_bias_subtr" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_bias_subtr" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_bias_subtr" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "SUB" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "UNSIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "13" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_neg.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_neg +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_neg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_bias_subtr|add_sub_neg:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:man_round_adder" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:man_round_adder" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:man_round_adder" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "54" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_kkg.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_kkg +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_kkg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:man_round_adder|add_sub_kkg:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_mult" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_mult:man_product2_mult" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_mult:man_product2_mult" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_mult:man_product2_mult" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "5" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "UNSIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTHA" = "53" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTHB" = "53" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTHP" = "106" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTHS" = "1" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "DEDICATED_MULTIPLIER_CIRCUITRY=YES" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_mult" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/mult_o0t.v +Thu 15:04: INFO : Info (12023): Found entity 1: mult_o0t +Thu 15:04: INFO : Info (12128): Elaborating entity "mult_o0t" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_mult:man_product2_mult|mult_o0t:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "MultiStageDelay_64x10" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x10:node_id676_nodefifo" +Thu 15:04: INFO : Info (12128): Elaborating entity "SRLDelay_64x10_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x10:node_id676_nodefifo|SRLDelay_64x10_reg1:SRLDelay" +Thu 15:04: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x10:node_id676_nodefifo|SRLDelay_64x10_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_qud" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_qud:lbarrel_shift" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_ffb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_ffb:rbarrel_shift" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8:altpriority_encoder11" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8:altpriority_encoder11|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8:altpriority_encoder13" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3e8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8:altpriority_encoder11|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8:altpriority_encoder13|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3e8:altpriority_encoder15" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08:altpriority_encoder9" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7:altpriority_encoder19" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3v7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7:altpriority_encoder19|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3v7:altpriority_encoder21" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_te9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_te9:altpriority_encoder8" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8:altpriority_encoder31" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_nh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8:altpriority_encoder31|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_nh8:altpriority_encoder33" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48:altpriority_encoder36" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28:altpriority_encoder38" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28:altpriority_encoder38|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28:altpriority_encoder40" +Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_n28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28:altpriority_encoder38|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28:altpriority_encoder40|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_n28:altpriority_encoder42" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub1" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub1" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub1" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "SUB" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_p4i.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_p4i +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_p4i" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub1|add_sub_p4i:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub2" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub2" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub2" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "SUB" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub3" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub3" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub3" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "SUB" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "7" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_76g.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_76g +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_76g" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub3|add_sub_76g:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub4" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub4" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub4" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_i6g.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_i6g +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_i6g" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub4|add_sub_i6g:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub5" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub5" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub5" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_o3i.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_o3i +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_o3i" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub5|add_sub_o3i:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub6" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub6" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub6" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_lower" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_lower" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_lower" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "29" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_33k.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_33k +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_33k" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_lower|add_sub_33k:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper0" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper0" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper0" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_7kj.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_7kj +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_7kj" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper0|add_sub_7kj:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper1" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper1" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper1" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper0" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper0" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper0" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper1" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper1" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper1" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_lower" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_lower" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_lower" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_klg.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_klg +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_klg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_lower|add_sub_klg:auto_generated" +Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_upper1" +Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_upper1" +Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_upper1" with the following parameter: +Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" +Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "27" +Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" +Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_stg.tdf +Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_stg +Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_stg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_upper1|add_sub_stg:auto_generated" +Thu 15:06: INFO : Info (12128): Elaborating entity "lpm_compare" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_compare:trailing_zeros_limit_comparator" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_compare:trailing_zeros_limit_comparator" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_compare:trailing_zeros_limit_comparator" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" +Thu 15:06: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" +Thu 15:06: INFO : Info (12134): Parameter "LPM_WIDTH" = "7" +Thu 15:06: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "lpm_compare" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_skh.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: cmpr_skh +Thu 15:06: INFO : Info (12128): Elaborating entity "cmpr_skh" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_compare:trailing_zeros_limit_comparator|cmpr_skh:auto_generated" +Thu 15:06: INFO : Info (12128): Elaborating entity "MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id332_nodelt" +Thu 15:06: INFO : Info (12128): Elaborating entity "MultiStageDelay_64x5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo" +Thu 15:06: INFO : Info (12128): Elaborating entity "SRLDelay_64x5_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay" +Thu 15:06: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" +Thu 15:06: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_64_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|PhotonMUX_1_2_64_pipe:node_id334_nodemux" +Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id614_nodecounterv1" +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id614_nodecounterv1|SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:inst_ln165_statemachineentitycore" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d:mapped_reg_block" +Thu 15:06: INFO : Info (12128): Elaborating entity "PhotonDesignControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|PhotonDesignControl:control_sm" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_3" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_3:ce_fill_0_0_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_4" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_4:ce_fill_0_1_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_5:ce_fill_0_2_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_6" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_6:ce_fill_0_3_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_7:ce_fill_0_4_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_8:ce_fill_0_5_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_9:ce_fill_0_6_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_10" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_10:ce_fill_0_7_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_11" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_11:ce_flush_0_8_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_12" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_12:ce_flush_0_9_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_13" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_13:ce_flush_0_10_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_14" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_14:ce_flush_0_11_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_15" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_15:ce_flush_0_12_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem.vhdl(102): object "inst_ln31_streamingblock_clk_ctl" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Linear1DAddressGen_1_addrgen_cmd_cpu2lmem" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Linear1DAddressGen_1_addrgen_cmd_cpu2lmem.vhdl(133): object "inst_ln191_linear1daddressgen_pcc_finished" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock|MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613:mapped_registers" +Thu 15:06: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock|MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613:mapped_registers|mapped_register:inst_ln504_mappedregblock" +Thu 15:06: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock|MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613:mapped_registers|mapped_register:inst_ln504_mappedregblock2" +Thu 15:06: INFO : Info (12128): Elaborating entity "Linear1DAddressGen" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock|Linear1DAddressGen:inst_ln191_linear1daddressgen" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_cmd_cpu2lmem_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_cmd_cpu2lmem_0:cmd_cpu2lmem_0" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_cpu2lmem" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_cpu2lmem:cpu2lmem" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_fromcpu" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_fromcpu:fromcpu" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr:addrgen_cmd_indptr" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr.vhdl(102): object "inst_ln31_streamingblock_clk_ctl" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Linear1DAddressGen_1_addrgen_cmd_indptr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr:addrgen_cmd_indptr|Linear1DAddressGen_1_addrgen_cmd_indptr:inst_ln31_streamingblock" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Linear1DAddressGen_1_addrgen_cmd_indptr.vhdl(133): object "inst_ln191_linear1daddressgen_pcc_finished" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr:addrgen_cmd_indptr|Linear1DAddressGen_1_addrgen_cmd_indptr:inst_ln31_streamingblock|MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510:mapped_registers" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_cmd_indptr_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_cmd_indptr_0:cmd_indptr_0" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_indptr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_indptr:indptr" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values:addrgen_cmd_values" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values.vhdl(102): object "inst_ln31_streamingblock_clk_ctl" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Linear1DAddressGen_1_addrgen_cmd_values" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values:addrgen_cmd_values|Linear1DAddressGen_1_addrgen_cmd_values:inst_ln31_streamingblock" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Linear1DAddressGen_1_addrgen_cmd_values.vhdl(133): object "inst_ln191_linear1daddressgen_pcc_finished" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_62befbd42223e4c6f7557ca75e01e116" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values:addrgen_cmd_values|Linear1DAddressGen_1_addrgen_cmd_values:inst_ln31_streamingblock|MappedRegBlock_62befbd42223e4c6f7557ca75e01e116:mapped_registers" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_cmd_values_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_cmd_values_0:cmd_values_0" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_values" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_values:values" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_vromLoad" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_vromLoad:vromLoad" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel" +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel_streamwrapper" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_streamwrapper.vhdl(258): object "spmvreductionkernel_core_reductionout_output_control" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_streamwrapper.vhdl(271): object "control_sm_pcc_finished" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_streamwrapper.vhdl(283): object "control_sm_next_flush_level" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel.vhdl(258): object "node_id7_nodecounterv1_wrap" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel.vhdl(288): object "node_id28_nodecounterv1_wrap" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel.vhdl(295): object "node_id34_nodecounterv1_wrap" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id7_nodecounterv1" +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id7_nodecounterv1|SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:inst_ln165_statemachineentitycore" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id18_nodelte" +Thu 15:06: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe:node_id12_nodecast" +Thu 15:06: INFO : Info (12128): Elaborating entity "MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1:node_id13_nodeneg" +Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvReductionKernel_dynamic_offset16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at StateMachineEntity_SpmvReductionKernel_dynamic_offset16.vhdl(109): object "inst_ln165_statemachineentitycore_ram0_data_in1" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at StateMachineEntity_SpmvReductionKernel_dynamic_offset16.vhdl(111): object "inst_ln165_statemachineentitycore_ram0_write_enable1" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel_dynamic_offset16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|SpmvReductionKernel_dynamic_offset16:inst_ln165_statemachineentitycore" +Thu 15:06: INFO : Warning (10541): VHDL Signal Declaration warning at SpmvReductionKernel_dynamic_offset16.vhdl(15): used implicit default value for signal "ram0_data_in1" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. +Thu 15:06: INFO : Warning (10541): VHDL Signal Declaration warning at SpmvReductionKernel_dynamic_offset16.vhdl(17): used implicit default value for signal "ram0_write_enable1" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_dynamic_offset16.vhdl(259): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_dynamic_offset16.vhdl(260): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem" +Thu 15:06: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0" +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:06: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:06: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:06: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:06: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:06: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:06: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:06: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:06: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:06: INFO : Info (12134): Parameter "clock_enable_input_a" = "NORMAL" +Thu 15:06: INFO : Info (12134): Parameter "clock_enable_input_b" = "NORMAL" +Thu 15:06: INFO : Info (12134): Parameter "clock_enable_output_a" = "NORMAL" +Thu 15:06: INFO : Info (12134): Parameter "clock_enable_output_b" = "NORMAL" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:06: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:06: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:06: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:06: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:06: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:06: INFO : Info (12134): Parameter "init_file" = "UNUSED" +Thu 15:06: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:06: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:06: INFO : Info (12134): Parameter "numwords_a" = "32768" +Thu 15:06: INFO : Info (12134): Parameter "numwords_b" = "32768" +Thu 15:06: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:06: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:06: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:06: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" +Thu 15:06: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" +Thu 15:06: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:06: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:06: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:06: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:06: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:06: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:06: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:06: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "width_a" = "64" +Thu 15:06: INFO : Info (12134): Parameter "width_b" = "64" +Thu 15:06: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:06: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:06: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:06: INFO : Info (12134): Parameter "widthad_a" = "15" +Thu 15:06: INFO : Info (12134): Parameter "widthad_b" = "15" +Thu 15:06: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:06: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:06: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:06: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_iv24.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_iv24 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_iv24" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem|altsyncram_iv24:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/decode_7ma.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: decode_7ma +Thu 15:06: INFO : Info (12128): Elaborating entity "decode_7ma" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem|altsyncram_iv24:auto_generated|decode_7ma:decode2" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/mux_9ib.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: mux_9ib +Thu 15:06: INFO : Info (12128): Elaborating entity "mux_9ib" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem|altsyncram_iv24:auto_generated|mux_9ib:mux3" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_qud" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_qud:lbarrel_shift" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_02g" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_02g:rbarrel_shift" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8:altpriority_encoder11" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8:altpriority_encoder11|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8:altpriority_encoder13" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3e8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8:altpriority_encoder11|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8:altpriority_encoder13|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3e8:altpriority_encoder15" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08:altpriority_encoder9" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7:altpriority_encoder19" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3v7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7:altpriority_encoder19|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3v7:altpriority_encoder21" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_te9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_te9:altpriority_encoder8" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8:altpriority_encoder31" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_nh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8:altpriority_encoder31|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_nh8:altpriority_encoder33" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48:altpriority_encoder36" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28:altpriority_encoder38" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28:altpriority_encoder38|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28:altpriority_encoder40" +Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_n28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28:altpriority_encoder38|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28:altpriority_encoder40|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_n28:altpriority_encoder42" +Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id28_nodecounterv1" +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id28_nodecounterv1|SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:inst_ln165_statemachineentitycore" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_ee38d306568098454952bd3e86e61f39" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_ee38d306568098454952bd3e86e61f39:mapped_reg_block" +Thu 15:06: INFO : Info (12128): Elaborating entity "PhotonDesignControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|PhotonDesignControl:control_sm" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_16:ce_fill_0_0_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_17" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_17:ce_flush_0_1_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel" +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvPaddingKernel_streamwrapper" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_streamwrapper.vhdl(269): object "spmvpaddingkernel_core_paddingout_output_control" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_streamwrapper.vhdl(281): object "control_sm_pcc_finished" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_streamwrapper.vhdl(293): object "control_sm_next_flush_level" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvPaddingKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel.vhdl(206): object "node_id3_nodecounterv1_wrap" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel.vhdl(226): object "node_id25_nodecounterv1_wrap" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel.vhdl(233): object "node_id31_nodecounterv1_wrap" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core|StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id3_nodecounterv1" +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core|StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id3_nodecounterv1|SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:inst_ln165_statemachineentitycore" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core|StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id25_nodecounterv1" +Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core|StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id25_nodecounterv1|SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:inst_ln165_statemachineentitycore" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde:mapped_reg_block" +Thu 15:06: INFO : Info (12128): Elaborating entity "PhotonDesignControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|PhotonDesignControl:control_sm" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_18" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_18:ce_fill_0_0_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_19" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_19:ce_fill_0_1_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_20" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_20:ce_flush_0_2_pdc0" +Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_output" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_output:output" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1" +Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectMux_128_32_COUNTER_PIPELINED" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1|DualAspectMux_128_32_COUNTER_PIPELINED:inst_ln31_streamingblock" +Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectCounterPipelined_32_128" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1|DualAspectMux_128_32_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_32_128:inst_ln31_dualaspectcounterpipelined" +Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_counter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1|DualAspectMux_128_32_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_32_128:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_counter:inst_ln228_dualaspectcounterpipelined" +Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_mux4" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1|DualAspectMux_128_32_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_32_128:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_mux4:inst_ln196_dualaspectcounterpipelined" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_14" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_14:Stream_14" +Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectReg_128_3072" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_14:Stream_14|DualAspectReg_128_3072:inst_ln31_streamingblock" +Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectreg_int" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_14:Stream_14|DualAspectReg_128_3072:inst_ln31_streamingblock|dualaspectreg_int:inst_ln126_dualaspectreg" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_31" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31" +Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectMux_128_64_COUNTER_PIPELINED" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31|DualAspectMux_128_64_COUNTER_PIPELINED:inst_ln31_streamingblock" +Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectCounterPipelined_64_128" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31|DualAspectMux_128_64_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_64_128:inst_ln31_dualaspectcounterpipelined" +Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_counter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31|DualAspectMux_128_64_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_64_128:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_counter:inst_ln228_dualaspectcounterpipelined" +Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_mux2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31|DualAspectMux_128_64_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_64_128:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_mux2:inst_ln196_dualaspectcounterpipelined" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_17" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_17:Stream_17" +Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_17:Stream_17|DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED:inst_ln31_streamingblock" +Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectCounterPipelined_1536_3072" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_17:Stream_17|DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED:inst_ln31_streamingblock|DualAspectCounterPipelined_1536_3072:inst_ln31_dualaspectcounterpipelined" +Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_mux2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_17:Stream_17|DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED:inst_ln31_streamingblock|DualAspectCounterPipelined_1536_3072:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_mux2:inst_ln196_dualaspectcounterpipelined" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_61" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_61:Stream_61" +Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectReg_64_128" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_61:Stream_61|DualAspectReg_64_128:inst_ln31_streamingblock" +Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectreg_int" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_61:Stream_61|DualAspectReg_64_128:inst_ln31_streamingblock|dualaspectreg_int:inst_ln126_dualaspectreg" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_70" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_70:Stream_70" +Thu 15:06: INFO : Info (12128): Elaborating entity "StreamPullPushAdapter3072" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_70:Stream_70|StreamPullPushAdapter3072:inst_ln31_streamingblock" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_64" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_64.vhdl(115): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "128" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "478" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_nvd1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_nvd1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_nvd1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_6hb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_6hb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_6hb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_s7f.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_fefifo_s7f +Thu 15:06: INFO : Info (12128): Elaborating entity "a_fefifo_s7f" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|a_fefifo_s7f:fifo_state" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_4i7.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: cntr_4i7 +Thu 15:06: INFO : Info (12128): Elaborating entity "cntr_4i7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|a_fefifo_s7f:fifo_state|cntr_4i7:count_usedw" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_4ob1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dpram_4ob1 +Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_4ob1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|dpram_4ob1:FIFOram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_muu1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_muu1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_muu1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|dpram_4ob1:FIFOram|altsyncram_muu1:altsyncram1" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ohb.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: cntr_ohb +Thu 15:06: INFO : Info (12128): Elaborating entity "cntr_ohb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|cntr_ohb:rd_ptr_count" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_68" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_68.vhdl(122): object "mw_fifo_wrfull" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "128" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:06: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:06: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:06: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:06: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_7552.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dcfifo_7552 +Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo_7552" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_qbb.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_gray2bin_qbb +Thu 15:06: INFO : Info (12128): Elaborating entity "a_gray2bin_qbb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|a_gray2bin_qbb:wrptr_g_gray2bin" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ebe1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_ebe1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_ebe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|altsyncram_ebe1:fifo_ram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_uld.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_uld +Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_uld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|alt_synch_pipe_uld:rs_dgwp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_te9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_te9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_te9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|alt_synch_pipe_uld:rs_dgwp|dffpipe_te9:dffpipe6" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_oe9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_oe9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_oe9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|dffpipe_oe9:ws_brp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_vld.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_vld +Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_vld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|alt_synch_pipe_vld:ws_dgrp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ue9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_ue9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_ue9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|alt_synch_pipe_vld:ws_dgrp|dffpipe_ue9:dffpipe10" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_72" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_72:Stream_72" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_72.vhdl(115): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_66" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_66.vhdl(124): object "mw_fifo_wrfull" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "32" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:06: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:06: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:06: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:06: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_pq52.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dcfifo_pq52 +Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo_pq52" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_28e1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_28e1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_28e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|altsyncram_28e1:fifo_ram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_0md.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_0md +Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_0md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|alt_synch_pipe_0md:rs_dgwp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ve9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_ve9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_ve9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|alt_synch_pipe_0md:rs_dgwp|dffpipe_ve9:dffpipe6" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_1md.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_1md +Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_1md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|alt_synch_pipe_1md:ws_dgrp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_0f9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_0f9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_0f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|alt_synch_pipe_1md:ws_dgrp|dffpipe_0f9:dffpipe9" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_5.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "32" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "479" +Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "3" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_a9h1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_a9h1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_a9h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo|scfifo_a9h1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_gfb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_gfb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_gfb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo|scfifo_a9h1:auto_generated|a_dpfifo_gfb1:dpfifo" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_emb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dpram_emb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_emb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo|scfifo_a9h1:auto_generated|a_dpfifo_gfb1:dpfifo|dpram_emb1:FIFOram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_4ou1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_4ou1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_4ou1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo|scfifo_a9h1:auto_generated|a_dpfifo_gfb1:dpfifo|dpram_emb1:FIFOram|altsyncram_4ou1:altsyncram1" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_38" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_38.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "2" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "479" +Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_o7h1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_o7h1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_o7h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_tdb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_tdb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_tdb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_rkb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dpram_rkb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_rkb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_oku1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_oku1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_oku1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_74" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_74.vhdl(124): object "mw_fifo_wrfull" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "64" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:06: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:06: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:06: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:06: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_3r52.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dcfifo_3r52 +Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo_3r52" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_c8e1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_c8e1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_c8e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|altsyncram_c8e1:fifo_ram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_2md.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_2md +Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_2md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|alt_synch_pipe_2md:rs_dgwp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_1f9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_1f9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_1f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|alt_synch_pipe_2md:rs_dgwp|dffpipe_1f9:dffpipe6" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_3md.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_3md +Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_3md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|alt_synch_pipe_3md:ws_dgrp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_2f9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_2f9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_2f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|alt_synch_pipe_3md:ws_dgrp|dffpipe_2f9:dffpipe9" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_34" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_34:Stream_34" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_34.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_36" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_36.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "48" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "479" +Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_i9h1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_i9h1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_i9h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo|scfifo_i9h1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_nfb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_nfb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_nfb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo|scfifo_i9h1:auto_generated|a_dpfifo_nfb1:dpfifo" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_lmb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dpram_lmb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_lmb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo|scfifo_i9h1:auto_generated|a_dpfifo_nfb1:dpfifo|dpram_lmb1:FIFOram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_mou1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_mou1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_mou1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo|scfifo_i9h1:auto_generated|a_dpfifo_nfb1:dpfifo|dpram_lmb1:FIFOram|altsyncram_mou1:altsyncram1" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_78" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_78.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "1536" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "478" +Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_kch1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_kch1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_kch1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_qib1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_qib1 +Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_qib1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_opb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dpram_opb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_opb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_85v1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_85v1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_85v1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_40" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_40.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "2" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "475" +Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_k7h1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_k7h1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_k7h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo|scfifo_k7h1:auto_generated" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_44" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_44.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "3072" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "475" +Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_ech1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_ech1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_ech1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo|scfifo_ech1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_nib1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_nib1 +Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_nib1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo|scfifo_ech1:auto_generated|a_dpfifo_nib1:dpfifo" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_lpb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dpram_lpb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_lpb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo|scfifo_ech1:auto_generated|a_dpfifo_nib1:dpfifo|dpram_lpb1:FIFOram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_95v1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_95v1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_95v1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo|scfifo_ech1:auto_generated|a_dpfifo_nib1:dpfifo|dpram_lpb1:FIFOram|altsyncram_95v1:altsyncram1" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_42" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_42:Stream_42" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_42.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_48:Stream_48" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_48.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_46" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_46.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "32" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "479" +Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_b9h1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_b9h1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_b9h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46|scfifo:mw_fifo|scfifo_b9h1:auto_generated" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_50" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_50:Stream_50" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_50.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_52" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_52:Stream_52" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_52.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_55" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_55.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "64" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "475" +Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_c9h1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_c9h1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_c9h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo|scfifo_c9h1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_lfb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_lfb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_lfb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo|scfifo_c9h1:auto_generated|a_dpfifo_lfb1:dpfifo" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_jmb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dpram_jmb1 +Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_jmb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo|scfifo_c9h1:auto_generated|a_dpfifo_lfb1:dpfifo|dpram_jmb1:FIFOram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_nou1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_nou1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_nou1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo|scfifo_c9h1:auto_generated|a_dpfifo_lfb1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1" +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_58" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_58:Stream_58" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_58.vhdl(118): object "mw_fifo_full" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_80" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_80.vhdl(122): object "mw_fifo_wrfull" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "64" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:06: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:06: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:06: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:06: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_5252.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dcfifo_5252 +Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo_5252" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_4md.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_4md +Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_4md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated|alt_synch_pipe_4md:rs_dgwp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_3f9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_3f9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_3f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated|alt_synch_pipe_4md:rs_dgwp|dffpipe_3f9:dffpipe5" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_5md.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_5md +Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_5md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated|alt_synch_pipe_5md:ws_dgrp" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_4f9.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_4f9 +Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_4f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated|alt_synch_pipe_5md:ws_dgrp|dffpipe_4f9:dffpipe8" +Thu 15:06: INFO : Info (12128): Elaborating entity "PCIeStreaming_2_4" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(493): object "requestencoder_i_read_done" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(494): object "requestencoder_i_dma_read_req" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(495): object "requestencoder_i_dma_read_addr" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(496): object "requestencoder_i_dma_read_len" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(497): object "requestencoder_i_dma_read_be" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(498): object "requestencoder_i_dma_read_tag" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(499): object "requestencoder_i_dma_read_wide_addr" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(508): object "requestencoder_i_interrupt_ctl_valid" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(509): object "requestencoder_i_interrupt_ctl_enable_id" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(564): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_valid" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(565): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_addr" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(566): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_data" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(567): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_config_valid" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(568): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_config_invalid" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(569): object "slavestreamingbarparser_i_sth1_ring_info_stop" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(585): object "slavestreamingcreditsbarparser_i_sth1_host_cred_index" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(586): object "slavestreamingcreditsbarparser_i_sth1_host_cred_update" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(587): object "slavestreamingcreditsbarparser_i_sth1_host_cred_wrap" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(634): object "pcieslavestreamtohost0_compl_be" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185:inst_ln130_mappedregblock" +Thu 15:06: INFO : Info (12128): Elaborating entity "ReadComplRequestArbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|ReadComplRequestArbiter:ReadComplRequestArbiter_i" +Thu 15:06: INFO : Info (12128): Elaborating entity "FastRequestArbiter_req1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|ReadComplRequestArbiter:ReadComplRequestArbiter_i|FastRequestArbiter_req1:internal_arbiter_i" +Thu 15:06: INFO : Info (12128): Elaborating entity "priority_encoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|ReadComplRequestArbiter:ReadComplRequestArbiter_i|FastRequestArbiter_req1:internal_arbiter_i|priority_encoder:pencoder" +Thu 15:06: INFO : Info (12128): Elaborating entity "fast_request_arbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|ReadComplRequestArbiter:ReadComplRequestArbiter_i|FastRequestArbiter_req1:internal_arbiter_i|fast_request_arbiter:fast_request_arbiter_i" +Thu 15:06: INFO : Info (12128): Elaborating entity "RequestEncoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i" +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at RequestEncoder.vhdl(167): object "wr_req_buffer_i_full" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at RequestEncoder.vhdl(170): object "wr_req_data_buffer_i_full" assigned a value but never read +Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at RequestEncoder.vhdl(171): object "wr_req_data_buffer_i_empty" assigned a value but never read +Thu 15:06: INFO : Info (12128): Elaborating entity "write_request_encoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|write_request_encoder:inst_ln9_writerequestencoderexternal" +Thu 15:06: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_115_512_115_aclr_fwft" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i" +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "115" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_84b1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_84b1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_84b1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_fab1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_fab1 +Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_fab1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_n8j1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_n8j1 +Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_n8j1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_am8.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: cmpr_am8 +Thu 15:06: INFO : Info (12128): Elaborating entity "cmpr_am8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|cmpr_am8:almost_full_comparer" +Thu 15:06: INFO : Info (12128): Elaborating entity "cmpr_am8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|cmpr_am8:three_comparison" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_nhb.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: cntr_nhb +Thu 15:06: INFO : Info (12128): Elaborating entity "cntr_nhb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|cntr_nhb:rd_ptr_msb" +Thu 15:06: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_128_512_128_aclr_afv448" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i" +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo" +Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo" +Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "128" +Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "448" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_7ee1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_7ee1 +Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_7ee1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_7ee1:auto_generated" +Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_pvb1.tdf +Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_pvb1 +Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_pvb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_7ee1:auto_generated|a_dpfifo_pvb1:dpfifo" +Thu 15:07: INFO : Info (12128): Elaborating entity "TagGenerator" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|TagGenerator:TagGenerator_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "MemWriteRequestArbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MemWriteRequestArbiter:MemWriteRequestArbiter_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "FastRequestArbiter_req5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MemWriteRequestArbiter:MemWriteRequestArbiter_i|FastRequestArbiter_req5:internal_arbiter_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "priority_encoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MemWriteRequestArbiter:MemWriteRequestArbiter_i|FastRequestArbiter_req5:internal_arbiter_i|priority_encoder:pencoder" +Thu 15:07: INFO : Info (12128): Elaborating entity "fast_request_arbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MemWriteRequestArbiter:MemWriteRequestArbiter_i|FastRequestArbiter_req5:internal_arbiter_i|fast_request_arbiter:fast_request_arbiter_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "SlaveStreamingRingConfigBarParser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|SlaveStreamingRingConfigBarParser:SlaveStreamingBarParser_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "SlaveStreamingCreditsBarParser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|SlaveStreamingCreditsBarParser:SlaveStreamingCreditsBarParser_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "PCIeSlaveStreamFromHost" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0" +Thu 15:07: INFO : Info (12128): Elaborating entity "pcie_slave_streaming_sfh_ring" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring" +Thu 15:07: INFO : Info (12128): Elaborating entity "rg_buffer_info" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg" +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:07: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "init_file" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:07: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:07: INFO : Info (12134): Parameter "numwords_a" = "4" +Thu 15:07: INFO : Info (12134): Parameter "numwords_b" = "4" +Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" +Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:07: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:07: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "width_a" = "7" +Thu 15:07: INFO : Info (12134): Parameter "width_b" = "7" +Thu 15:07: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:07: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:07: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:07: INFO : Info (12134): Parameter "widthad_a" = "2" +Thu 15:07: INFO : Info (12134): Parameter "widthad_b" = "2" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_n034.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_n034 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_n034" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_n034:auto_generated" +Thu 15:07: INFO : Info (12128): Elaborating entity "rg_buffer_sfh" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg" +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:07: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "init_file" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:07: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:07: INFO : Info (12134): Parameter "numwords_a" = "512" +Thu 15:07: INFO : Info (12134): Parameter "numwords_b" = "512" +Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" +Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:07: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:07: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:07: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:07: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:07: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:07: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:07: INFO : Info (12134): Parameter "widthad_a" = "9" +Thu 15:07: INFO : Info (12134): Parameter "widthad_b" = "9" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_9a34.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_9a34 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_9a34" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated" +Thu 15:07: INFO : Info (12128): Elaborating entity "pcie_posted_credits_writer" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer" +Thu 15:07: INFO : Info (12128): Elaborating entity "posted_credits_fifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_3_16_3_aclr_fwft" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft" +Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "3" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "4" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "16" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_eva1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: scfifo_eva1 +Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo_eva1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_l5b1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_dpfifo_l5b1 +Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_l5b1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_3vi1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_3vi1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_3vi1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|altsyncram_3vi1:FIFOram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_5m8.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cmpr_5m8 +Thu 15:07: INFO : Info (12128): Elaborating entity "cmpr_5m8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cmpr_5m8:almost_full_comparer" +Thu 15:07: INFO : Info (12128): Elaborating entity "cmpr_5m8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cmpr_5m8:three_comparison" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ihb.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cntr_ihb +Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_ihb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cntr_ihb:rd_ptr_msb" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_vh7.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cntr_vh7 +Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_vh7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cntr_vh7:usedw_counter" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_jhb.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cntr_jhb +Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_jhb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cntr_jhb:wr_ptr" +Thu 15:07: INFO : Info (12128): Elaborating entity "PCIeSlaveStreamToHost" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeSlaveStreamToHost.vhdl(207): object "stream_ring_compl_fifo_underflow" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "pcie_slave_streaming_sth_ring" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring" +Thu 15:07: INFO : Info (12128): Elaborating entity "sth_compl_fifo_debug" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of" +Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "60" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "4" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "16" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "almost_full_value" = "14" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_36e1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: scfifo_36e1 +Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo_36e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_gpb1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_dpfifo_gpb1 +Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_gpb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_92j1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_92j1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_92j1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram" +Thu 15:07: INFO : Info (12128): Elaborating entity "rg_buffer_sth" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg" +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg|altsyncram:inst_ln100_mwblockmem" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg|altsyncram:inst_ln100_mwblockmem" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg|altsyncram:inst_ln100_mwblockmem" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:07: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "init_file" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:07: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:07: INFO : Info (12134): Parameter "numwords_a" = "128" +Thu 15:07: INFO : Info (12134): Parameter "numwords_b" = "128" +Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:07: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "width_a" = "128" +Thu 15:07: INFO : Info (12134): Parameter "width_b" = "128" +Thu 15:07: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:07: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:07: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:07: INFO : Info (12134): Parameter "widthad_a" = "7" +Thu 15:07: INFO : Info (12134): Parameter "widthad_b" = "7" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_d024.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_d024 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_d024" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg|altsyncram:inst_ln100_mwblockmem|altsyncram_d024:auto_generated" +Thu 15:07: INFO : Info (12128): Elaborating entity "rg_buffer_info_sth" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg" +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" +Thu 15:07: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "implement_in_les" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "init_file" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" +Thu 15:07: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:07: INFO : Info (12134): Parameter "numwords_a" = "4" +Thu 15:07: INFO : Info (12134): Parameter "numwords_b" = "4" +Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" +Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:07: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:07: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "width_a" = "8" +Thu 15:07: INFO : Info (12134): Parameter "width_b" = "8" +Thu 15:07: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:07: INFO : Info (12134): Parameter "width_byteena_b" = "1" +Thu 15:07: INFO : Info (12134): Parameter "width_eccstatus" = "3" +Thu 15:07: INFO : Info (12134): Parameter "widthad_a" = "2" +Thu 15:07: INFO : Info (12134): Parameter "widthad_b" = "2" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" +Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_p034.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_p034 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_p034" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_p034:auto_generated" +Thu 15:07: INFO : Info (12128): Elaborating entity "MappedElementAdapterForwarder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementAdapterForwarder:MappedElementAdapterForwarder_pcie_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(487): object "inst_ln1948_memorycontrollerpro_memcmd_qempty" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(488): object "inst_ln1948_memorycontrollerpro_memcmd_tagcmd_working" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(500): object "inst_ln1948_memorycontrollerpro_rdstream_fifo_wrdata" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(514): object "inst_ln1948_memorycontrollerpro_debug_fifos" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(515): object "inst_ln1948_memorycontrollerpro_debug_q_fifos" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(516): object "inst_ln1948_memorycontrollerpro_debug_rd_cmds" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(517): object "inst_ln1948_memorycontrollerpro_debug_wr_cmds" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(518): object "inst_ln1948_memorycontrollerpro_debug_rd_data" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(519): object "inst_ln1948_memorycontrollerpro_debug_wr_data" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(525): object "inst_ln1948_memorycontrollerpro_perror_wr" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(526): object "inst_ln1948_memorycontrollerpro_perror_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(527): object "inst_ln1948_memorycontrollerpro_perror_data" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(528): object "inst_ln1948_memorycontrollerpro_perror_addr" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(529): object "inst_ln1948_memorycontrollerpro_perror_burstpos" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(530): object "inst_ln1948_memorycontrollerpro_perror_burstsize" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(531): object "inst_ln1948_memorycontrollerpro_perror_addr_word" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(532): object "inst_ln1948_memorycontrollerpro_perror_stream" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(533): object "inst_ln1948_memorycontrollerpro_perror_errors" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(534): object "inst_ln1948_memorycontrollerpro_debug_flagregister" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(535): object "inst_ln1948_memorycontrollerpro_debug_qhead" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(536): object "inst_ln1948_memorycontrollerpro_debug_nondatacmdcounters" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(537): object "inst_ln1948_memorycontrollerpro_debug_unknowncmdcounters" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(538): object "inst_ln1948_memorycontrollerpro_avl_debug_rddata" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(539): object "inst_ln1948_memorycontrollerpro_avl_debug_rdcmds" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(540): object "inst_ln1948_memorycontrollerpro_avl_debug_wrdata" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(541): object "inst_ln1948_memorycontrollerpro_avl_debug_wrcmds" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(556): object "wrtoram_wfifo_cmd_cmd_cpu2lmem_0_cpu2lmem_empty" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(557): object "wrtoram_wfifo_cmd_cmd_cpu2lmem_0_cpu2lmem_almost_empty" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(562): object "rdfromram_wfifo_cmd_cmd_indptr_0_indptr_stall" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(571): object "rdfromram_wfifo_cmd_cmd_values_0_values_stall" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae:mapped_registers" +Thu 15:07: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae:mapped_registers|mapped_register_readable:inst_ln484_mappedregblock6" +Thu 15:07: INFO : Info (12128): Elaborating entity "MemCtrlPro_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro" +Thu 15:07: INFO : Info (12128): Elaborating entity "Async_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO" +Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" +Thu 15:07: INFO : Info (12128): Elaborating entity "Async_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:0:MIGCMD_FIFO" +Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:0:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" +Thu 15:07: INFO : Info (12128): Elaborating entity "Async_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:0:MIGDataRd_FIFO" +Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:0:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" +Thu 15:07: INFO : Info (12128): Elaborating entity "Sync_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO" +Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" +Thu 15:07: INFO : Info (12128): Elaborating entity "Sync_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO" +Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" +Thu 15:07: INFO : Info (12128): Elaborating entity "Async_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:0:MIGDataWr_FIFO" +Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:0:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" +Thu 15:07: INFO : Info (12128): Elaborating entity "DDRAddressBitSwap8GBOpt" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|DDRAddressBitSwap8GBOpt:BitSwapClass" +Thu 15:07: INFO : Info (12128): Elaborating entity "WideFifoWithLevel_3072_512_16_16_false_792_FROM" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(117): object "fifo_0_full" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(119): object "fifo_0_wr_data_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(123): object "fifo_1_full" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(125): object "fifo_1_wr_data_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(127): object "fifo_1_rd_data_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(129): object "fifo_2_full" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(131): object "fifo_2_wr_data_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(133): object "fifo_2_rd_data_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(135): object "fifo_3_full" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(137): object "fifo_3_wr_data_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(139): object "fifo_3_rd_data_count" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0" +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "792" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_fk62.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_fk62 +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_fk62" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_sbe1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_sbe1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_sbe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_6md.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_6md +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_6md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|alt_synch_pipe_6md:rs_dgwp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_5f9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_5f9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_5f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|alt_synch_pipe_6md:rs_dgwp|dffpipe_5f9:dffpipe6" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_7md.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_7md +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_7md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|alt_synch_pipe_7md:ws_dgrp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_6f9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_6f9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_6f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|alt_synch_pipe_7md:ws_dgrp|dffpipe_6f9:dffpipe9" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3" +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "696" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_lk62.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_lk62 +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_lk62" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_2ce1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_2ce1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_2ce1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|altsyncram_2ce1:fifo_ram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_8md.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_8md +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_8md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|alt_synch_pipe_8md:rs_dgwp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_7f9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_7f9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_7f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|alt_synch_pipe_8md:rs_dgwp|dffpipe_7f9:dffpipe6" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_9md.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_9md +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_9md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|alt_synch_pipe_9md:ws_dgrp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_8f9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_8f9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_8f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|alt_synch_pipe_9md:ws_dgrp|dffpipe_8f9:dffpipe9" +Thu 15:07: INFO : Info (12128): Elaborating entity "WideFifoWithLevel_3073_512_16_16_false_792_TO" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(117): object "fifo_0_full" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(123): object "fifo_1_full" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(125): object "fifo_1_wr_data_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(129): object "fifo_2_full" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(131): object "fifo_2_wr_data_count" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(135): object "fifo_3_full" assigned a value but never read +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(137): object "fifo_3_wr_data_count" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3" +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "697" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_nk62.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_nk62 +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_nk62" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_4ce1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_4ce1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_4ce1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_amd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_amd +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_amd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|alt_synch_pipe_amd:rs_dgwp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_9f9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_9f9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_9f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|alt_synch_pipe_amd:rs_dgwp|dffpipe_9f9:dffpipe6" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_bmd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_bmd +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_bmd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|alt_synch_pipe_bmd:ws_dgrp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_af9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_af9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_af9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|alt_synch_pipe_bmd:ws_dgrp|dffpipe_af9:dffpipe9" +Thu 15:07: INFO : Info (12128): Elaborating entity "DoneGen" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|DoneGen:DoneGen_cmd_cmd_indptr_0_indptr" +Thu 15:07: INFO : Info (12128): Elaborating entity "PerfMonitor" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PerfMonitor:PerformanceMonitor_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "perf_monitor" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PerfMonitor:PerformanceMonitor_i|perf_monitor:inst_ln11_perfmonitorext" +Thu 15:07: INFO : Info (12128): Elaborating entity "start_of_day_reset" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|start_of_day_reset:inst_ln9_startofdayreset" +Thu 15:07: INFO : Info (12128): Elaborating entity "MAX4PCIeSlaveInterface" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "max_SV_pcie_slave" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp" +Thu 15:07: INFO : Info (12128): Elaborating entity "compl_fifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo" +Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "45" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "5" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "32" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "almost_full_value" = "20" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_09e1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: scfifo_09e1 +Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo_09e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_gsb1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_dpfifo_gsb1 +Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_gsb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_56f.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_fefifo_56f +Thu 15:07: INFO : Info (12128): Elaborating entity "a_fefifo_56f" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|a_fefifo_56f:fifo_state" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_0i7.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cntr_0i7 +Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_0i7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|a_fefifo_56f:fifo_state|cntr_0i7:count_usedw" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_fmb1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dpram_fmb1 +Thu 15:07: INFO : Info (12128): Elaborating entity "dpram_fmb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|dpram_fmb1:FIFOram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_8ou1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_8ou1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_8ou1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|dpram_fmb1:FIFOram|altsyncram_8ou1:altsyncram1" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_khb.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cntr_khb +Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_khb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|cntr_khb:rd_ptr_count" +Thu 15:07: INFO : Info (12128): Elaborating entity "max_pcie_slave_req_dispatcher" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_pcie_slave_req_dispatcher:PCIeSlaveReqDispatcher_imp" +Thu 15:07: INFO : Info (12128): Elaborating entity "StratixPCIeInterface" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "max_SV_pcie_tx" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "pcie_tx_fifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "132" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "6" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "64" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "almost_full_value" = "48" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_tae1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: scfifo_tae1 +Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo_tae1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_3ub1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_dpfifo_3ub1 +Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_3ub1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_b6f.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_fefifo_b6f +Thu 15:07: INFO : Info (12128): Elaborating entity "a_fefifo_b6f" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|a_fefifo_b6f:fifo_state" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_1i7.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cntr_1i7 +Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_1i7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|a_fefifo_b6f:fifo_state|cntr_1i7:count_usedw" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_snb1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dpram_snb1 +Thu 15:07: INFO : Info (12128): Elaborating entity "dpram_snb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|dpram_snb1:FIFOram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_8uu1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_8uu1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_8uu1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|dpram_snb1:FIFOram|altsyncram_8uu1:altsyncram1" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_lhb.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cntr_lhb +Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_lhb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|cntr_lhb:rd_ptr_count" +Thu 15:07: INFO : Info (12128): Elaborating entity "max_SV_pcie_rx" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_rx:StratixVPCIeRX_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "PCIeEA" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeEA.vhdl(148): object "slave_from_host_fifo_full" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_34_512_34_dualclock_aclr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host" +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "34" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_au42.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_au42 +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_au42" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_68e1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_68e1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_68e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|altsyncram_68e1:fifo_ram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_cmd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_cmd +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_cmd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|alt_synch_pipe_cmd:rs_dgwp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_bf9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_bf9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_bf9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|alt_synch_pipe_cmd:rs_dgwp|dffpipe_bf9:dffpipe6" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_dmd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_dmd +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_dmd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|alt_synch_pipe_dmd:ws_dgrp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_cf9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_cf9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_cf9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|alt_synch_pipe_dmd:ws_dgrp|dffpipe_cf9:dffpipe9" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo" +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "34" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_tk52.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_tk52 +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_tk52" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_t0c1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_t0c1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_t0c1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|altsyncram_t0c1:fifo_ram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_emd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_emd +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_emd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|alt_synch_pipe_emd:rs_dgwp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_df9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_df9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_df9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|alt_synch_pipe_emd:rs_dgwp|dffpipe_df9:dffpipe6" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_fmd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_fmd +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_fmd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|alt_synch_pipe_fmd:ws_dgrp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ef9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_ef9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_ef9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|alt_synch_pipe_fmd:ws_dgrp|dffpipe_ef9:dffpipe9" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraStreamFifo_128_64_128_afv_95_pushin_pushout" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at AlteraStreamFifo_128_64_128_afv_95_pushin_pushout.vhdl(120): object "inst_ln56_mwfifo_wrfull" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_mixed_widths" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "128" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "7" +Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "128" +Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" +Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" +Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" +Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" +Thu 15:07: INFO : Info (12134): Parameter "lpm_width_r" = "64" +Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu_r" = "8" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_m352.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_m352 +Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_m352" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_hab.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_gray2bin_hab +Thu 15:07: INFO : Info (12128): Elaborating entity "a_gray2bin_hab" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|a_gray2bin_hab:wrptr_g_gray2bin" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_fv6.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_graycounter_fv6 +Thu 15:07: INFO : Info (12128): Elaborating entity "a_graycounter_fv6" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|a_graycounter_fv6:rdptr_g1p" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_cdc.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: a_graycounter_cdc +Thu 15:07: INFO : Info (12128): Elaborating entity "a_graycounter_cdc" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|a_graycounter_cdc:wrptr_g1p" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_q9e1.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_q9e1 +Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_q9e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_hkd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_hkd +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_hkd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|alt_synch_pipe_hkd:rs_dgwp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_gd9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_gd9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_gd9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|alt_synch_pipe_hkd:rs_dgwp|dffpipe_gd9:dffpipe12" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_fd9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_fd9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_fd9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|dffpipe_fd9:ws_brp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_ikd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_ikd +Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_ikd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|alt_synch_pipe_ikd:ws_dgrp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_hd9.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_hd9 +Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_hd9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|alt_synch_pipe_ikd:ws_dgrp|dffpipe_hd9:dffpipe16" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_206.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cmpr_206 +Thu 15:07: INFO : Info (12128): Elaborating entity "cmpr_206" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|cmpr_206:rdempty_eq_comp" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ptd.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: cntr_ptd +Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_ptd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|cntr_ptd:cntr_b" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496:ftb_MappedElementsSwitchPCIeEA" +Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraClockGenerator_250_100_STREAM" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "StratixVClockManager_in250_out_f100p0dc50_f100p180dc50" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVClockManager_in250_out_f100p0dc50_f100p180dc50.vhdl(295): object "altera_pll_i_fboutclk" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "altera_pll" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll:altera_pll_i" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll:altera_pll_i" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll:altera_pll_i" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "fractional_vco_multiplier" = "false" +Thu 15:07: INFO : Info (12134): Parameter "reference_clock_frequency" = "250.0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "normal" +Thu 15:07: INFO : Info (12134): Parameter "number_of_clocks" = "2" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency0" = "100.0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift0" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle0" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency1" = "100.0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift1" = "5000 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle1" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency2" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift2" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle2" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency3" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift3" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle3" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency4" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift4" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle4" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency5" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift5" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle5" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency6" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift6" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle6" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency7" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift7" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle7" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency8" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift8" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle8" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency9" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift9" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle9" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency10" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift10" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle10" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency11" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift11" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle11" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency12" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift12" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle12" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency13" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift13" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle13" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency14" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift14" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle14" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency15" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift15" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle15" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency16" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift16" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle16" = "50" +Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency17" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "phase_shift17" = "0 ps" +Thu 15:07: INFO : Info (12134): Parameter "duty_cycle17" = "50" +Thu 15:07: INFO : Info (12134): Parameter "pll_type" = "General" +Thu 15:07: INFO : Info (12134): Parameter "m_cnt_hi_div" = "1" +Thu 15:07: INFO : Info (12134): Parameter "m_cnt_lo_div" = "1" +Thu 15:07: INFO : Info (12134): Parameter "n_cnt_hi_div" = "1" +Thu 15:07: INFO : Info (12134): Parameter "n_cnt_lo_div" = "1" +Thu 15:07: INFO : Info (12134): Parameter "m_cnt_bypass_en" = "true" +Thu 15:07: INFO : Info (12134): Parameter "n_cnt_bypass_en" = "true" +Thu 15:07: INFO : Info (12134): Parameter "m_cnt_odd_div_duty_en" = "false" +Thu 15:07: INFO : Info (12134): Parameter "n_cnt_odd_div_duty_en" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div0" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div0" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst0" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst0" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en0" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en0" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div1" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div1" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst1" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst1" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en1" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en1" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div2" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div2" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst2" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst2" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en2" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en2" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div3" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div3" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst3" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst3" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en3" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en3" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div4" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div4" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst4" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst4" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en4" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en4" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div5" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div5" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst5" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst5" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en5" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en5" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div6" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div6" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst6" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst6" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en6" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en6" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div7" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div7" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst7" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst7" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en7" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en7" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div8" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div8" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst8" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst8" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en8" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en8" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div9" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div9" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst9" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst9" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en9" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en9" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div10" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div10" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst10" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst10" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en10" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en10" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div11" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div11" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst11" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst11" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en11" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en11" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div12" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div12" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst12" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst12" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en12" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en12" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div13" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div13" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst13" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst13" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en13" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en13" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div14" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div14" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst14" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst14" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en14" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en14" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div15" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div15" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst15" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst15" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en15" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en15" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div16" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div16" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst16" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst16" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en16" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en16" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div17" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div17" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst17" = "1" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst17" = "0" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en17" = "false" +Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en17" = "false" +Thu 15:07: INFO : Info (12134): Parameter "pll_output_clk_frequency" = "0 MHz" +Thu 15:07: INFO : Info (12134): Parameter "pll_vco_div" = "1" +Thu 15:07: INFO : Info (12134): Parameter "pll_cp_current" = "5" +Thu 15:07: INFO : Info (12134): Parameter "pll_bwctrl" = "18000" +Thu 15:07: INFO : Info (12134): Parameter "pll_fractional_division" = "1" +Thu 15:07: INFO : Info (12128): Elaborating entity "altera_pll_reconfig_top" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "dyn_phase_shift" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst" +Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_0" +Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_1" +Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_2" +Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_3" +Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_4" +Thu 15:07: INFO : Info (12128): Elaborating entity "self_reset" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|self_reset:self_reset_inst" +Thu 15:07: INFO : Info (12128): Elaborating entity "dprio_mux" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dprio_mux:dprio_mux_inst" +Thu 15:07: INFO : Info (12128): Elaborating entity "fpll_dprio_init" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|fpll_dprio_init:fpll_dprio_init_inst" +Thu 15:07: INFO : Info (12128): Elaborating entity "MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena:clockgen_altclkctrl_i" +Thu 15:07: INFO : Info (12128): Elaborating entity "MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena:clockgen_altclkctrl_i|MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg:MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg_component" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena.vhd(58): object "clkselect" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_1_controller" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core" +Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_1_controller.vhdl(181): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_wrap" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_0002" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_memphy" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_reset" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_reset:ureset" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_reset:ureset|ddr3_72_800_sl_u_q_p0_reset_sync:ureset_afi_clk" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_reset:ureset|ddr3_72_800_sl_u_q_p0_reset_sync:ureset_ctl_reset_clk" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_reset:ureset|ddr3_72_800_sl_u_q_p0_reset_sync:ureset_addr_cmd_clk" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_datapath" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_address" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_bank" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_cke" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_cs_n" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_ras_n" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_write_datapath" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_extender" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_extender:oct_ena_source_extender" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:afi_dqs_en_shifter" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:afi_wdata_shifter" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:afi_dm_shifter" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].dq_shifter" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].wrdata_mask_shifter" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].wrdata_en_shifter" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_read_datapath" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_read_valid_selector" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector" +Thu 15:07: INFO : Info (12128): Elaborating entity "lpm_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "lpm_decodes" = "16" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "LPM_DECODE" +Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "4" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/decode_i6f.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: decode_i6f +Thu 15:07: INFO : Info (12128): Elaborating entity "decode_i6f" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select|decode_i6f:auto_generated" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_read_fifo_hard" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_fifo_hard:read_buffering[0].uread_read_fifo_hard" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_new_io_pads" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:hr_to_fr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:hr_to_fr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:hr_to_fr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:hr_to_fr" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:fr_ddio_out" +Thu 15:07: INFO : Info (12128): Elaborating entity "altddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" +Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" +Thu 15:07: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" with the following parameter: +Thu 15:07: INFO : Info (12134): Parameter "extend_oe_disable" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:07: INFO : Info (12134): Parameter "invert_output" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altddio_out" +Thu 15:07: INFO : Info (12134): Parameter "oe_reg" = "UNUSED" +Thu 15:07: INFO : Info (12134): Parameter "power_up_high" = "OFF" +Thu 15:07: INFO : Info (12134): Parameter "width" = "1" +Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/ddio_out_0se.tdf +Thu 15:07: INFO : Info (12023): Found entity 1: ddio_out_0se +Thu 15:07: INFO : Info (12128): Elaborating entity "ddio_out_0se" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad|ddio_out_0se:auto_generated" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_clock_pair_generator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_clock_pair_generator:clock_gen[0].uclk_generator" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_core_shadow_registers" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_core_shadow_registers:dq_ddio[0].t11_manager_inst" +Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_altdqdqs" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs" +Thu 15:08: INFO : Info (12128): Elaborating entity "altdq_dqs2_stratixv_use_shadow_regs" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs|altdq_dqs2_stratixv_use_shadow_regs:altdq_dqs2_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "afi_mux_ddr3_ddrx_use_shadow_regs" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|afi_mux_ddr3_ddrx_use_shadow_regs:m0" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench:the_altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "5" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "5" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "STRATIXV" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_e9n1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_e9n1 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_e9n1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram|altsyncram_e9n1:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_mgr" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_reg_file" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altdpram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "indata_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "indata_reg" = "INCLOCK" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altdpram" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "rdaddress_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "rdaddress_reg" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "width" = "42" +Thu 15:08: INFO : Info (12134): Parameter "widthad" = "6" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena" = "1" +Thu 15:08: INFO : Info (12134): Parameter "wraddress_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "wraddress_reg" = "INCLOCK" +Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_reg" = "INCLOCK" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_8h02.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: dpram_8h02 +Thu 15:08: INFO : Info (12128): Elaborating entity "dpram_8h02" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component|dpram_8h02:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_sv_wrapper" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_sv_wrapper:sequencer_scc_family_wrapper" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_sv_phase_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_sv_wrapper:sequencer_scc_family_wrapper|sequencer_scc_sv_phase_decode:sequencer_scc_phase_decode_dqe_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_reg_file" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "CLEAR0" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "16" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "16" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "4" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "4" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "4" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_b" = "4" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_4n32.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_4n32 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_4n32" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component|altsyncram_4n32:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_phy_mgr" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_data_mgr" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_data_mgr:sequencer_data_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_ddr3" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_generic" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_core" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_inst_ROM_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_sl_u_q_s0_inst_ROM.hex" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "128" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "128" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "ROM" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "7" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "7" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "20" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "20" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_9j12.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_9j12 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_9j12" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_9j12:auto_generated" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/decode_7la.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: decode_7la +Thu 15:08: INFO : Info (12128): Elaborating entity "decode_7la" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_9j12:auto_generated|decode_7la:wr_decode" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/mux_1hb.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: mux_1hb +Thu 15:08: INFO : Info (12128): Elaborating entity "mux_1hb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_9j12:auto_generated|mux_1hb:rd_mux" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_ac_ROM_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_sl_u_q_s0_AC_ROM.hex" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "40" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "40" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ac32.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_ac32 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_ac32" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component|altsyncram_ac32:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_di_buffer_wrap" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_di_buffer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "4" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "4" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "2" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "2" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "64" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "64" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_q202.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_q202 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_q202" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component|altsyncram_q202:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_datamux" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_datamux:rw_manager_datamux_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_write_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_data_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_data_decoder:DO_decoder" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_dm_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_dm_decoder:DM_decoder_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_lfsr72" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_lfsr72:do_lfsr_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_lfsr12" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_lfsr12:dm_lfsr_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_read_datapath" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_bitcheck" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_bitcheck:bitcheck_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_pattern_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "5" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "5" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "9" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "9" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_0302.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_0302 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_0302" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component|altsyncram_0302:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_data_broadcast" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_data_broadcast:data_broadcast_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_jumplogic" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_jumplogic:jumplogic_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_datamux" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_datamux:mux_iter[0].datamux_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_mem_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "maximum_depth" = "4096" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "4096" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "4" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "12" +Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_sl_u_q_s0_sequencer_mem.hex" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "SINGLE_PORT" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_1io1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_1io1 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_1io1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram|altsyncram_1io1:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_master_translator:cpu_inst_data_master_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_master_translator:cpu_inst_instruction_master_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_translator:sequencer_phy_mgr_inst_avl_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_translator:sequencer_mem_s1_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_translator:sequencer_reg_file_inst_avl_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_master_agent:cpu_inst_data_master_translator_avalon_universal_master_0_agent" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_master_agent:cpu_inst_instruction_master_translator_avalon_universal_master_0_agent" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_agent" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_agent:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_burst_uncompressor" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_agent:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent|altera_merlin_burst_uncompressor:uncompressor" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_avalon_sc_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_avalon_sc_fifo:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent_rsp_fifo" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_addr_router" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_addr_router:addr_router" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_addr_router_default_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_addr_router:addr_router|ddr3_72_800_sl_u_q_s0_addr_router_default_decode:the_default_decode" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_addr_router_001" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_addr_router_001:addr_router_001" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_addr_router_001_default_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_addr_router_001:addr_router_001|ddr3_72_800_sl_u_q_s0_addr_router_001_default_decode:the_default_decode" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_id_router" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_id_router:id_router" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_id_router_default_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_id_router:id_router|ddr3_72_800_sl_u_q_s0_id_router_default_decode:the_default_decode" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_id_router_003" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_id_router_003:id_router_003" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_id_router_003_default_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_id_router_003:id_router_003|ddr3_72_800_sl_u_q_s0_id_router_003_default_decode:the_default_decode" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_reset_controller" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_reset_controller:rst_controller" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_reset_synchronizer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_cmd_xbar_demux" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_demux:cmd_xbar_demux" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_cmd_xbar_demux_001" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_demux_001:cmd_xbar_demux_001" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003|altera_merlin_arbitrator:arb" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_rsp_xbar_demux_003" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_rsp_xbar_demux_003:rsp_xbar_demux_003" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_rsp_xbar_mux" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_rsp_xbar_mux:rsp_xbar_mux" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_irq_mapper" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_irq_mapper:irq_mapper" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_c0" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_if_nextgen_ddr3_controller_core" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_controller_st_top" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_controller" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_input_if" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_input_if:input_if_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_cmd_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_cmd_gen:cmd_gen_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_tbp" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_arbiter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_arbiter:arbiter_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_burst_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_burst_gen:burst_gen_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_addr_cmd_wrap" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_addr_cmd" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_addr_cmd:gen_bg_afi_signal_decode[0].alt_mem_ddrx_addr_cmd_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_odt_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ddr2_odt_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst|alt_mem_ddrx_ddr2_odt_gen:ddr2_odt_gen[0].alt_mem_ddrx_ddr2_odt_gen_inst" +Thu 15:08: INFO : Warning (12158): Entity "alt_mem_ddrx_ddr2_odt_gen" contains only dangling pins +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ddr3_odt_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst|alt_mem_ddrx_ddr3_odt_gen:ddr3_odt_gen[0].alt_mem_ddrx_ddr3_odt_gen_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rdwr_data_tmg" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdwr_data_tmg:rdwr_data_tmg_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_wdata_path" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_list:wdatap_list_freeid_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_list:wdatap_list_allocated_id_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_burst_tracking" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_burst_tracking:wdatap_burst_tracking_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_dataid_manager" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_dataid_manager:wdatap_dataid_manager_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_dataid_manager:wdatap_dataid_manager_inst|alt_mem_ddrx_list:burstcount_list" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_buffer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "indata_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "64" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "64" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "72" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "72" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ba02.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_ba02 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_ba02" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component|altsyncram_ba02:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_buffer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "indata_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "64" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "64" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "9" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "9" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_b702.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_b702 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_b702" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component|altsyncram_b702:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "2" +Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" +Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "648" +Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "1" +Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_2ue1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: scfifo_2ue1 +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo_2ue1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_b9e1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: a_dpfifo_b9e1 +Thu 15:08: INFO : Info (12128): Elaborating entity "a_dpfifo_b9e1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_5jo1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_5jo1 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_5jo1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo|altsyncram_5jo1:FIFOram" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_2m8.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: cmpr_2m8 +Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_2m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo|cmpr_2m8:almost_full_comparer" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_sh7.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: cntr_sh7 +Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_sh7" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo|cntr_sh7:usedw_counter" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ghb.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: cntr_ghb +Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_ghb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo|cntr_ghb:wr_ptr" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rdata_path" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo" +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "16" +Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" +Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "46" +Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "4" +Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_3ue1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: scfifo_3ue1 +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo_3ue1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_c9e1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: a_dpfifo_c9e1 +Thu 15:08: INFO : Info (12128): Elaborating entity "a_dpfifo_c9e1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_6jo1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_6jo1 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_6jo1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|altsyncram_6jo1:FIFOram" +Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_5m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cmpr_5m8:almost_full_comparer" +Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_5m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cmpr_5m8:three_comparison" +Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_ihb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cntr_ihb:rd_ptr_msb" +Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_vh7" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cntr_vh7:usedw_counter" +Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_jhb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cntr_jhb:wr_ptr" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "8" +Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" +Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "40" +Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "3" +Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_cse1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: scfifo_cse1 +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo_cse1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_l7e1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: a_dpfifo_l7e1 +Thu 15:08: INFO : Info (12128): Elaborating entity "a_dpfifo_l7e1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_pfo1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_pfo1 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_pfo1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|altsyncram_pfo1:FIFOram" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_4m8.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: cmpr_4m8 +Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_4m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|cmpr_4m8:almost_full_comparer" +Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_4m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|cmpr_4m8:three_comparison" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_hhb.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: cntr_hhb +Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_hhb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|cntr_hhb:rd_ptr_msb" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_uh7.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: cntr_uh7 +Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_uh7" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|cntr_uh7:usedw_counter" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_decoder_wrapper" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_64" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst|alt_mem_ddrx_ecc_encoder_64:encoder_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_64_altecc_encoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst|alt_mem_ddrx_ecc_encoder_64:encoder_inst|alt_mem_ddrx_ecc_encoder_64_altecc_encoder:alt_mem_ddrx_ecc_encoder_64_altecc_encoder_component" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64_altecc_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst|alt_mem_ddrx_ecc_decoder_64_altecc_decoder:alt_mem_ddrx_ecc_decoder_64_altecc_decoder_component" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst|alt_mem_ddrx_ecc_decoder_64_altecc_decoder:alt_mem_ddrx_ecc_decoder_64_altecc_decoder_component|alt_mem_ddrx_ecc_decoder_64_decode:error_bit_decoder" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_sideband" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_sideband:sideband_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rank_timer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rank_timer:rank_timer_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_timing_param" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_timing_param:timing_param_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_mm_st_converter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_ddrx_mm_st_converter:a0" +Thu 15:08: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_2_controller" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core" +Thu 15:08: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_2_controller.vhdl(212): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_wrap" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_0002" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_pll0" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_pll0:pll0" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_memphy" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_reset" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_reset:ureset" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_reset:ureset|ddr3_72_800_m_u_q_p0_reset_sync:ureset_afi_clk" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_reset:ureset|ddr3_72_800_m_u_q_p0_reset_sync:ureset_ctl_reset_clk" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_reset:ureset|ddr3_72_800_m_u_q_p0_reset_sync:ureset_addr_cmd_clk" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_datapath" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_address" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_bank" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_cke" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_cs_n" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_ras_n" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_write_datapath" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_extender" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_extender:oct_ena_source_extender" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:afi_dqs_en_shifter" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:afi_wdata_shifter" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:afi_dm_shifter" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].dq_shifter" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].wrdata_mask_shifter" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].wrdata_en_shifter" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_read_datapath" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_read_valid_selector" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector" +Thu 15:08: INFO : Info (12128): Elaborating entity "lpm_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "lpm_decodes" = "16" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "LPM_DECODE" +Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "4" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_read_fifo_hard" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_fifo_hard:read_buffering[0].uread_read_fifo_hard" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_new_io_pads" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:hr_to_fr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:hr_to_fr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:hr_to_fr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:hr_to_fr" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:fr_ddio_out" +Thu 15:08: INFO : Info (12128): Elaborating entity "altddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "extend_oe_disable" = "UNUSED" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:08: INFO : Info (12134): Parameter "invert_output" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altddio_out" +Thu 15:08: INFO : Info (12134): Parameter "oe_reg" = "UNUSED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_high" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "width" = "1" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_clock_pair_generator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_clock_pair_generator:clock_gen[0].uclk_generator" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_core_shadow_registers" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_core_shadow_registers:dq_ddio[0].t11_manager_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_altdqdqs" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs" +Thu 15:08: INFO : Info (12128): Elaborating entity "altdq_dqs2_stratixv_use_shadow_regs" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs|altdq_dqs2_stratixv_use_shadow_regs:altdq_dqs2_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "afi_mux_ddr3_ddrx_use_shadow_regs" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|afi_mux_ddr3_ddrx_use_shadow_regs:m0" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench:the_altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "5" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "5" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "STRATIXV" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_mgr" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_reg_file" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altdpram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "indata_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "indata_reg" = "INCLOCK" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altdpram" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "rdaddress_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "rdaddress_reg" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "width" = "42" +Thu 15:08: INFO : Info (12134): Parameter "widthad" = "6" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena" = "1" +Thu 15:08: INFO : Info (12134): Parameter "wraddress_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "wraddress_reg" = "INCLOCK" +Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_reg" = "INCLOCK" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_sv_wrapper" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_sv_wrapper:sequencer_scc_family_wrapper" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_sv_phase_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_sv_wrapper:sequencer_scc_family_wrapper|sequencer_scc_sv_phase_decode:sequencer_scc_phase_decode_dqe_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_reg_file" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "CLEAR0" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "16" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "16" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "4" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "4" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "4" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_b" = "4" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_phy_mgr" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_data_mgr" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_data_mgr:sequencer_data_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_ddr3" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_generic" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_core" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_inst_ROM_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_m_u_q_s0_inst_ROM.hex" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "128" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "128" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "ROM" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "7" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "7" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "20" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "20" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_nf12.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_nf12 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_nf12" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_nf12:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_ac_ROM_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_m_u_q_s0_AC_ROM.hex" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "40" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "40" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_o832.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_o832 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_o832" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component|altsyncram_o832:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_di_buffer_wrap" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_di_buffer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "4" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "4" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "2" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "2" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "64" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "64" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_datamux" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_datamux:rw_manager_datamux_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_write_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_data_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_data_decoder:DO_decoder" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_dm_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_dm_decoder:DM_decoder_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_lfsr72" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_lfsr72:do_lfsr_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_lfsr12" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_lfsr12:dm_lfsr_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_read_datapath" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_bitcheck" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_bitcheck:bitcheck_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_pattern_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "32" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "5" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "5" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "9" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "9" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_data_broadcast" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_data_broadcast:data_broadcast_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_jumplogic" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_jumplogic:jumplogic_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_datamux" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_datamux:mux_iter[0].datamux_i" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_mem_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "maximum_depth" = "4096" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "4096" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "4" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "12" +Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_m_u_q_s0_sequencer_mem.hex" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "SINGLE_PORT" +Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_feo1.tdf +Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_feo1 +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_feo1" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram|altsyncram_feo1:auto_generated" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_master_translator:cpu_inst_data_master_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_master_translator:cpu_inst_instruction_master_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_translator:sequencer_phy_mgr_inst_avl_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_translator:sequencer_mem_s1_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_translator:sequencer_reg_file_inst_avl_translator" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_master_agent:cpu_inst_data_master_translator_avalon_universal_master_0_agent" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_master_agent:cpu_inst_instruction_master_translator_avalon_universal_master_0_agent" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_agent" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_agent:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_burst_uncompressor" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_agent:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent|altera_merlin_burst_uncompressor:uncompressor" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_avalon_sc_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_avalon_sc_fifo:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent_rsp_fifo" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_addr_router" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_addr_router:addr_router" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_addr_router_default_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_addr_router:addr_router|ddr3_72_800_m_u_q_s0_addr_router_default_decode:the_default_decode" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_addr_router_001" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_addr_router_001:addr_router_001" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_addr_router_001_default_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_addr_router_001:addr_router_001|ddr3_72_800_m_u_q_s0_addr_router_001_default_decode:the_default_decode" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_id_router" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_id_router:id_router" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_id_router_default_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_id_router:id_router|ddr3_72_800_m_u_q_s0_id_router_default_decode:the_default_decode" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_id_router_003" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_id_router_003:id_router_003" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_id_router_003_default_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_id_router_003:id_router_003|ddr3_72_800_m_u_q_s0_id_router_003_default_decode:the_default_decode" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_reset_controller" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_reset_controller:rst_controller" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_reset_synchronizer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_cmd_xbar_demux" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_demux:cmd_xbar_demux" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_cmd_xbar_demux_001" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_demux_001:cmd_xbar_demux_001" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003|altera_merlin_arbitrator:arb" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_rsp_xbar_demux_003" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_rsp_xbar_demux_003:rsp_xbar_demux_003" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_rsp_xbar_mux" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_rsp_xbar_mux:rsp_xbar_mux" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_irq_mapper" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_irq_mapper:irq_mapper" +Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_c0" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_if_nextgen_ddr3_controller_core" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_controller_st_top" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_controller" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_input_if" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_input_if:input_if_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_cmd_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_cmd_gen:cmd_gen_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_tbp" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_arbiter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_arbiter:arbiter_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_burst_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_burst_gen:burst_gen_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_addr_cmd_wrap" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_addr_cmd" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_addr_cmd:gen_bg_afi_signal_decode[0].alt_mem_ddrx_addr_cmd_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_odt_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ddr2_odt_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst|alt_mem_ddrx_ddr2_odt_gen:ddr2_odt_gen[0].alt_mem_ddrx_ddr2_odt_gen_inst" +Thu 15:08: INFO : Warning (12158): Entity "alt_mem_ddrx_ddr2_odt_gen" contains only dangling pins +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ddr3_odt_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst|alt_mem_ddrx_ddr3_odt_gen:ddr3_odt_gen[0].alt_mem_ddrx_ddr3_odt_gen_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rdwr_data_tmg" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdwr_data_tmg:rdwr_data_tmg_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_wdata_path" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_list:wdatap_list_freeid_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_list:wdatap_list_allocated_id_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_burst_tracking" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_burst_tracking:wdatap_burst_tracking_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_dataid_manager" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_dataid_manager:wdatap_dataid_manager_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_dataid_manager:wdatap_dataid_manager_inst|alt_mem_ddrx_list:burstcount_list" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_buffer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "indata_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "64" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "64" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "72" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "72" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_buffer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:08: INFO : Info (12134): Parameter "indata_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "64" +Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "64" +Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" +Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" +Thu 15:08: INFO : Info (12134): Parameter "width_a" = "9" +Thu 15:08: INFO : Info (12134): Parameter "width_b" = "9" +Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" +Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "NONE" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "2" +Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" +Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "648" +Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "1" +Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rdata_path" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo" +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "16" +Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" +Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "46" +Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "4" +Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" +Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: +Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" +Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "8" +Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" +Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" +Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "40" +Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "3" +Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" +Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_decoder_wrapper" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_64" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst|alt_mem_ddrx_ecc_encoder_64:encoder_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_64_altecc_encoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst|alt_mem_ddrx_ecc_encoder_64:encoder_inst|alt_mem_ddrx_ecc_encoder_64_altecc_encoder:alt_mem_ddrx_ecc_encoder_64_altecc_encoder_component" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64_altecc_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst|alt_mem_ddrx_ecc_decoder_64_altecc_decoder:alt_mem_ddrx_ecc_decoder_64_altecc_decoder_component" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst|alt_mem_ddrx_ecc_decoder_64_altecc_decoder:alt_mem_ddrx_ecc_decoder_64_altecc_decoder_component|alt_mem_ddrx_ecc_decoder_64_decode:error_bit_decoder" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_sideband" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_sideband:sideband_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rank_timer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rank_timer:rank_timer_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_timing_param" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_timing_param:timing_param_inst" +Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_mm_st_converter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_ddrx_mm_st_converter:a0" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_oct_stratixv" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|altera_mem_if_oct_stratixv:oct0" +Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_dll_stratixv" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|altera_mem_if_dll_stratixv:dll0" +Thu 15:08: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_3_controller" for hierarchy "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core" +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_3_controller.vhdl(181): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read +Thu 15:09: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_4_controller" for hierarchy "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core" +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_4_controller.vhdl(212): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read +Thu 15:09: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_5_controller" for hierarchy "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core" +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_5_controller.vhdl(181): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read +Thu 15:09: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_6_controller" for hierarchy "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core" +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_6_controller.vhdl(181): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read +Thu 15:09: INFO : Info (12128): Elaborating entity "StratixPCIeBase" for hierarchy "StratixPCIeBase:PCIeBase_i" +Thu 15:09: INFO : Info (12128): Elaborating entity "StratixVHardIPPCIe" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i" +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(514): object "pcie_sv_hard_ip_i_lmi_ack" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(515): object "pcie_sv_hard_ip_i_lmi_dout" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(518): object "pcie_sv_hard_ip_i_tl_cfg_sts" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(519): object "pcie_sv_hard_ip_i_pme_to_sr" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(520): object "pcie_sv_hard_ip_i_currentspeed" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(521): object "pcie_sv_hard_ip_i_derr_cor_ext_rcv" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(522): object "pcie_sv_hard_ip_i_derr_cor_ext_rpl" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(523): object "pcie_sv_hard_ip_i_derr_rpl" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(524): object "pcie_sv_hard_ip_i_dlup" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(525): object "pcie_sv_hard_ip_i_dlup_exit" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(526): object "pcie_sv_hard_ip_i_ev128ns" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(527): object "pcie_sv_hard_ip_i_ev1us" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(528): object "pcie_sv_hard_ip_i_hotrst_exit" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(529): object "pcie_sv_hard_ip_i_int_status" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(530): object "pcie_sv_hard_ip_i_l2_exit" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(531): object "pcie_sv_hard_ip_i_lane_act" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(533): object "pcie_sv_hard_ip_i_rx_par_err" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(534): object "pcie_sv_hard_ip_i_tx_par_err" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(535): object "pcie_sv_hard_ip_i_cfg_par_err" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(536): object "pcie_sv_hard_ip_i_ko_cpl_spc_header" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(537): object "pcie_sv_hard_ip_i_ko_cpl_spc_data" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(546): object "pcie_sv_hard_ip_i_tx_cred_datafccp" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(547): object "pcie_sv_hard_ip_i_tx_cred_datafcnp" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(548): object "pcie_sv_hard_ip_i_tx_cred_datafcp" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(549): object "pcie_sv_hard_ip_i_tx_cred_fchipcons" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(550): object "pcie_sv_hard_ip_i_tx_cred_fcinfinite" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(551): object "pcie_sv_hard_ip_i_tx_cred_hdrfccp" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(552): object "pcie_sv_hard_ip_i_tx_cred_hdrfcnp" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(553): object "pcie_sv_hard_ip_i_tx_cred_hdrfcp" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(557): object "pcie_sv_hard_ip_i_pld_clk_inuse" assigned a value but never read +Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(558): object "pcie_sv_hard_ip_i_testin_zero" assigned a value but never read +Thu 15:09: INFO : Info (12128): Elaborating entity "pcie_SV_hard_ip" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i" +Thu 15:09: INFO : Info (12128): Elaborating entity "altpcie_sv_hip_ast_hwtcl" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst" +Thu 15:09: INFO : Info (12128): Elaborating entity "altpcie_hip_256_pipen1b" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b" +Thu 15:09: INFO : Info (12128): Elaborating entity "altpcie_rs_hip" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|altpcie_rs_hip:g_soft_reset.altpcie_rs_hip" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_xcvr_pipe_native" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_xcvr_emsip_adapter" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_emsip_adapter:sv_xcvr_emsip_adapter_inst" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_xcvr_plls" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_plls:sv_xcvr_tx_plls_inst" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_xcvr_native" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pma" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_rx_pma" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma|sv_rx_pma:rx_pma.sv_rx_pma_inst" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_tx_pma" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma|sv_tx_pma:tx_pma.sv_tx_pma_inst" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_tx_pma_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma|sv_tx_pma:tx_pma.sv_tx_pma_inst|sv_tx_pma_ch:tx_pma_insts[0].sv_tx_pma_ch_inst" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_tx_pma_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma|sv_tx_pma:tx_pma.sv_tx_pma_inst|sv_tx_pma_ch:tx_pma_insts[4].sv_tx_pma_ch_inst" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen1_2_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_pipe_gen1_2_rbc:inst_sv_hssi_pipe_gen1_2" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_common_pcs_pma_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_common_pcs_pma_interface_rbc:inst_sv_hssi_common_pcs_pma_interface" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen3_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_pipe_gen3_rbc:inst_sv_hssi_pipe_gen3" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_tx_pcs_pma_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_tx_pcs_pma_interface_rbc:inst_sv_hssi_tx_pcs_pma_interface" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_tx_pld_pcs_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_tx_pld_pcs_interface_rbc:inst_sv_hssi_tx_pld_pcs_interface" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_common_pld_pcs_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_common_pld_pcs_interface_rbc:inst_sv_hssi_common_pld_pcs_interface" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_rx_pld_pcs_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_rx_pld_pcs_interface_rbc:inst_sv_hssi_rx_pld_pcs_interface" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_rx_pcs_pma_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_rx_pcs_pma_interface_rbc:inst_sv_hssi_rx_pcs_pma_interface" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[1].inst_sv_pcs_ch" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[1].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[1].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[2].inst_sv_pcs_ch" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[2].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[2].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[3].inst_sv_pcs_ch" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[3].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[3].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch" +Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen1_2_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch|sv_hssi_pipe_gen1_2_rbc:inst_sv_hssi_pipe_gen1_2" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen3_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch|sv_hssi_pipe_gen3_rbc:inst_sv_hssi_pipe_gen3" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen1_2_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch|sv_hssi_pipe_gen1_2_rbc:inst_sv_hssi_pipe_gen1_2" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen3_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch|sv_hssi_pipe_gen3_rbc:inst_sv_hssi_pipe_gen3" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[6].inst_sv_pcs_ch" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[6].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[6].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[7].inst_sv_pcs_ch" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[7].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[7].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[8].inst_sv_pcs_ch" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[8].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[8].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xcvr_avmm" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_xcvr_avmm:inst_sv_xcvr_avmm" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_reconfig_bundle_to_xcvr" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_xcvr_avmm:inst_sv_xcvr_avmm|sv_reconfig_bundle_to_xcvr:avmm_interface_insts[0].sv_reconfig_bundle_to_xcvr_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xcvr_avmm_csr" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_xcvr_avmm:inst_sv_xcvr_avmm|sv_xcvr_avmm_csr:avmm_interface_insts[0].sv_xcvr_avmm_csr_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_resync" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_xcvr_avmm:inst_sv_xcvr_avmm|sv_xcvr_avmm_csr:avmm_interface_insts[0].sv_xcvr_avmm_csr_inst|alt_xcvr_resync:gen_status_reg_tx.alt_xcvr_resync_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1:pcie_altclkctrl_i" +Thu 15:10: INFO : Info (12128): Elaborating entity "MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1:pcie_altclkctrl_i|MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh:MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh_component" +Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1.vhd(58): object "clkselect" assigned a value but never read +Thu 15:10: INFO : Info (12128): Elaborating entity "TransceiverReconfig" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i" +Thu 15:10: INFO : Info (12128): Elaborating entity "pcie_xcvr_reconfig_SV" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0" +Thu 15:10: INFO : Info (12128): Elaborating entity "pcie_reconfig_SV" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_resync" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_resync:inst_reconfig_reset_sync" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_arbiter" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_arbiter:arbiter" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_direct" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_direct:direct.sc_direct" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_arbiter_acq" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_direct:direct.sc_direct|alt_arbiter_acq:mutex_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_soc" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_reconfig_cpu" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench:the_alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a" +Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a|altsyncram:the_altsyncram" +Thu 15:10: INFO : Info (12130): Elaborated megafunction instantiation "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a|altsyncram:the_altsyncram" +Thu 15:10: INFO : Info (12133): Instantiated megafunction "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a|altsyncram:the_altsyncram" with the following parameter: +Thu 15:10: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:10: INFO : Info (12134): Parameter "init_file" = "alt_xcvr_reconfig_cpu_reconfig_cpu_rf_ram_a.mif" +Thu 15:10: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:10: INFO : Info (12134): Parameter "numwords_a" = "32" +Thu 15:10: INFO : Info (12134): Parameter "numwords_b" = "32" +Thu 15:10: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:10: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:10: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:10: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" +Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:10: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:10: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:10: INFO : Info (12134): Parameter "widthad_a" = "5" +Thu 15:10: INFO : Info (12134): Parameter "widthad_b" = "5" +Thu 15:10: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_b5t1.tdf +Thu 15:10: INFO : Info (12023): Found entity 1: altsyncram_b5t1 +Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram_b5t1" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a|altsyncram:the_altsyncram|altsyncram_b5t1:auto_generated" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b" +Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b|altsyncram:the_altsyncram" +Thu 15:10: INFO : Info (12130): Elaborated megafunction instantiation "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b|altsyncram:the_altsyncram" +Thu 15:10: INFO : Info (12133): Instantiated megafunction "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b|altsyncram:the_altsyncram" with the following parameter: +Thu 15:10: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:10: INFO : Info (12134): Parameter "init_file" = "alt_xcvr_reconfig_cpu_reconfig_cpu_rf_ram_b.mif" +Thu 15:10: INFO : Info (12134): Parameter "maximum_depth" = "0" +Thu 15:10: INFO : Info (12134): Parameter "numwords_a" = "32" +Thu 15:10: INFO : Info (12134): Parameter "numwords_b" = "32" +Thu 15:10: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" +Thu 15:10: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:10: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" +Thu 15:10: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" +Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" +Thu 15:10: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:10: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:10: INFO : Info (12134): Parameter "widthad_a" = "5" +Thu 15:10: INFO : Info (12134): Parameter "widthad_b" = "5" +Thu 15:10: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_c5t1.tdf +Thu 15:10: INFO : Info (12023): Found entity 1: altsyncram_c5t1 +Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram_c5t1" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b|altsyncram:the_altsyncram|altsyncram_c5t1:auto_generated" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_master_translator:reconfig_cpu_data_master_translator" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_master_translator:reconfig_cpu_instruction_master_translator" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_slave_translator:reconfig_mem_mem_translator" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_slave_translator:reconfig_ctrl_ctrl_translator" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_master_agent:reconfig_cpu_data_master_translator_avalon_universal_master_0_agent" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_master_agent:reconfig_cpu_instruction_master_translator_avalon_universal_master_0_agent" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_slave_agent" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_slave_agent:reconfig_mem_mem_translator_avalon_universal_slave_0_agent" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_burst_uncompressor" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_slave_agent:reconfig_mem_mem_translator_avalon_universal_slave_0_agent|altera_merlin_burst_uncompressor:uncompressor" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_avalon_sc_fifo" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_avalon_sc_fifo:reconfig_mem_mem_translator_avalon_universal_slave_0_agent_rsp_fifo" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_addr_router" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_addr_router:addr_router" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_addr_router_default_decode" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_addr_router:addr_router|alt_xcvr_reconfig_cpu_addr_router_default_decode:the_default_decode" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_addr_router_001" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_addr_router_001:addr_router_001" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_addr_router_001_default_decode" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_addr_router_001:addr_router_001|alt_xcvr_reconfig_cpu_addr_router_001_default_decode:the_default_decode" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_id_router" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_id_router:id_router" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_id_router_default_decode" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_id_router:id_router|alt_xcvr_reconfig_cpu_id_router_default_decode:the_default_decode" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_id_router_001" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_id_router_001:id_router_001" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_id_router_001_default_decode" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_id_router_001:id_router_001|alt_xcvr_reconfig_cpu_id_router_001_default_decode:the_default_decode" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_reset_controller" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_reset_controller:rst_controller" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_reset_synchronizer" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_cmd_xbar_demux" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_demux:cmd_xbar_demux" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_cmd_xbar_demux_001" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_demux_001:cmd_xbar_demux_001" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_cmd_xbar_mux" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_mux:cmd_xbar_mux" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_mux:cmd_xbar_mux|altera_merlin_arbitrator:arb" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_mux:cmd_xbar_mux|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_rsp_xbar_mux" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_rsp_xbar_mux:rsp_xbar_mux" +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_irq_mapper" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_irq_mapper:irq_mapper" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_ram" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst|altsyncram:altsyncram_component" +Thu 15:10: INFO : Info (12130): Elaborated megafunction instantiation "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst|altsyncram:altsyncram_component" +Thu 15:10: INFO : Info (12133): Instantiated megafunction "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst|altsyncram:altsyncram_component" with the following parameter: +Thu 15:10: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" +Thu 15:10: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK0" +Thu 15:10: INFO : Info (12134): Parameter "byte_size" = "8" +Thu 15:10: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" +Thu 15:10: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" +Thu 15:10: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" +Thu 15:10: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" +Thu 15:10: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" +Thu 15:10: INFO : Info (12134): Parameter "init_file" = "alt_xcvr_reconfig_cpu_ram.hex" +Thu 15:10: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:10: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" +Thu 15:10: INFO : Info (12134): Parameter "numwords_a" = "1024" +Thu 15:10: INFO : Info (12134): Parameter "numwords_b" = "1024" +Thu 15:10: INFO : Info (12134): Parameter "operation_mode" = "BIDIR_DUAL_PORT" +Thu 15:10: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" +Thu 15:10: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" +Thu 15:10: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" +Thu 15:10: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" +Thu 15:10: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" +Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA" +Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" +Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" +Thu 15:10: INFO : Info (12134): Parameter "widthad_a" = "10" +Thu 15:10: INFO : Info (12134): Parameter "widthad_b" = "10" +Thu 15:10: INFO : Info (12134): Parameter "width_a" = "32" +Thu 15:10: INFO : Info (12134): Parameter "width_b" = "32" +Thu 15:10: INFO : Info (12134): Parameter "width_byteena_a" = "4" +Thu 15:10: INFO : Info (12134): Parameter "width_byteena_b" = "4" +Thu 15:10: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" +Thu 15:10: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_g653.tdf +Thu 15:10: INFO : Info (12023): Found entity 1: altsyncram_g653 +Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram_g653" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst|altsyncram:altsyncram_component|altsyncram_g653:auto_generated" +Thu 15:10: INFO : Warning (113015): Width of data items in "alt_xcvr_reconfig_cpu_ram.hex" is greater than the memory width. Wrapping data items to subsequent addresses. Found 128 warnings, reporting 10 +Thu 15:10: INFO : Warning (113009): Data at line (2) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (3) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (4) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (5) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (6) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (7) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (8) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (9) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (10) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Warning (113009): Data at line (11) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. +Thu 15:10: INFO : Info (12128): Elaborating entity "altera_wait_generate" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|altera_wait_generate:altera_wait_generate_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cal_seq" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_cal_seq:cal_seq" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_basic" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xcvr_reconfig_basic" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xrbasic_lif" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xrbasic_lif_csr" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xrbasic_l2p_rom" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_rom:l2pch" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xrbasic_l2p_addr" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_addr:l2paddr" +Thu 15:10: INFO : Info (12128): Elaborating entity "csr_mux" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|csr_mux:pif_tbus_mux" +Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_arbiter" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|alt_xcvr_arbiter:pif[0].pif_arb" +Thu 15:10: INFO : Info (12128): Elaborating entity "sv_reconfig_bundle_to_basic" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_reconfig_bundle_to_basic:bundle" +Thu 15:10: INFO : Info (12128): Elaborating entity "MAX4CPLDInterface" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level" +Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4CPLDInterface.vhdl(255): object "cpld_io_ext_inst_maxring_a_top_sb_fb" assigned a value but never read +Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4CPLDInterface.vhdl(256): object "cpld_io_ext_inst_maxring_a_bottom_sb_fb" assigned a value but never read +Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4CPLDInterface.vhdl(257): object "cpld_io_ext_inst_maxring_b_modtx_sb_fb" assigned a value but never read +Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4CPLDInterface.vhdl(258): object "cpld_io_ext_inst_maxring_b_modrx_sb_fb" assigned a value but never read +Thu 15:10: INFO : Info (12128): Elaborating entity "max4_cpld_ioexpand" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_ioexpand:cpld_io_ext_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "MAXEvents" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|MAXEvents:max_events" +Thu 15:10: INFO : Info (12128): Elaborating entity "max_events" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|MAXEvents:max_events|max_events:inst_ln70_maxevents" +Thu 15:10: INFO : Info (12128): Elaborating entity "max4_cpld_flash_if" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst" +Thu 15:10: INFO : Info (12128): Elaborating entity "level_synchroniser" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|level_synchroniser:do_lsync" +Thu 15:10: INFO : Info (12128): Elaborating entity "level_synchroniser_prim" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|level_synchroniser:do_lsync|level_synchroniser_prim:\g_wide:0:g_width2:sync_level_src" +Thu 15:10: INFO : Info (12128): Elaborating entity "strobe_to_strobe" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|strobe_to_strobe:dovld_sts" +Thu 15:10: INFO : Info (12128): Elaborating entity "strobe_to_strobe_prim" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|strobe_to_strobe:dovld_sts|strobe_to_strobe_prim:\g_sync_toggle_wide:0:sync_toggle" +Thu 15:10: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo" +Thu 15:10: INFO : Info (12130): Elaborated megafunction instantiation "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo" +Thu 15:12: INFO : Info (12133): Instantiated megafunction "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo" with the following parameter: +Thu 15:12: INFO : Info (12134): Parameter "add_ram_output_register" = "OFF" +Thu 15:12: INFO : Info (12134): Parameter "allow_rwcycle_when_full" = "OFF" +Thu 15:12: INFO : Info (12134): Parameter "almost_empty_value" = "0" +Thu 15:12: INFO : Info (12134): Parameter "almost_full_value" = "0" +Thu 15:12: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" +Thu 15:12: INFO : Info (12134): Parameter "lpm_numwords" = "512" +Thu 15:12: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" +Thu 15:12: INFO : Info (12134): Parameter "lpm_width" = "64" +Thu 15:12: INFO : Info (12134): Parameter "lpm_widthu" = "9" +Thu 15:12: INFO : Info (12134): Parameter "overflow_checking" = "ON" +Thu 15:12: INFO : Info (12134): Parameter "underflow_checking" = "ON" +Thu 15:12: INFO : Info (12134): Parameter "use_eab" = "ON" +Thu 15:12: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" +Thu 15:12: INFO : Info (12134): Parameter "lpm_type" = "scfifo" +Thu 15:12: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_cql1.tdf +Thu 15:12: INFO : Info (12023): Found entity 1: scfifo_cql1 +Thu 15:12: INFO : Info (12128): Elaborating entity "scfifo_cql1" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated" +Thu 15:12: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_dbe1.tdf +Thu 15:12: INFO : Info (12023): Found entity 1: a_dpfifo_dbe1 +Thu 15:12: INFO : Info (12128): Elaborating entity "a_dpfifo_dbe1" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo" +Thu 15:12: INFO : Warning (12010): Port "pma_adaptdone" on the entity instantiation of "inst_sv_xcvr_avmm" is connected to a signal of width 1. The formal width of the signal in the module is 9. The extra bits will be driven by GND. +Thu 15:12: INFO : Warning (12010): Port "pma_hardoccaldone" on the entity instantiation of "inst_sv_xcvr_avmm" is connected to a signal of width 1. The formal width of the signal in the module is 9. The extra bits will be driven by GND. +Thu 15:12: INFO : Warning (12030): Port "rx_cal_busy" on the entity instantiation of "inst_sv_xcvr_native" is connected to a signal of width 8. The formal width of the signal in the module is 9. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "tx_cal_busy" on the entity instantiation of "inst_sv_xcvr_native" is connected to a signal of width 8. The formal width of the signal in the module is 9. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "rx_signaldetect" on the entity instantiation of "sv_xcvr_emsip_adapter_inst" is connected to a signal of width 9. The formal width of the signal in the module is 8. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:13: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:13: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. +Thu 15:13: INFO : Info (12206): 2 design partitions require synthesis +Thu 15:13: INFO : Info (12210): Partition "Top" requires synthesis because its netlist type is Source File +Thu 15:13: INFO : Info (12210): Partition "MAX4FPGATop:MAX4MaiaFabricTop_i" requires synthesis because its netlist type is Source File +Thu 15:13: INFO : Info (12209): No design partitions will skip synthesis in the current incremental compilation +Thu 15:13: INFO : Warning (14284): Synthesized away the following node(s): +Thu 15:13: INFO : Warning (14285): Synthesized away the following LCELL buffer node(s): +Thu 15:13: INFO : Warning (14320): Synthesized away node "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dprio_read" +Thu 15:13: INFO : Warning (14320): Synthesized away node "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|phase_done" +Thu 15:13: INFO : Warning (14285): Synthesized away the following RAM node(s): +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[16]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[17]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[18]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[19]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[20]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[21]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[22]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[23]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[24]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[25]" +Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[26]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[27]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[28]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[29]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[30]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[31]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[58]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[59]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[60]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[61]" +Thu 15:14: INFO : Warning (14284): Synthesized away the following node(s): +Thu 15:14: INFO : Warning (14285): Synthesized away the following RAM node(s): +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[34]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[35]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[36]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[37]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[38]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[39]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[40]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[41]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[42]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[43]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[44]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[45]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[46]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[47]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[48]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[49]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[50]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[51]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[52]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[53]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[54]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[55]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[56]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[57]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[58]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[59]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[60]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[61]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[62]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[63]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|dpram_fmb1:FIFOram|altsyncram_8ou1:altsyncram1|q_b[11]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|dpram_fmb1:FIFOram|altsyncram_8ou1:altsyncram1|q_b[12]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_values_0_values|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[696]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[696]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[2]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[3]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[4]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[5]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[6]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[7]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[8]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[9]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[10]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[11]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[12]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[13]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[14]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[15]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[16]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[17]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[18]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[19]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[20]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[21]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[22]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[23]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[24]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[25]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[26]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[27]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[28]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[29]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[30]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[31]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[2]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[3]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[4]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[5]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[6]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[7]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[8]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[9]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[10]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[11]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[12]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[13]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[14]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[15]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[16]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[17]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[18]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[19]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[20]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[21]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[22]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[23]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[24]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[25]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[26]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[27]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[28]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[29]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[30]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[31]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[0]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[1]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[2]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[3]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[4]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[5]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[6]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[7]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[0]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[1]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[72]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[82]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[83]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[84]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[85]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[86]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[87]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[88]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[89]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[90]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[91]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[92]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[93]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[94]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[95]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[96]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[97]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[98]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[99]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[100]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[101]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[102]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[103]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[104]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[105]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[106]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[107]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[108]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[109]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[110]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[111]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[112]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[113]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[114]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_48:Stream_48|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1|q_b[1]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo|scfifo_k7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1|q_b[1]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[11]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[12]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[13]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[14]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[15]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[16]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[17]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[18]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[19]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[20]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[21]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[22]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[23]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[24]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[25]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[26]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[27]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[28]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[29]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[30]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[31]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[43]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[44]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[45]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[46]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[47]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[48]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[49]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[50]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[51]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[52]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[53]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[54]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[55]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[56]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[57]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[58]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[59]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[60]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[61]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[62]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[63]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[75]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[76]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[77]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[78]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[79]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[80]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[81]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[82]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[83]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[84]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[85]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[86]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[87]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[88]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[89]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[90]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[91]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[92]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[93]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[94]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[95]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[107]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[108]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[109]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[110]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[111]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[112]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[113]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[114]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[115]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[116]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[117]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[118]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[119]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[120]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[121]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[122]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[123]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[124]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[125]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[126]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[127]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[139]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[140]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[141]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[142]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[143]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[144]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[145]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[146]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[147]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[148]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[149]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[150]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[151]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[152]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[153]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[154]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[155]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[156]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[157]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[158]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[159]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[171]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[172]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[173]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[174]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[175]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[176]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[177]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[178]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[179]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[180]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[181]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[182]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[183]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[184]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[185]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[186]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[187]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[188]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[189]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[190]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[191]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[203]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[204]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[205]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[206]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[207]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[208]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[209]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[210]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[211]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[212]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[213]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[214]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[215]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[216]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[217]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[218]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[219]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[220]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[221]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[222]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[223]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[235]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[236]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[237]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[238]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[239]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[240]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[241]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[242]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[243]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[244]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[245]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[246]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[247]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[248]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[249]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[250]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[251]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[252]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[253]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[254]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[255]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[267]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[268]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[269]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[270]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[271]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[272]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[273]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[274]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[275]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[276]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[277]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[278]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[279]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[280]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[281]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[282]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[283]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[284]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[285]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[286]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[287]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[299]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[300]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[301]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[302]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[303]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[304]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[305]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[306]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[307]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[308]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[309]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[310]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[311]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[312]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[313]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[314]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[315]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[316]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[317]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[318]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[319]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[331]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[332]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[333]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[334]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[335]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[336]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[337]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[338]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[339]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[340]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[341]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[342]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[343]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[344]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[345]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[346]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[347]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[348]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[349]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[350]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[351]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[363]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[364]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[365]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[366]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[367]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[368]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[369]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[370]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[371]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[372]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[373]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[374]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[375]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[376]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[377]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[378]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[379]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[380]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[381]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[382]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[383]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[395]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[396]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[397]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[398]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[399]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[400]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[401]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[402]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[403]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[404]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[405]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[406]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[407]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[408]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[409]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[410]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[411]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[412]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[413]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[414]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[415]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[427]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[428]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[429]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[430]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[431]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[432]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[433]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[434]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[435]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[436]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[437]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[438]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[439]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[440]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[441]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[442]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[443]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[444]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[445]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[446]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[447]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[459]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[460]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[461]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[462]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[463]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[464]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[465]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[466]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[467]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[468]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[469]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[470]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[471]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[472]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[473]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[474]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[475]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[476]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[477]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[478]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[479]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[491]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[492]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[493]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[494]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[495]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[496]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[497]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[498]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[499]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[500]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[501]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[502]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[503]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[504]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[505]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[506]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[507]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[508]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[509]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[510]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[511]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[523]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[524]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[525]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[526]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[527]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[528]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[529]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[530]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[531]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[532]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[533]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[534]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[535]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[536]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[537]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[538]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[539]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[540]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[541]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[542]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[543]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[555]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[556]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[557]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[558]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[559]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[560]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[561]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[562]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[563]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[564]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[565]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[566]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[567]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[568]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[569]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[570]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[571]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[572]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[573]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[574]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[575]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[587]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[588]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[589]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[590]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[591]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[592]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[593]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[594]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[595]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[596]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[597]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[598]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[599]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[600]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[601]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[602]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[603]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[604]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[605]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[606]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[607]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[619]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[620]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[621]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[622]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[623]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[624]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[625]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[626]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[627]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[628]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[629]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[630]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[631]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[632]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[633]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[634]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[635]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[636]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[637]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[638]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[639]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[651]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[652]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[653]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[654]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[655]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[656]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[657]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[658]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[659]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[660]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[661]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[662]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[663]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[664]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[665]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[666]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[667]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[668]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[669]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[670]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[671]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[683]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[684]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[685]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[686]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[687]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[688]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[689]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[690]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[691]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[692]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[693]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[694]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[695]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[696]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[697]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[698]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[699]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[700]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[701]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[702]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[703]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[715]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[716]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[717]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[718]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[719]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[720]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[721]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[722]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[723]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[724]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[725]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[726]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[727]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[728]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[729]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[730]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[731]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[732]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[733]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[734]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[735]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[747]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[748]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[749]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[750]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[751]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[752]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[753]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[754]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[755]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[756]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[757]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[758]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[759]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[760]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[761]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[762]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[763]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[764]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[765]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[766]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[767]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[779]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[780]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[781]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[782]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[783]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[784]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[785]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[786]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[787]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[788]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[789]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[790]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[791]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[792]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[793]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[794]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[795]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[796]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[797]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[798]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[799]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[811]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[812]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[813]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[814]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[815]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[816]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[817]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[818]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[819]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[820]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[821]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[822]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[823]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[824]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[825]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[826]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[827]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[828]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[829]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[830]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[831]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[843]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[844]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[845]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[846]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[847]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[848]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[849]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[850]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[851]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[852]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[853]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[854]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[855]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[856]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[857]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[858]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[859]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[860]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[861]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[862]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[863]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[875]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[876]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[877]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[878]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[879]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[880]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[881]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[882]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[883]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[884]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[885]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[886]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[887]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[888]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[889]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[890]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[891]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[892]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[893]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[894]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[895]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[907]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[908]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[909]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[910]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[911]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[912]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[913]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[914]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[915]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[916]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[917]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[918]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[919]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[920]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[921]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[922]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[923]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[924]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[925]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[926]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[927]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[939]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[940]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[941]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[942]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[943]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[944]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[945]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[946]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[947]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[948]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[949]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[950]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[951]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[952]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[953]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[954]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[955]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[956]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[957]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[958]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[959]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[971]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[972]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[973]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[974]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[975]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[976]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[977]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[978]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[979]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[980]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[981]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[982]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[983]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[984]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[985]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[986]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[987]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[988]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[989]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[990]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[991]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1003]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1004]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1005]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1006]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1007]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1008]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1009]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1010]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1011]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1012]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1013]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1014]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1015]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1016]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1017]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1018]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1019]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1020]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1021]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1022]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1023]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1035]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1036]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1037]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1038]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1039]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1040]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1041]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1042]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1043]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1044]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1045]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1046]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1047]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1048]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1049]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1050]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1051]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1052]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1053]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1054]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1055]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1067]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1068]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1069]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1070]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1071]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1072]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1073]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1074]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1075]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1076]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1077]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1078]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1079]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1080]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1081]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1082]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1083]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1084]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1085]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1086]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1087]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1099]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1100]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1101]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1102]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1103]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1104]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1105]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1106]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1107]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1108]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1109]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1110]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1111]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1112]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1113]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1114]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1115]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1116]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1117]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1118]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1119]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1131]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1132]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1133]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1134]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1135]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1136]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1137]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1138]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1139]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1140]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1141]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1142]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1143]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1144]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1145]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1146]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1147]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1148]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1149]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1150]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1151]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1163]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1164]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1165]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1166]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1167]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1168]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1169]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1170]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1171]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1172]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1173]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1174]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1175]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1176]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1177]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1178]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1179]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1180]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1181]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1182]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1183]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1195]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1196]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1197]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1198]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1199]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1200]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1201]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1202]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1203]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1204]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1205]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1206]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1207]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1208]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1209]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1210]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1211]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1212]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1213]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1214]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1215]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1227]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1228]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1229]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1230]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1231]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1232]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1233]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1234]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1235]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1236]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1237]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1238]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1239]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1240]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1241]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1242]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1243]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1244]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1245]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1246]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1247]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1259]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1260]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1261]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1262]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1263]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1264]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1265]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1266]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1267]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1268]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1269]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1270]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1271]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1272]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1273]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1274]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1275]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1276]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1277]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1278]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1279]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1291]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1292]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1293]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1294]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1295]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1296]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1297]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1298]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1299]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1300]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1301]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1302]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1303]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1304]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1305]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1306]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1307]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1308]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1309]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1310]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1311]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1323]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1324]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1325]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1326]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1327]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1328]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1329]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1330]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1331]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1332]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1333]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1334]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1335]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1336]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1337]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1338]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1339]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1340]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1341]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1342]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1343]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1355]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1356]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1357]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1358]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1359]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1360]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1361]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1362]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1363]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1364]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1365]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1366]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1367]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1368]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1369]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1370]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1371]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1372]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1373]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1374]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1375]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1387]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1388]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1389]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1390]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1391]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1392]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1393]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1394]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1395]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1396]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1397]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1398]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1399]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1400]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1401]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1402]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1403]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1404]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1405]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1406]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1407]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1419]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1420]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1421]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1422]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1423]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1424]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1425]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1426]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1427]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1428]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1429]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1430]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1431]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1432]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1433]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1434]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1435]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1436]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1437]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1438]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1439]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1451]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1452]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1453]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1454]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1455]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1456]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1457]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1458]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1459]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1460]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1461]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1462]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1463]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1464]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1465]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1466]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1467]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1468]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1469]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1470]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1471]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1483]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1484]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1485]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1486]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1487]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1488]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1489]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1490]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1491]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1492]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1493]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1494]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1495]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1496]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1497]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1498]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1499]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1500]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1501]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1502]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1503]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1515]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1516]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1517]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1518]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1519]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1520]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1521]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1522]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1523]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1524]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1525]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1526]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1527]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1528]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1529]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1530]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1531]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1532]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1533]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1534]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1535]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_34:Stream_34|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1|q_b[1]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1|q_b[1]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[0]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[2]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[17]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[18]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[35]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[36]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[37]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[38]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[39]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[40]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[41]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[42]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[43]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[44]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[45]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[46]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[47]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[48]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[49]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[50]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[51]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[52]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[53]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[54]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[55]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[56]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[57]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[58]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[59]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[60]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[61]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[62]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[63]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[64]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[65]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[66]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[67]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[68]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[69]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[70]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[0]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[12]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[13]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[14]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[15]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[16]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[17]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[18]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[67]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[68]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[69]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[70]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[3]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[4]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[5]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[6]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[7]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[8]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[9]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[10]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[11]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[12]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[13]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[14]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[15]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[16]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[17]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[18]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[19]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[20]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[21]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[22]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[23]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[35]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[36]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[37]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[38]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[39]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[40]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[41]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[42]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[43]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[44]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[45]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[46]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[47]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[48]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[49]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[50]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[51]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[52]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[53]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[54]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[55]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[67]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[68]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[69]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[70]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[71]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[72]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[73]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[74]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[75]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[76]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[77]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[78]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[79]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[80]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[81]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[82]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[83]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[84]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[85]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[86]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[87]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[99]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[100]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[101]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[102]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[103]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[104]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[105]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[106]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[107]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[108]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[109]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[110]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[111]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[112]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[113]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[114]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[115]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[116]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[117]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[118]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[119]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[131]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[132]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[133]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[134]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[135]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[136]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[137]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[138]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[139]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[140]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[141]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[142]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[143]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[144]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[145]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[146]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[147]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[148]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[149]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[150]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[151]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[163]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[164]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[165]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[166]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[167]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[168]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[169]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[170]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[171]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[172]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[173]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[174]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[175]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[176]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[177]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[178]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[179]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[180]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[181]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[182]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[183]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[195]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[196]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[197]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[198]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[199]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[200]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[201]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[202]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[203]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[204]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[205]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[206]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[207]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[208]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[209]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[210]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[211]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[212]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[213]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[214]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[215]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[227]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[228]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[229]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[230]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[231]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[232]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[233]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[234]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[235]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[236]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[237]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[238]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[239]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[240]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[241]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[242]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[243]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[244]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[245]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[246]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[247]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[259]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[260]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[261]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[262]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[263]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[264]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[265]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[266]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[267]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[268]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[269]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[270]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[271]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[272]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[273]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[274]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[275]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[276]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[277]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[278]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[279]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[291]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[292]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[293]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[294]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[295]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[296]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[297]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[298]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[299]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[300]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[301]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[302]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[303]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[304]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[305]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[306]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[307]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[308]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[309]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[310]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[311]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[323]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[324]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[325]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[326]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[327]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[328]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[329]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[330]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[331]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[332]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[333]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[334]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[335]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[336]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[337]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[338]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[339]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[340]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[341]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[342]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[343]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[355]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[356]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[357]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[358]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[359]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[360]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[361]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[362]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[363]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[364]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[365]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[366]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[367]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[368]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[369]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[370]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[371]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[372]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[373]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[374]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[375]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[387]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[388]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[389]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[390]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[391]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[392]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[393]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[394]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[395]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[396]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[397]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[398]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[399]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[400]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[401]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[402]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[403]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[404]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[405]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[406]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[407]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[419]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[420]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[421]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[422]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[423]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[424]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[425]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[426]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[427]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[428]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[429]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[430]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[431]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[432]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[433]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[434]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[435]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[436]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[437]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[438]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[439]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[451]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[452]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[453]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[454]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[455]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[456]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[457]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[458]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[459]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[460]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[461]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[462]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[463]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[464]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[465]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[466]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[467]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[468]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[469]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[470]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[471]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[483]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[484]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[485]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[486]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[487]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[488]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[489]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[490]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[491]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[492]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[493]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[494]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[495]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[496]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[497]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[498]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[499]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[500]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[501]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[502]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[503]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[515]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[516]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[517]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[518]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[519]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[520]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[521]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[522]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[523]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[524]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[525]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[526]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[527]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[528]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[529]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[530]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[531]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[532]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[533]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[534]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[535]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[547]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[548]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[549]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[550]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[551]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[552]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[553]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[554]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[555]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[556]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[557]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[558]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[559]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[560]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[561]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[562]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[563]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[564]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[565]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[566]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[567]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[579]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[580]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[581]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[582]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[583]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[584]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[585]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[586]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[587]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[588]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[589]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[590]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[591]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[592]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[593]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[594]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[595]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[596]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[597]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[598]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[599]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[611]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[612]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[613]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[614]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[615]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[616]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[617]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[618]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[619]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[620]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[621]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[622]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[623]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[624]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[625]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[626]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[627]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[628]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[629]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[630]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[631]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[643]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[644]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[645]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[646]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[647]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[648]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[649]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[650]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[651]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[652]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[653]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[654]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[655]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[656]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[657]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[658]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[659]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[660]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[661]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[662]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[663]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[675]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[676]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[677]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[678]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[679]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[680]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[681]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[682]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[683]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[684]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[685]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[686]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[687]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[688]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[689]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[690]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[691]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[692]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[693]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[694]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[695]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[0]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[1]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[2]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[3]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[4]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[5]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[6]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[7]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[8]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[9]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[10]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[11]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[12]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[13]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[14]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[15]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[27]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[28]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[29]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[30]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[31]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[32]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[33]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[34]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[35]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[36]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[37]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[38]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[39]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[40]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[41]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[42]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[43]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[44]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[45]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[46]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[47]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[59]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[60]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[61]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[62]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[63]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[64]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[65]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[66]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[67]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[68]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[69]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[70]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[71]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[72]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[73]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[74]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[75]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[76]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[77]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[78]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[79]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[91]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[92]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[93]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[94]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[95]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[96]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[97]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[98]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[99]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[100]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[101]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[102]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[103]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[104]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[105]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[106]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[107]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[108]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[109]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[110]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[111]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[123]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[124]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[125]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[126]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[127]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[128]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[129]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[130]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[131]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[132]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[133]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[134]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[135]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[136]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[137]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[138]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[139]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[140]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[141]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[142]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[143]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[155]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[156]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[157]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[158]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[159]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[160]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[161]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[162]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[163]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[164]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[165]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[166]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[167]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[168]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[169]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[170]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[171]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[172]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[173]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[174]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[175]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[187]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[188]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[189]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[190]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[191]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[192]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[193]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[194]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[195]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[196]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[197]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[198]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[199]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[200]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[201]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[202]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[203]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[204]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[205]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[206]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[207]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[219]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[220]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[221]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[222]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[223]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[224]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[225]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[226]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[227]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[228]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[229]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[230]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[231]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[232]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[233]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[234]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[235]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[236]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[237]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[238]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[239]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[251]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[252]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[253]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[254]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[255]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[256]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[257]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[258]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[259]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[260]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[261]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[262]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[263]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[264]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[265]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[266]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[267]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[268]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[269]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[270]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[271]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[283]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[284]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[285]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[286]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[287]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[288]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[289]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[290]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[291]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[292]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[293]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[294]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[295]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[296]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[297]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[298]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[299]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[300]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[301]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[302]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[303]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[315]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[316]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[317]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[318]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[319]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[320]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[321]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[322]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[323]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[324]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[325]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[326]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[327]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[328]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[329]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[330]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[331]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[332]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[333]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[334]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[335]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[347]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[348]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[349]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[350]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[351]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[352]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[353]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[354]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[355]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[356]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[357]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[358]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[359]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[360]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[361]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[362]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[363]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[364]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[365]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[366]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[367]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[379]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[380]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[381]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[382]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[383]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[384]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[385]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[386]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[387]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[388]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[389]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[390]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[391]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[392]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[393]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[394]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[395]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[396]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[397]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[398]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[399]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[411]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[412]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[413]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[414]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[415]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[416]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[417]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[418]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[419]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[420]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[421]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[422]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[423]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[424]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[425]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[426]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[427]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[428]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[429]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[430]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[431]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[443]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[444]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[445]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[446]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[447]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[448]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[449]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[450]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[451]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[452]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[453]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[454]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[455]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[456]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[457]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[458]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[459]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[460]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[461]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[462]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[463]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[475]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[476]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[477]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[478]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[479]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[480]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[481]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[482]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[483]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[484]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[485]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[486]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[487]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[488]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[489]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[490]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[491]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[492]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[493]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[494]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[495]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[507]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[508]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[509]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[510]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[511]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[512]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[513]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[514]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[515]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[516]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[517]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[518]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[519]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[520]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[521]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[522]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[523]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[524]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[525]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[526]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[527]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[539]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[540]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[541]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[542]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[543]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[544]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[545]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[546]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[547]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[548]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[549]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[550]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[551]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[552]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[553]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[554]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[555]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[556]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[557]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[558]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[559]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[571]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[572]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[573]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[574]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[575]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[576]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[577]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[578]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[579]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[580]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[581]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[582]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[583]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[584]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[585]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[586]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[587]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[588]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[589]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[590]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[591]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[603]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[604]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[605]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[606]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[607]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[608]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[609]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[610]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[611]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[612]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[613]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[614]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[615]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[616]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[617]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[618]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[619]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[620]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[621]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[622]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[623]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[635]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[636]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[637]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[638]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[639]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[640]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[641]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[642]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[643]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[644]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[645]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[646]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[647]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[648]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[649]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[650]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[651]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[652]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[653]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[654]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[655]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[667]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[668]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[669]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[670]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[671]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[672]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[673]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[674]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[675]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[676]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[677]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[678]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[679]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[680]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[681]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[682]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[683]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[684]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[685]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[686]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[687]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[699]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[700]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[701]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[702]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[703]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[704]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[705]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[706]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[707]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[708]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[709]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[710]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[711]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[712]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[713]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[714]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[715]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[716]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[717]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[718]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[719]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[731]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[732]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[733]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[734]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[735]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[736]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[737]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[738]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[739]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[740]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[741]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[742]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[743]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[744]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[745]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[746]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[747]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[748]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[749]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[750]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[751]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[763]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[764]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[765]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[766]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[767]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[768]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[769]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[770]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[771]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[772]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[773]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[774]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[775]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[776]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[777]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[778]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[779]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[780]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[781]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[782]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[783]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[0]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[1]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[2]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[3]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[4]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[5]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[6]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[7]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[19]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[20]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[21]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[22]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[23]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[24]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[25]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[26]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[27]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[28]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[29]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[30]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[31]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[32]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[33]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[34]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[35]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[36]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[37]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[38]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[39]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[51]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[52]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[53]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[54]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[55]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[56]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[57]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[58]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[59]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[60]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[61]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[62]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[63]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[64]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[65]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[66]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[67]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[68]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[69]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[70]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[71]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[83]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[84]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[85]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[86]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[87]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[88]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[89]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[90]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[91]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[92]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[93]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[94]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[95]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[96]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[97]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[98]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[99]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[100]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[101]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[102]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[103]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[115]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[116]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[117]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[118]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[119]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[120]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[121]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[122]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[123]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[124]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[125]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[126]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[127]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[128]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[129]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[130]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[131]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[132]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[133]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[134]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[135]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[147]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[148]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[149]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[150]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[151]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[152]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[153]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[154]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[155]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[156]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[157]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[158]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[159]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[160]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[161]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[162]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[163]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[164]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[165]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[166]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[167]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[179]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[180]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[181]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[182]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[183]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[184]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[185]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[186]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[187]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[188]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[189]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[190]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[191]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[192]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[193]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[194]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[195]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[196]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[197]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[198]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[199]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[211]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[212]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[213]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[214]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[215]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[216]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[217]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[218]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[219]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[220]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[221]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[222]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[223]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[224]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[225]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[226]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[227]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[228]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[229]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[230]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[231]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[243]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[244]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[245]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[246]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[247]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[248]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[249]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[250]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[251]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[252]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[253]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[254]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[255]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[256]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[257]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[258]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[259]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[260]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[261]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[262]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[263]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[275]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[276]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[277]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[278]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[279]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[280]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[281]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[282]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[283]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[284]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[285]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[286]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[287]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[288]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[289]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[290]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[291]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[292]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[293]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[294]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[295]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[307]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[308]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[309]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[310]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[311]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[312]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[313]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[314]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[315]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[316]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[317]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[318]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[319]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[320]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[321]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[322]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[323]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[324]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[325]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[326]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[327]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[339]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[340]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[341]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[342]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[343]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[344]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[345]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[346]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[347]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[348]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[349]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[350]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[351]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[352]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[353]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[354]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[355]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[356]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[357]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[358]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[359]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[371]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[372]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[373]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[374]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[375]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[376]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[377]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[378]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[379]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[380]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[381]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[382]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[383]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[384]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[385]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[386]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[387]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[388]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[389]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[390]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[391]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[403]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[404]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[405]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[406]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[407]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[408]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[409]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[410]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[411]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[412]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[413]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[414]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[415]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[416]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[417]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[418]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[419]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[420]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[421]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[422]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[423]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[435]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[436]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[437]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[438]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[439]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[440]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[441]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[442]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[443]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[444]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[445]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[446]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[447]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[448]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[449]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[450]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[451]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[452]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[453]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[454]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[455]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[467]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[468]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[469]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[470]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[471]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[472]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[473]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[474]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[475]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[476]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[477]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[478]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[479]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[480]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[481]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[482]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[483]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[484]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[485]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[486]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[487]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[499]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[500]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[501]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[502]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[503]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[504]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[505]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[506]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[507]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[508]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[509]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[510]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[511]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[512]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[513]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[514]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[515]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[516]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[517]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[518]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[519]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[531]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[532]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[533]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[534]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[535]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[536]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[537]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[538]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[539]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[540]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[541]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[542]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[543]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[544]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[545]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[546]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[547]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[548]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[549]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[550]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[551]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[563]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[564]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[565]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[566]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[567]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[568]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[569]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[570]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[571]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[572]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[573]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[574]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[575]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[576]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[577]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[578]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[579]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[580]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[581]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[582]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[583]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[595]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[596]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[597]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[598]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[599]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[600]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[601]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[602]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[603]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[604]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[605]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[606]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[607]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[608]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[609]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[610]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[611]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[612]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[613]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[614]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[615]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[627]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[628]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[629]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[630]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[631]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[632]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[633]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[634]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[635]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[636]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[637]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[638]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[639]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[640]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[641]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[642]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[643]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[644]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[645]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[646]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[647]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[659]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[660]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[661]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[662]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[663]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[664]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[665]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[666]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[667]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[668]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[669]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[670]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[671]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[672]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[673]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[674]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[675]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[676]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[677]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[678]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[679]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[691]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[692]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[693]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[694]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[695]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[696]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[697]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[698]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[699]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[700]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[701]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[702]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[703]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[704]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[705]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[706]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[707]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[708]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[709]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[710]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[711]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[723]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[724]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[725]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[726]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[727]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[728]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[729]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[730]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[731]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[732]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[733]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[734]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[735]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[736]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[737]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[738]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[739]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[740]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[741]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[742]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[743]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[755]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[756]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[757]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[758]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[759]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[760]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[761]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[762]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[763]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[764]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[765]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[766]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[767]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[768]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[769]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[770]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[771]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[772]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[773]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[774]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[775]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[787]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[788]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[789]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[790]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[791]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[11]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[12]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[13]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[14]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[15]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[16]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[17]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[18]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[19]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[20]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[21]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[22]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[23]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[24]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[25]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[26]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[27]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[28]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[29]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[30]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[31]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[43]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[44]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[45]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[46]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[47]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[48]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[49]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[50]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[51]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[52]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[53]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[54]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[55]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[56]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[57]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[58]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[59]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[60]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[61]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[62]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[63]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[75]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[76]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[77]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[78]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[79]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[80]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[81]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[82]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[83]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[84]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[85]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[86]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[87]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[88]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[89]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[90]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[91]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[92]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[93]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[94]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[95]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[107]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[108]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[109]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[110]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[111]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[112]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[113]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[114]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[115]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[116]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[117]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[118]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[119]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[120]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[121]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[122]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[123]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[124]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[125]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[126]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[127]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[139]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[140]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[141]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[142]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[143]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[144]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[145]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[146]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[147]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[148]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[149]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[150]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[151]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[152]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[153]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[154]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[155]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[156]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[157]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[158]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[159]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[171]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[172]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[173]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[174]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[175]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[176]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[177]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[178]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[179]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[180]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[181]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[182]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[183]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[184]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[185]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[186]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[187]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[188]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[189]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[190]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[191]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[203]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[204]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[205]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[206]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[207]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[208]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[209]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[210]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[211]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[212]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[213]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[214]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[215]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[216]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[217]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[218]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[219]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[220]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[221]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[222]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[223]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[235]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[236]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[237]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[238]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[239]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[240]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[241]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[242]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[243]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[244]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[245]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[246]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[247]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[248]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[249]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[250]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[251]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[252]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[253]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[254]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[255]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[267]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[268]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[269]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[270]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[271]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[272]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[273]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[274]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[275]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[276]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[277]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[278]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[279]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[280]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[281]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[282]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[283]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[284]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[285]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[286]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[287]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[299]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[300]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[301]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[302]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[303]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[304]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[305]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[306]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[307]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[308]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[309]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[310]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[311]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[312]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[313]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[314]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[315]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[316]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[317]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[318]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[319]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[331]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[332]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[333]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[334]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[335]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[336]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[337]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[338]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[339]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[340]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[341]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[342]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[343]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[344]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[345]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[346]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[347]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[348]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[349]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[350]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[351]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[363]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[364]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[365]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[366]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[367]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[368]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[369]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[370]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[371]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[372]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[373]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[374]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[375]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[376]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[377]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[378]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[379]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[380]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[381]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[382]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[383]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[395]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[396]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[397]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[398]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[399]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[400]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[401]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[402]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[403]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[404]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[405]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[406]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[407]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[408]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[409]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[410]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[411]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[412]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[413]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[414]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[415]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[427]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[428]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[429]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[430]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[431]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[432]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[433]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[434]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[435]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[436]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[437]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[438]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[439]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[440]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[441]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[442]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[443]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[444]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[445]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[446]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[447]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[459]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[460]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[461]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[462]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[463]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[464]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[465]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[466]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[467]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[468]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[469]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[470]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[471]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[472]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[473]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[474]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[475]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[476]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[477]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[478]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[479]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[491]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[492]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[493]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[494]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[495]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[496]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[497]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[498]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[499]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[500]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[501]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[502]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[503]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[504]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[505]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[506]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[507]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[508]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[509]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[510]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[511]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[523]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[524]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[525]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[526]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[527]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[528]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[529]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[530]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[531]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[532]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[533]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[534]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[535]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[536]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[537]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[538]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[539]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[540]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[541]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[542]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[543]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[555]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[556]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[557]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[558]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[559]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[560]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[561]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[562]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[563]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[564]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[565]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[566]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[567]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[568]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[569]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[570]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[571]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[572]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[573]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[574]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[575]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[587]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[588]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[589]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[590]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[591]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[592]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[593]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[594]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[595]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[596]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[597]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[598]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[599]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[600]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[601]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[602]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[603]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[604]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[605]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[606]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[607]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[619]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[620]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[621]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[622]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[623]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[624]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[625]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[626]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[627]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[628]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[629]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[630]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[631]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[632]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[633]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[634]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[635]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[636]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[637]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[638]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[639]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[651]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[652]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[653]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[654]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[655]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[656]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[657]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[658]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[659]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[660]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[661]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[662]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[663]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[664]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[665]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[666]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[667]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[668]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[669]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[670]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[671]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[683]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[684]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[685]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[686]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[687]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[688]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[689]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[690]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[691]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[692]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[693]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[694]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[695]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[696]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[697]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[698]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[699]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[700]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[701]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[702]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[703]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[715]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[716]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[717]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[718]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[719]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[720]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[721]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[722]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[723]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[724]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[725]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[726]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[727]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[728]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[729]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[730]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[731]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[732]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[733]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[734]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[735]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[747]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[748]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[749]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[750]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[751]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[752]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[753]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[754]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[755]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[756]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[757]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[758]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[759]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[760]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[761]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[762]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[763]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[764]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[765]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[766]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[767]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[779]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[780]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[781]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[782]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[783]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[784]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[785]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[786]" +Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[787]" +Thu 15:19: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[788]" +Thu 15:19: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[789]" +Thu 15:19: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[790]" +Thu 15:19: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[791]" +Thu 15:19: INFO : Info (286031): Timing-Driven Synthesis is running on partition "Top" +Thu 15:19: INFO : Warning (14284): Synthesized away the following node(s): +Thu 15:19: INFO : Warning (14285): Synthesized away the following LCELL buffer node(s): +Thu 15:19: INFO : Warning (14320): Synthesized away node "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|gnd" +Thu 15:19: INFO : Info (19000): Inferred 1 megafunctions from design logic +Thu 15:19: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_rom:l2pch|rom_l2p_ch_rtl_0" +Thu 15:19: INFO : Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT +Thu 15:19: INFO : Info (286033): Parameter WIDTH_A set to 32 +Thu 15:19: INFO : Info (286033): Parameter WIDTH_B set to 32 +Thu 15:19: INFO : Info (286033): Parameter WIDTHAD_A set to 7 +Thu 15:19: INFO : Info (286033): Parameter WIDTHAD_B set to 7 +Thu 15:19: INFO : Info (286033): Parameter NUMWORDS_A set to 128 +Thu 15:19: INFO : Info (286033): Parameter NUMWORDS_B set to 128 +Thu 15:19: INFO : Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED +Thu 15:19: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:19: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 +Thu 15:19: INFO : Info (286033): Parameter INDATA_REG_B set to CLOCK0 +Thu 15:19: INFO : Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0 +Thu 15:19: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:19: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:19: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:19: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:19: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:19: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:19: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_sv_xrbasic_l2p_rom_a2c9d7fe.hdl.mif +Thu 15:23: INFO : Info (12130): Elaborated megafunction instantiation "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_rom:l2pch|altsyncram:rom_l2p_ch_rtl_0" +Thu 15:23: INFO : Info (12133): Instantiated megafunction "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_rom:l2pch|altsyncram:rom_l2p_ch_rtl_0" with the following parameter: +Thu 15:23: INFO : Info (12134): Parameter "OPERATION_MODE" = "BIDIR_DUAL_PORT" +Thu 15:23: INFO : Info (12134): Parameter "WIDTH_A" = "32" +Thu 15:23: INFO : Info (12134): Parameter "WIDTH_B" = "32" +Thu 15:23: INFO : Info (12134): Parameter "WIDTHAD_A" = "7" +Thu 15:23: INFO : Info (12134): Parameter "WIDTHAD_B" = "7" +Thu 15:23: INFO : Info (12134): Parameter "NUMWORDS_A" = "128" +Thu 15:23: INFO : Info (12134): Parameter "NUMWORDS_B" = "128" +Thu 15:23: INFO : Info (12134): Parameter "OUTDATA_REG_A" = "UNREGISTERED" +Thu 15:23: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" +Thu 15:23: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" +Thu 15:23: INFO : Info (12134): Parameter "INDATA_REG_B" = "CLOCK0" +Thu 15:23: INFO : Info (12134): Parameter "WRCONTROL_WRADDRESS_REG_B" = "CLOCK0" +Thu 15:23: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" +Thu 15:23: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" +Thu 15:23: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" +Thu 15:23: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" +Thu 15:23: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" +Thu 15:23: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" +Thu 15:23: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_sv_xrbasic_l2p_rom_a2c9d7fe.hdl.mif" +Thu 15:23: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_dr72.tdf +Thu 15:23: INFO : Info (12023): Found entity 1: altsyncram_dr72 +Thu 15:23: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:5:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. +Thu 15:23: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:4:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. +Thu 15:23: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:2:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. +Thu 15:28: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:1:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. +Thu 15:28: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:0:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. +Thu 15:28: INFO : Info (19000): Inferred 157 megafunctions from design logic +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:5:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:4:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:3:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:2:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:1:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:0:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:5:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:4:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:3:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:2:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:1:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:0:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK +Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF +Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 10 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 9 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 512 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 10 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 9 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 512 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_b2f3a5dc.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 43 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 7 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 128 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 43 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 7 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 128 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_694e02e5.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:5:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:4:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:3:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif +Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0 +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:2:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:1:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:0:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 52 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 5 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 32 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 52 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 5 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 32 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_44069b11.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 52 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 5 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 32 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 52 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 5 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 32 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_44069b11.hdl.mif +Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT +Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 52 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 5 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 32 +Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 52 +Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 5 +Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 32 +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE +Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 +Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE +Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K +Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_44069b11.hdl.mif +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 15 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|ssra_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 15 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv2_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 14 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv3_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 13 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv4_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 12 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id256_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id253_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id250_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id247_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id244_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id241_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id238_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id235_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id232_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id229_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id226_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id223_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id220_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id217_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id214_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv5_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|ssra_rtl_1" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln117_maxdcintegerdiv_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 2 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 8 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 2 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv6_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 10 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln117_maxdcintegerdiv2_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 2 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 7 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv7_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 9 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d:mapped_reg_block|mapped_register:inst_ln504_mappedregblock7|mapped_registers_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 8 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 7 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv8_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 8 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock6|mapped_registers_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 7 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 7 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 5 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 11 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|ssra_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 5 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id588_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id524_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id460_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id396_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id335_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id305_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id304_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id303_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id302_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id301_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id300_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id299_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id298_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id297_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id296_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id295_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id294_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id293_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id292_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id291_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id290_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id289_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id288_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id287_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id286_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id285_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id284_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id283_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id282_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id281_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id280_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id279_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id278_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id277_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id276_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id275_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id274_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id273_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id272_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id271_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id270_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id269_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id268_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id267_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id266_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id265_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id264_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id263_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id262_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id261_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id260_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock|mapped_register:inst_ln504_mappedregblock|mapped_registers_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 8 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|aligned_dataa_exp_dffe12_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 29 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id258_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id257_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id256_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id255_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id254_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id253_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id252_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id251_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id250_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id249_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id248_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id247_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id246_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id245_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id244_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id243_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id242_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id241_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id240_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id239_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id238_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id237_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id236_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id235_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id234_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id233_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id232_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id231_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id230_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id229_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id228_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id227_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id226_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id225_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id224_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id223_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id222_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id221_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id220_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id219_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id218_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id217_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id216_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id215_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id214_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id213_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id212_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" +Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 +Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 +Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 +Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:5:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altdpram:mem_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:5:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altdpram:mem_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "576" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD" = "7" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS" = "128" +Thu 15:28: INFO : Info (12134): Parameter "WRADDRESS_REG" = "INCLOCK" +Thu 15:28: INFO : Info (12134): Parameter "WRADDRESS_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_REG" = "INCLOCK" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "RDADDRESS_REG" = "OUTCLOCK" +Thu 15:28: INFO : Info (12134): Parameter "RDADDRESS_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_REG" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_REG" = "INCLOCK" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "LPM_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif" +Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "LUTRAM" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_5052.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: dpram_5052 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/mux_1kb.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: mux_1kb +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:5:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altdpram:mem_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:5:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altdpram:mem_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "35" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD" = "6" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS" = "64" +Thu 15:28: INFO : Info (12134): Parameter "WRADDRESS_REG" = "INCLOCK" +Thu 15:28: INFO : Info (12134): Parameter "WRADDRESS_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_REG" = "INCLOCK" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "RDADDRESS_REG" = "OUTCLOCK" +Thu 15:28: INFO : Info (12134): Parameter "RDADDRESS_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_REG" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_REG" = "INCLOCK" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR" = "OFF" +Thu 15:28: INFO : Info (12134): Parameter "LPM_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif" +Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "LUTRAM" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_7152.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: dpram_7152 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "10" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "9" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "512" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "10" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "9" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "512" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" +Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_b2f3a5dc.hdl.mif" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ru02.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_ru02 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "43" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "7" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "128" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "43" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "7" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "128" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" +Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_694e02e5.hdl.mif" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_3r02.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_3r02 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:5:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:5:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "576" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "8" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "256" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "576" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "8" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "256" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK1" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" +Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_jh12.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_jh12 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:3:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:3:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "576" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "8" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "256" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "576" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "8" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "256" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" +Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif" +Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_REG_B" = "CLOCK0" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_hr32.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_hr32 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "52" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "5" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "32" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "52" +Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "5" +Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "32" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK1" +Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" +Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" +Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_44069b11.hdl.mif" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_o812.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_o812 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv1_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv1_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "15" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_2u31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_2u31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_f9e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_f9e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_fkf.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_fkf +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_eac.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cmpr_eac +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|altshift_taps:ssra_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|altshift_taps:ssra_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "15" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv2_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv2_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "14" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_1u31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_1u31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_d9e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_d9e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ekf.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_ekf +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv3_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv3_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "13" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_0u31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_0u31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_b9e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_b9e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_dkf.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_dkf +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv4_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv4_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "12" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_vt31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_vt31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_99e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_99e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ckf.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_ckf +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id256_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|altshift_taps:exp_result_ff_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id256_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|altshift_taps:exp_result_ff_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "11" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "63" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_jv31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_jv31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_hce1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_hce1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_bkf.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_bkf +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv5_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv5_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "11" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ut31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ut31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_79e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_79e1 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln117_maxdcintegerdiv_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln117_maxdcintegerdiv_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "2" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "8" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "2" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_js31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_js31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_h6e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_h6e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_0jf.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_0jf +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv6_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv6_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "10" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_tt31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_tt31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_59e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_59e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_akf.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_akf +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln117_maxdcintegerdiv2_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln117_maxdcintegerdiv2_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "2" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "7" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ks31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ks31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_n6e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_n6e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_vif.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_vif +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_dac.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cmpr_dac +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv7_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv7_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "9" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ls31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ls31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_l6e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_l6e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_2jf.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_2jf +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d:mapped_reg_block|mapped_register:inst_ln504_mappedregblock7|altshift_taps:mapped_registers_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d:mapped_reg_block|mapped_register:inst_ln504_mappedregblock7|altshift_taps:mapped_registers_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "8" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "7" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ns31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ns31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_o6e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_o6e1 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv8_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv8_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "8" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ms31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ms31 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock6|altshift_taps:mapped_registers_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock6|altshift_taps:mapped_registers_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "7" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "7" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_os31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_os31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_m6e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_m6e1 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|altshift_taps:data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|altshift_taps:data_exp_dffe1_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "5" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "11" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_3u31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_3u31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_89e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_89e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_tif.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_tif +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|altshift_taps:ssra_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|altshift_taps:ssra_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "5" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "63" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_6u31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_6u31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_l9e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_l9e1 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id588_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|altshift_taps:data_exp_dffe1_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id588_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|altshift_taps:data_exp_dffe1_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "4" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "13" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_4u31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_4u31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_a9e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_a9e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_rif.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_rif +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock|mapped_register:inst_ln504_mappedregblock|altshift_taps:mapped_registers_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock|mapped_register:inst_ln504_mappedregblock|altshift_taps:mapped_registers_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "4" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "8" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ps31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ps31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_f6e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_f6e1 +Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|altshift_taps:aligned_dataa_exp_dffe12_rtl_0" +Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|altshift_taps:aligned_dataa_exp_dffe12_rtl_0" with the following parameter: +Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "3" +Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "29" +Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_7u31.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_7u31 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_j9e1.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_j9e1 +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_qif.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cntr_qif +Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_cac.tdf +Thu 15:28: INFO : Info (12023): Found entity 1: cmpr_cac +Thu 15:29: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id258_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|altshift_taps:delay_exp2_bias_rtl_0" +Thu 15:29: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id258_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|altshift_taps:delay_exp2_bias_rtl_0" with the following parameter: +Thu 15:29: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" +Thu 15:29: INFO : Info (12134): Parameter "TAP_DISTANCE" = "3" +Thu 15:29: INFO : Info (12134): Parameter "WIDTH" = "26" +Thu 15:29: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" +Thu 15:29: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_5u31.tdf +Thu 15:29: INFO : Info (12023): Found entity 1: shift_taps_5u31 +Thu 15:29: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_e9e1.tdf +Thu 15:29: INFO : Info (12023): Found entity 1: altsyncram_e9e1 +Thu 15:29: INFO : Warning (14284): Synthesized away the following node(s): +Thu 15:29: INFO : Warning (14285): Synthesized away the following RAM node(s): +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a43" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a43" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a43" +Thu 15:29: INFO : Warning (14284): Synthesized away the following node(s): +Thu 15:29: INFO : Warning (14285): Synthesized away the following RAM node(s): +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a44" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a45" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a46" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a47" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a49" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a50" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a51" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a44" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a45" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a46" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a47" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a49" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a50" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a51" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a44" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a45" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a46" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a47" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a49" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a50" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a51" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a2" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a3" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a4" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a5" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a6" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a7" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a8" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a9" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a10" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a11" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a12" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a13" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a14" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a15" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a16" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a17" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a18" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a19" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a20" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a21" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a22" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a23" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a24" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a25" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a26" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a27" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a28" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a29" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a30" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a31" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a32" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a33" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a34" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a35" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a36" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a37" +Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a38" +Thu 15:34: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a39" +Thu 15:34: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a40" +Thu 15:34: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a41" +Thu 15:34: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_ru02:auto_generated|ram_block1a9" +Thu 15:34: INFO : Warning (12241): 2 hierarchies have connectivity warnings - see the Connectivity Checks report folder +Thu 15:34: INFO : Info (281020): Starting Logic Optimization and Technology Mapping for Top Partition +Thu 15:34: INFO : Warning (286002): Ignored following assignments for SYNTH_CRITICAL_CLOCK +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|clk_pcie" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm1_clk_afi_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm1_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm2_clk_afi_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm2_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm3_clk_afi_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm3_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm4_clk_afi_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm4_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm5_clk_afi_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm5_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm6_clk_afi_clk" -- no registers were found for this clock +Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm6_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:34: INFO : Info (18062): Inserted logic cells for Maximum Fan-Out assignment +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" +Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" +Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" +Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" +Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" +Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" +Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" +Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" +Thu 15:34: INFO : Info (17049): 43822 registers lost all their fanouts during netlist optimizations. +Thu 15:34: INFO : Info (17016): Found the following redundant logic cells in design +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" +Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" +Thu 15:34: INFO : Info (21057): Implemented 101076 device resources after synthesis - the final resource count might be different +Thu 15:34: INFO : Info (21058): Implemented 20 input pins +Thu 15:34: INFO : Info (21059): Implemented 208 output pins +Thu 15:34: INFO : Info (21060): Implemented 566 bidirectional pins +Thu 15:34: INFO : Info (21061): Implemented 84401 logic cells +Thu 15:34: INFO : Info (21064): Implemented 6208 RAM segments +Thu 15:34: INFO : Info (21065): Implemented 18 PLLs +Thu 15:34: INFO : Info (21066): Implemented 2 delay-locked loops +Thu 15:34: INFO : Info (21071): Implemented 1 partitions +Thu 15:48: INFO : Info (281019): Starting Logic Optimization and Technology Mapping for Partition MAX4FPGATop:MAX4MaiaFabricTop_i +Thu 15:48: INFO : Critical Warning (18061): Ignored Power-Up Level option on the following registers +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_left_dimm_scl_from_host_int will power up to Low +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_left_dimm_sda_from_host_int will power up to Low +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_right_dimm_scl_from_host_int will power up to Low +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_right_dimm_sda_from_host_int will power up to Low +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_aux_scl_from_host_int will power up to Low +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_aux_sda_from_host_int will power up to Low +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|pmbus_scl_from_host_int will power up to Low +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|pmbus_sda_from_host_int will power up to Low +Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|mapped_elements_reset_i will power up to Low +Thu 15:48: INFO : Warning (286004): Ignored following assignments for SYNTH_CRITICAL_CLOCK for partition "MAX4FPGATop:MAX4MaiaFabricTop_i" +Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm1_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm2_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm3_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm4_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm5_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm6_clk_afi_half_clk" -- no registers were found for this clock +Thu 15:48: INFO : Info (17049): 20139 registers lost all their fanouts during netlist optimizations. +Thu 15:48: INFO : Info (21057): Implemented 340805 device resources after synthesis - the final resource count might be different +Thu 15:48: INFO : Info (21058): Implemented 3838 input pins +Thu 15:48: INFO : Info (21059): Implemented 3954 output pins +Thu 15:48: INFO : Info (21061): Implemented 299321 logic cells +Thu 15:48: INFO : Info (21064): Implemented 33500 RAM segments +Thu 15:48: INFO : Info (21062): Implemented 192 DSP elements +Thu 15:48: INFO : Info: Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 3831 warnings +Thu 15:48: INFO : Info: Peak virtual memory: 8710 megabytes +Thu 15:48: INFO : Info: Processing ended: Thu Sep 10 15:48:53 2015 +Thu 15:48: INFO : Info: Elapsed time: 00:49:49 +Thu 15:48: INFO : Info: Total CPU time (on all processors): 00:48:06 +Thu 15:48: INFO : quartus_map ended (15:48:57 10/09/15, time elapsed: 49 mins, 56 secs) +Thu 15:48: INFO : quartus_map peak virtual memory: 8710 +Thu 15:48: INFO : Build pass 'QuartusMap' took 2996.74 s. +Thu 15:48: PROGRESS: (3/10) - Generate Incremental Netlist (QuartusCdb) +Thu 15:48: INFO : Starting quartus_cdb. (15:48:58 10/09/15) +Thu 15:48: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; quartus_cdb MAX4MAIAPeripheryTop --64bit --write_settings_files=off --merge=on +Thu 15:51: INFO : Info: ******************************************************************* +Thu 15:51: INFO : Info: Running Quartus II 64-Bit Partition Merge +Thu 15:51: INFO : Info: Version 13.0.0 Build 156 04/24/2013 SJ Full Version +Thu 15:51: INFO : Info: Copyright (C) 1991-2013 Altera Corporation. All rights reserved. +Thu 15:51: INFO : Info: Your use of Altera Corporation's design tools, logic functions +Thu 15:51: INFO : Info: and other software and tools, and its AMPP partner logic +Thu 15:51: INFO : Info: functions, and any output files from any of the foregoing +Thu 15:51: INFO : Info: (including device programming or simulation files), and any +Thu 15:51: INFO : Info: associated documentation or information are expressly subject +Thu 15:51: INFO : Info: to the terms and conditions of the Altera Program License +Thu 15:51: INFO : Info: Subscription Agreement, Altera MegaCore Function License +Thu 15:51: INFO : Info: Agreement, or other applicable license agreement, including, +Thu 15:51: INFO : Info: without limitation, that your use is for the sole purpose of +Thu 15:51: INFO : Info: programming logic devices manufactured by Altera and sold by +Thu 15:51: INFO : Info: Altera or its authorized distributors. Please refer to the +Thu 15:51: INFO : Info: applicable agreement for further details. +Thu 15:51: INFO : Info: Processing started: Thu Sep 10 15:49:07 2015 +Thu 15:51: INFO : Info: Command: quartus_cdb MAX4MAIAPeripheryTop --write_settings_files=off --merge=on +Thu 15:51: INFO : Info (35007): Using synthesis netlist for partition "Top" +Thu 15:51: INFO : Info (35007): Using synthesis netlist for partition "MAX4FPGATop:MAX4MaiaFabricTop_i" +Thu 15:51: INFO : Info (35002): Resolved and merged 2 partition(s) +Thu 15:51: INFO : Info (16010): Generating hard_block partition "hard_block:auto_generated_inst" +Thu 15:51: INFO : Info (16011): Adding 12442 node(s), including 2724 DDIO, 18 PLL, 0 transceiver and 0 LCELL +Thu 15:51: INFO : Info (35048): Found 96 ports with constant drivers. For more information, refer to the Partition Merger report +Thu 15:51: INFO : Info (35047): Found 140 ports with no fan-out. For more information, refer to the Partition Merger report +Thu 15:51: INFO : Warning (35016): Found partition port(s) not driving logic, possibly wasting area +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[1]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[3]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[5]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[6]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[7]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[13]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[14]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[15]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[16]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[17]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[18]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[19]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[20]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[21]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[22]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[23]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[24]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[25]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:52: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[26]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:52: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[27]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic +Thu 15:52: INFO : Warning (35039): Only the first 20 ports are reported. For a full list of ports, refer to the Partition Warnings panel in the Partition Merge report +Thu 15:52: INFO : Info (21057): Implemented 434126 device resources after synthesis - the final resource count might be different +Thu 15:52: INFO : Info (21058): Implemented 20 input pins +Thu 15:52: INFO : Info (21059): Implemented 208 output pins +Thu 15:52: INFO : Info (21060): Implemented 566 bidirectional pins +Thu 15:52: INFO : Info (21061): Implemented 383760 logic cells +Thu 15:52: INFO : Info (21064): Implemented 39708 RAM segments +Thu 15:52: INFO : Info (21065): Implemented 18 PLLs +Thu 15:52: INFO : Info (21066): Implemented 2 delay-locked loops +Thu 15:52: INFO : Info (21062): Implemented 192 DSP elements +Thu 15:52: INFO : Info: Quartus II 64-Bit Partition Merge was successful. 0 errors, 22 warnings +Thu 15:52: INFO : Info: Peak virtual memory: 3226 megabytes +Thu 15:52: INFO : Info: Processing ended: Thu Sep 10 15:52:47 2015 +Thu 15:52: INFO : Info: Elapsed time: 00:03:40 +Thu 15:52: INFO : Info: Total CPU time (on all processors): 00:03:35 +Thu 15:52: INFO : quartus_cdb ended (15:52:48 10/09/15, time elapsed: 3 mins, 49 secs) +Thu 15:52: INFO : quartus_cdb peak virtual memory: 3226 +Thu 15:52: INFO : Build pass 'QuartusCdb' took 229.732 s. +Thu 15:52: PROGRESS: (4/10) - Generate Resource Report (AlteraResourceUsageBuildPass) +Thu 15:52: INFO : Build pass 'AlteraResourceUsageBuildPass' took 9.03282 s. +Thu 15:52: PROGRESS: (5/10) - Generate Annotated Source Code (AlteraResourceAnnotationBuildPass) +Thu 15:52: INFO : Annotating source files (old source files in build directory will be removed first)... +Thu 15:52: INFO : Not deleting directory (does not exist): src_annotated_preliminary +Thu 15:53: INFO : annotated 2 source files +Thu 15:53: INFO : Build pass 'AlteraResourceAnnotationBuildPass' took 36.8625 s. +Thu 15:53: PROGRESS: (6/10) - Analyse Resource Usage (AlteraResourceCounterPass) +Thu 15:53: PROGRESS: +Thu 15:53: PROGRESS: About to start chip vendor Map/Place/Route toolflow. This will take some time. +Thu 15:53: PROGRESS: For this compile, we estimate this process may take longer than 1 hour. +Thu 15:53: PROGRESS: We recommend running in simulation to verify correctness before building hardware. +Thu 15:53: PROGRESS: +Thu 15:53: PROGRESS: PRELIMINARY RESOURCE USAGE +Thu 15:53: PROGRESS: Logic utilization: 165245 / 262400 (62.97%) +Thu 15:53: PROGRESS: Multipliers (18x18): 384 / 3926 (9.78%) +Thu 15:53: PROGRESS: Block memory (bits): 18523554 / 52572160 (35.23%) +Thu 15:53: PROGRESS: +Thu 15:53: INFO : Build pass 'AlteraResourceCounterPass' took 1.37804 ms. +Thu 15:53: PROGRESS: (7/10) - Place and Route DFE (AlteraMPPR) +Thu 15:53: PROGRESS: Executing MPPR with 2 cost tables and 2 threads. +Thu 15:53: PROGRESS: MPPR: Starting 2 cost tables +Thu 15:53: INFO : Created new sub build manager running in: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/scratch/altera_quartus/ct1 +Thu 15:53: INFO : For detailed output from this sub build manager see: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/scratch/altera_quartus/ct1/_build.log +Thu 15:53: INFO : Created new sub build manager running in: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/scratch/altera_quartus/ct2 +Thu 15:53: INFO : For detailed output from this sub build manager see: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/scratch/altera_quartus/ct2/_build.log +Thu 21:47: INFO : Creating timing report for cost table(s): 2 +Thu 21:48: INFO : Timing report successfully written. +Thu 21:50: INFO : Updating timing report for cost table(s): 1 +Thu 21:50: INFO : Timing report successfully written. +Thu 22:03: PROGRESS: MPPR: Cost table 2 failed timing with score 78 (best score 78) +Thu 22:06: PROGRESS: MPPR: Cost table 1 failed timing with score 171 (best score 78) +Thu 22:06: PROGRESS: MPPR: Failed to meet timing! Best score: 78 +Thu 22:06: INFO : Build pass 'AlteraMPPR' took 22348.8 s. +Thu 22:06: PROGRESS: (8/10) - Generate Resource Report (AlteraResourceUsageBuildPass) +Thu 22:06: INFO : Build pass 'AlteraResourceUsageBuildPass' took 12.1262 s. +Thu 22:06: PROGRESS: (9/10) - Generate Annotated Source Code (AlteraResourceAnnotationBuildPass) +Thu 22:06: INFO : Annotating source files (old source files in build directory will be removed first)... +Thu 22:06: INFO : Not deleting directory (does not exist): src_annotated +Thu 22:06: INFO : annotated 2 source files +Thu 22:06: INFO : Build pass 'AlteraResourceAnnotationBuildPass' took 36.9082 s. +Thu 22:06: PROGRESS: (10/10) - Generate MaxFile (GenerateMaxFileAltera) +Thu 22:06: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/maxfilestitch" -a -w -m 1 -b 20150910 "../MaxCompilerDesignData.dat" "ct2/altera_quartus/MAX4MAIAPeripheryTop.periph.rbf" "ct2/altera_quartus/MAX4MAIAPeripheryTop.core.rbf" "Spmv.max" c5a15cf60313101b21f23afd2d9b07db3fdd8b5245619cd8f538c6bc27cc7066 78 2>&1 | tee maxfilestitch.log ; exit ${PIPESTATUS[0]} +Thu 22:06: INFO : Input files: +Thu 22:06: INFO : DAT: ../MaxCompilerDesignData.dat +Thu 22:06: INFO : Periph RBF: ct2/altera_quartus/MAX4MAIAPeripheryTop.periph.rbf +Thu 22:06: INFO : Core RBF: ct2/altera_quartus/MAX4MAIAPeripheryTop.core.rbf +Thu 22:06: INFO : Output files: +Thu 22:06: INFO : MAX: Spmv.max +Thu 22:06: INFO : Hash: c5a15cf60313101b21f23afd2d9b07db3fdd8b5245619cd8f538c6bc27cc7066 +Thu 22:06: INFO : Timing score: 78 +Thu 22:06: INFO : Build pass 'GenerateMaxFileAltera' took 5.85651 s. +Thu 22:06: INFO : Final result files after build: +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvCacheKernel_original.pxg" +Thu 22:06: INFO : Spmv_SpmvCacheKernel_original.pxg (BuildFilePXG) +Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvCacheKernel_Configuration.txt" +Thu 22:06: INFO : SpmvCacheKernel_Configuration.txt (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvCacheKernel_NodeDiary.txt" +Thu 22:06: INFO : SpmvCacheKernel_NodeDiary.txt (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvCacheKernel_final-hardware.pxg" +Thu 22:06: INFO : Spmv_SpmvCacheKernel_final-hardware.pxg (BuildFilePXG) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvKernel_original.pxg" +Thu 22:06: INFO : Spmv_SpmvKernel_original.pxg (BuildFilePXG) +Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvKernel_Configuration.txt" +Thu 22:06: INFO : SpmvKernel_Configuration.txt (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvKernel_NodeDiary.txt" +Thu 22:06: INFO : SpmvKernel_NodeDiary.txt (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvKernel_final-hardware.pxg" +Thu 22:06: INFO : Spmv_SpmvKernel_final-hardware.pxg (BuildFilePXG) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvReductionKernel_original.pxg" +Thu 22:06: INFO : Spmv_SpmvReductionKernel_original.pxg (BuildFilePXG) +Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvReductionKernel_Configuration.txt" +Thu 22:06: INFO : SpmvReductionKernel_Configuration.txt (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvReductionKernel_NodeDiary.txt" +Thu 22:06: INFO : SpmvReductionKernel_NodeDiary.txt (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvReductionKernel_final-hardware.pxg" +Thu 22:06: INFO : Spmv_SpmvReductionKernel_final-hardware.pxg (BuildFilePXG) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvPaddingKernel_original.pxg" +Thu 22:06: INFO : Spmv_SpmvPaddingKernel_original.pxg (BuildFilePXG) +Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvPaddingKernel_Configuration.txt" +Thu 22:06: INFO : SpmvPaddingKernel_Configuration.txt (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvPaddingKernel_NodeDiary.txt" +Thu 22:06: INFO : SpmvPaddingKernel_NodeDiary.txt (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvPaddingKernel_final-hardware.pxg" +Thu 22:06: INFO : Spmv_SpmvPaddingKernel_final-hardware.pxg (BuildFilePXG) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv.xml" +Thu 22:06: INFO : Spmv.xml (BuildFile) +Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv.h" +Thu 22:06: INFO : Spmv.h (BuildFileSlicH) +Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/Spmv_map.mxru" +Thu 22:06: INFO : Spmv_map.mxru (BuildFileMXRU) +Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.sta.rpt.tns" +Thu 22:06: INFO : MAX4MAIAPeripheryTop.sta.rpt.tns (BuildFileStaTns) +Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.sof" +Thu 22:06: INFO : MAX4MAIAPeripheryTop.sof (BuildFileStage2SOF) +Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.core.rbf" +Thu 22:06: INFO : MAX4MAIAPeripheryTop.core.rbf (BuildFileStage2CoreRBF) +Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.periph.rbf" +Thu 22:06: INFO : MAX4MAIAPeripheryTop.periph.rbf (BuildFileStage2PeriphRBF) +Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.rbf" +Thu 22:06: INFO : MAX4MAIAPeripheryTop.rbf (BuildFileStage2FullRBF) +Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/Spmv_fit.mxru" +Thu 22:06: INFO : Spmv_fit.mxru (BuildFileMXRU) +Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/Spmv.max" +Thu 22:06: INFO : Spmv.max (BuildFileMaxFile) +Thu 22:06: PROGRESS: +Thu 22:06: PROGRESS: FINAL RESOURCE USAGE +Thu 22:06: PROGRESS: Logic utilization: 145486 / 262400 (55.44%) +Thu 22:06: PROGRESS: Primary FFs: 245553 / 524800 (46.79%) +Thu 22:06: PROGRESS: Secondary FFs: 11173 / 524800 (2.13%) +Thu 22:06: PROGRESS: Multipliers (18x18): 384 / 3926 (9.78%) +Thu 22:06: PROGRESS: DSP blocks: 192 / 1963 (9.78%) +Thu 22:06: PROGRESS: Block memory (M20K): 1298 / 2567 (50.56%) +Thu 22:06: PROGRESS: +Thu 22:06: PROGRESS: MaxFile: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/results/Spmv.max (MD5Sum: 0e9dbf797344f3957d7a9d9b95516714) +Thu 22:06: ERROR : FAILED TO MEET TIMING! Best timing score: 78. We strongly recommend you do not use this .max file. +Thu 22:06: ERROR : Please see the timing report for more information and consult the MaxCompiler optimization cheat sheet for ideas on how to improve your design. +Thu 22:06: ERROR : Timing report: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/timingreport/index.html +Thu 22:06: ERROR : MaxCompiler documentation: /vol/cc/opt/maxeler/maxcompiler-2013.2.2/docs/maxcompiler-optimization-cheat-sheet.pdf +Thu 22:06: INFO : Waiting for any outstanding jobs to finish... +Thu 22:06: INFO : Timing Analyser shutting down. +Thu 22:06: INFO : Timing Report: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/timingreport/index.html +Thu 22:06: ERROR : ---------------------------- +Thu 22:06: ERROR : Exception in thread "main": +Thu 22:06: ERROR : +Thu 22:06: ERROR : Build failed to meet timing (best timing score 78) +Thu 22:06: ERROR : +Thu 22:06: ERROR : Exception Stack Trace com.maxeler.maxdc.BuildFailedTimingException: +Thu 22:06: ERROR : at com.maxeler.maxdc.BuildManager.finalizeBuild(BuildManager.java:1699) +Thu 22:06: ERROR : at com.maxeler.maxdc.BuildManager.build(BuildManager.java:1563) +Thu 22:06: ERROR : at com.maxeler.maxcompiler.v2.managers.DFEManager.runBuild(DFEManager.java:361) +Thu 22:06: ERROR : at com.maxeler.maxcompiler.v2.managers._Managers.runBuild(_Managers.java:16) +Thu 22:06: ERROR : at com.maxeler.maxcompiler.v2.managers.custom.CustomManager.realBuild(CustomManager.java:1381) +Thu 22:06: ERROR : at com.maxeler.maxcompiler.v2.managers.DFEManager.build(DFEManager.java:339) +Thu 22:06: ERROR : at SpmvManager.main(SpmvManager.maxj:145) +Thu 22:06: ERROR : ---------------------------- diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt new file mode 100644 index 0000000..3ad1fe8 --- /dev/null +++ b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt @@ -0,0 +1,155 @@ + +Total resource usage +----------------------------------------------------------------- + LUTs FFs BRAMs DSPs + 524800 1049600 2567 1963 total available resources for FPGA + 178215 256726 1298 192 total resources used + 33.96% 24.46% 50.56% 9.78% % of available + 106398 142250 616 192 used by kernels + 20.27% 13.55% 24.00% 9.78% % of available + 70847 112634 671 0 used by manager + 13.50% 10.73% 26.14% 0.00% % of available + 127363 198534 1100 192 stray resources + 24.27% 18.92% 42.85% 9.78% % of available + +High level manager breakdown aggregated by type +----------------------------------------------------------------- + LUTs FFs BRAMs DSPs Type Occurrences + 538 1227 0 0 AddrGen 3 + 39 37 1 0 ChecksumMappedDRP 1 + 641 636 0 0 DualAspectMux 3 + 19 3138 0 0 DualAspectReg 2 + 1025 1028 199 0 Fifo 20 + 106398 142250 616 192 Kernel 4 + 140 215 0 0 MAX4CPLD 1 + 733 1020 2 0 MAX4PCIeSlaveInterface 1 + 21 51 0 0 MAXEvents 1 + 82 171 0 0 ManagerStateMachine_csrD 1 + 1655 536 0 0 ManagerStateMachine_read 1 + 469 84 0 0 MappedElementSwitch 1 + 443 997 5 0 MappedMemoriesController 1 + 160 130 0 0 MappedRegistersControlle 1 + 16013 48002 281 0 MemoryControllerPro 1 + 1630 847 4 0 PCIeBase 1 + 1497 1608 34 0 PCIeSlaveStreaming 1 + 269 393 0 0 PerfMonitor 1 + 16 23 0 0 ResetControl 2 + 88 186 0 0 SanityBlock 1 + 98 90 1 0 SignalForwardingAdapter 1 + 45269 52214 144 0 StratixVDDR3 6 + 2 1 0 0 StreamPullPushAdapter 1 + 0 0 0 0 Memory Controller -- + 0 0 0 0 Other InterFPGA -- + 1050 1297 8 0 Other MappedElements -- + 2903 3834 42 0 Other PCIe -- + +Kernel breakdown +----------------------------------------------------------------- + LUTs FFs BRAMs DSPs category + 106398 142250 616 192 total for all kernels + 20.27% 13.55% 24.00% 9.78% % of total available + +Totals for each kernel + LUTs FFs BRAMs DSPs Kernel name + 30747 40877 337 0 SpmvCacheKernel (total) + 5.86% 3.89% 13.13% 0.00% % of total available + 30630 4741 336 0 SpmvCacheKernel (user) + 5.84% 0.45% 13.09% 0.00% % of total available + 0 29542 0 0 SpmvCacheKernel (scheduling) + 0.00% 2.81% 0.00% 0.00% % of total available + 117 6594 1 0 SpmvCacheKernel (other Kernel resources) + 0.02% 0.63% 0.04% 0.00% % of total available + 73645 97694 149 192 SpmvKernel (total) + 14.03% 9.31% 5.80% 9.78% % of total available + 73442 96704 142 192 SpmvKernel (user) + 13.99% 9.21% 5.53% 9.78% % of total available + 60 517 6 0 SpmvKernel (scheduling) + 0.01% 0.05% 0.23% 0.00% % of total available + 143 473 1 0 SpmvKernel (other Kernel resources) + 0.03% 0.05% 0.04% 0.00% % of total available + 363 944 0 0 SpmvPaddingKernel (total) + 0.07% 0.09% 0.00% 0.00% % of total available + 316 534 0 0 SpmvPaddingKernel (user) + 0.06% 0.05% 0.00% 0.00% % of total available + 0 5 0 0 SpmvPaddingKernel (scheduling) + 0.00% 0.00% 0.00% 0.00% % of total available + 47 405 0 0 SpmvPaddingKernel (other Kernel resources) + 0.01% 0.04% 0.00% 0.00% % of total available + 1643 2735 130 0 SpmvReductionKernel (total) + 0.31% 0.26% 5.06% 0.00% % of total available + 1513 2132 130 0 SpmvReductionKernel (user) + 0.29% 0.20% 5.06% 0.00% % of total available + 0 14 0 0 SpmvReductionKernel (scheduling) + 0.00% 0.00% 0.00% 0.00% % of total available + 130 589 0 0 SpmvReductionKernel (other Kernel resources) + 0.02% 0.06% 0.00% 0.00% % of total available + + +Manager breakdown +----------------------------------------------------------------- + LUTs FFs BRAMs DSPs Type Instance + 30747 40877 337 0 Kernel SpmvCacheKernel + 73645 97694 149 192 Kernel SpmvKernel + 363 944 0 0 Kernel SpmvPaddingKernel + 1643 2735 130 0 Kernel SpmvReductionKernel + 17 3072 0 0 DualAspectReg Stream_14 + 533 531 0 0 DualAspectMux Stream_17 + 39 37 0 0 DualAspectMux Stream_1 + 69 68 0 0 DualAspectMux Stream_31 + 43 32 1 0 Fifo Stream_34 + 43 33 2 0 Fifo Stream_36 + 43 33 1 0 Fifo Stream_38 + 44 32 1 0 Fifo Stream_40 + 44 34 77 0 Fifo Stream_42 + 44 33 77 0 Fifo Stream_44 + 43 34 1 0 Fifo Stream_46 + 43 33 1 0 Fifo Stream_48 + 43 33 1 0 Fifo Stream_50 + 43 33 1 0 Fifo Stream_52 + 45 33 2 0 Fifo Stream_55 + 45 36 2 0 Fifo Stream_58 + 39 31 1 0 Fifo Stream_5 + 2 66 0 0 DualAspectReg Stream_61 + 43 31 4 0 Fifo Stream_64 + 77 119 1 0 Fifo Stream_66 + 75 125 4 0 Fifo Stream_68 + 2 1 0 0 StreamPullPushAdapter Stream_70 + 43 31 4 0 Fifo Stream_72 + 107 138 2 0 Fifo Stream_74 + 44 34 14 0 Fifo Stream_78 + 74 120 2 0 Fifo Stream_80 + 179 409 0 0 AddrGen addrgen_cmd_cpu2lmem + 180 412 0 0 AddrGen addrgen_cmd_indptr + 179 406 0 0 AddrGen addrgen_cmd_values + 82 171 0 0 ManagerStateMachine_csrD csrDecoder + 1655 536 0 0 ManagerStateMachine_read readControl + 733 1020 2 0 MAX4PCIeSlaveInterface MAX4PCIeSlaveInterface_i + 8 11 0 0 ResetControl control_streams_rst_ctl + 469 84 0 0 MappedElementSwitch MappedElementSwitch_i + 443 997 5 0 MappedMemoriesController MappedMemoriesController_i + 160 130 0 0 MappedRegistersControlle MappedRegistersController_i + 269 393 0 0 PerfMonitor perfm + 88 186 0 0 SanityBlock SanityBlock_i + 98 90 1 0 SignalForwardingAdapter SignalForwardingAdapter_i + 39 37 1 0 ChecksumMappedDRP checksum_mem_drp + 1497 1608 34 0 PCIeSlaveStreaming dynpcie + 8 12 0 0 ResetControl reset_controller + 16013 48002 281 0 MemoryControllerPro memctrlpro_maia_sodimms + 1630 847 4 0 PCIeBase PCIeBase_i + 140 215 0 0 MAX4CPLD cpld_io_ext_inst + 21 51 0 0 MAXEvents max_events + 7581 8726 24 0 StratixVDDR3 ddr3_core + 7474 8623 24 0 StratixVDDR3 ddr3_core + 7582 8738 24 0 StratixVDDR3 ddr3_core + 7472 8570 24 0 StratixVDDR3 ddr3_core + 7579 8787 24 0 StratixVDDR3 ddr3_core + 7581 8770 24 0 StratixVDDR3 ddr3_core + +Source files annotation report +----------------------------------------------------------------- + +% of total used for each file (note: multiple files may share the same resources) + LUTs FFs BRAMs DSPs filename + 58.95% 51.70% 47.30% 100.00% SpmvKernel.maxj + 59.46% 52.27% 47.30% 100.00% SpmvManager.maxj + 100.00% 87.96% 51.54% 100.00% [ missing source files ] From e4f152bb83b6ce0a75cfa43d3492d47aa840b503 Mon Sep 17 00:00:00 2001 From: Pavel Burovskiy Date: Fri, 11 Sep 2015 00:47:38 +0100 Subject: [PATCH 4/6] Forgot to declare a variable in C++ --- src/spmv/src/Spmv.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/spmv/src/Spmv.cpp b/src/spmv/src/Spmv.cpp index b0be4c8..2e18491 100644 --- a/src/spmv/src/Spmv.cpp +++ b/src/spmv/src/Spmv.cpp @@ -12,6 +12,7 @@ using EigenSparseMatrix = Eigen::SparseMatrix; // how many cycles does it take to resolve the accesses with FST int cycleCountFST(int32_t* v, int size) { + int cycles = 0; int bufferWidth = Spmv_inputWidth; for (int i = 0; i < size; i++) { int toread = v[i] - (i > 0 ? v[i - 1] : 0); From a33ab706c86734bd4a2eefbeaa4b5163d50ac030 Mon Sep 17 00:00:00 2001 From: Pavel Burovskiy Date: Fri, 11 Sep 2015 01:00:58 +0100 Subject: [PATCH 5/6] Revert "Adding annotations for FST case" This reverts commit 1c51e34e7e6a0d876c16aa7dbbe7fed63ca91911. --- .../SpmvKernel.maxj | 346 - .../SpmvManager.maxj | 153 - .../spmv_48p_2048c_0.5pf_full_fst/_build.log | 16923 ---------------- .../spmv_48p_2048c_0.5pf_full_fst/report.txt | 155 - 4 files changed, 17577 deletions(-) delete mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj delete mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj delete mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/_build.log delete mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj deleted file mode 100644 index 501d337..0000000 --- a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj +++ /dev/null @@ -1,346 +0,0 @@ - LUTs FFs BRAMs DSPs : SpmvKernel.maxj - 105055 132726 614 192 : resources used by this file - 20.02% 12.65% 23.92% 9.78% : % of available - 58.95% 51.70% 47.30% 100.00% : % of total used - 98.74% 93.30% 99.68% 100.00% : % of user resources - - : import java.util.*; - : - : import com.maxeler.maxcompiler.v2.kernelcompiler.Kernel; - : import com.maxeler.maxcompiler.v2.kernelcompiler.KernelParameters; - : import com.maxeler.maxcompiler.v2.kernelcompiler.types.base.*; - : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.Count.*; - : import com.maxeler.maxcompiler.v2.kernelcompiler.types.composite.DFEVectorType; - : import com.maxeler.maxcompiler.v2.kernelcompiler.types.composite.DFEVector; - : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.memory.*; - : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.KernelMath; - : import com.maxeler.maxcompiler.v2.utils.MathUtils; - : - : import com.custom_computing_ic.dfe_snippets.utils.Reductions; - : import com.custom_computing_ic.dfe_snippets.reductions.LogAddReduce; - : import com.custom_computing_ic.dfe_snippets.utils.FetchSubTuple; - : - : - : class SpmvKernel extends Kernel { - : - : // N x N matrix, nnzs nonzeros - : // - : // load data for N cycles into cache - : // compute for N cycles - : // -- in the mean time load data for N cycles in double buffer - : // repeat - : // - : // Sources of inefficiency: - : // -- empty rows - : // -- port sharing cannot be used - : - : private final DFEVectorType vtype, ivtype; - : private final int inputWidth; - : private final DFEType addressT; - : private final boolean dbg; - : - : private static final int fpL = 16; - : - : protected SpmvKernel( - : KernelParameters parameters, - : int inputWidth, - : int cacheSize, - : int indexWidth, - : int mantissaWidth, - : boolean dbg) { - : super(parameters); - : - : optimization.pushPipeliningFactor(0.5); - : optimization.pushDSPFactor(1); - : - : - : this.inputWidth = inputWidth; - : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); - : this.dbg = dbg; - : - : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); - : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); - : - : // TODO: remove prefetch from this kernel - : - 1 2 0 0 : DFEVar vRomLoadEnable = io.input("loadEnabled", dfeBool()); - 1 0 0 0 : DFEVector matrixValues = io.input("matrixValues", vtype, ~vRomLoadEnable); - 1 1 0 0 : DFEVector vectorValues = io.input("vectorValues", vtype, ~vRomLoadEnable); - : - 65864 89061 127 192 : DFEVar result = Reductions.reduce(matrixValues * vectorValues); - : - : // --- Accumulation - 1 2 0 0 : DFEVar rowFinished = io.input("rowFinished", dfeBool()); - 1 1 0 0 : DFEVar rowLength = io.input("rowLength", dfeUInt(32)); - 1 1 0 0 : DFEVar cycleCounter = io.input("cycleCounter", dfeUInt(32)); - 1 0 0 0 : DFEVar firstReadPosition = io.input("firstReadPosition", dfeUInt(32)); - : - 32 32 0 0 : DFEVar runLength = firstReadPosition + rowLength; - 258 234 2 0 : DFEVar modulo = KernelMath.modulo(runLength, inputWidth); - 1240 988 10 0 : DFEVar quot = (runLength - modulo.cast(dfeUInt(32))) / inputWidth; - : - 33 51 0 0 : DFEVar totalCycles = quot + (modulo === 0 ? constant.var(dfeUInt(32), 0) : 1); - : - : DFEVar carriedSum = dfeFloat(11, mantissaWidth).newInstance(this); - 1103 1177 3 0 : DFEVar newSum = result + (cycleCounter < fpL ? 0 : carriedSum); - : carriedSum <== stream.offset(newSum, -fpL); - : - 41 65 0 0 : DFEVar firstValidPartialSum = (totalCycles > fpL)? (totalCycles - fpL) : 0; - 25 1 0 0 : DFEVar validPartialSums = (cycleCounter >= firstValidPartialSum); - 4654 5213 4 0 : LogAddReduce r = new LogAddReduce(this, - : validPartialSums, - : rowFinished, - : newSum, - : dfeFloat(11, mantissaWidth), - : fpL); - : - : // TODO still need reduction step - : // TODO: remove prefetch - 10 12 1 0 : DFEVar outputEnable = ~vRomLoadEnable & rowFinished; - 9 6 1 0 : io.output("output", r.getOutput(), dfeFloat(11, mantissaWidth), outputEnable); - : - : // --- Debug - : if (dbg) { - : Params rowCounterParams = control.count.makeParams(32) - : .withEnable(rowFinished); - : DFEVar rowCounter = control.count.makeCounter(rowCounterParams).getCount(); - : /* debug.simPrintf( - : rowLength !== 0, - : "Kernel -- row %d totalCycles %d, readenable %d, readmask %d rowFinished %d rowLength %d output: %f cycleCounter %d validPartialSums %d newSum %f firstRead %d", - : rowCounter, totalCycles, readEnable, readMask, rowFinished, rowLength, r.getOutput(), cycleCounter, validPartialSums, newSum, firstReadPosition); - : debug.simPrintf(rowLength !== 0 , " loadEnable %d loadAddress %d\n", vRomLoadEnable, loadAddress); - : */ - : //debug.simPrintf("\n"); - : //debug.simPrintf("Values: "); - : //for (int i = 0; i < inputWidth; i++) - : //debug.simPrintf("%f ", values[i]); - : //debug.simPrintf("Indices: "); - : //for (int i = 0; i < inputWidth; i++) - : //debug.simPrintf("%d ", colptr[i]); - : //debug.simPrintf("\n"); - : } - : } - : - : } - : - : // This implements cache as - : // - row of BRAMs - : // - SM, which helps to select BRAM values - : class SpmvCacheKernel extends Kernel { - : - : private final DFEVectorType vtype, ivtype; - : private final List> vroms; - : private final int inputWidth; - : private final DFEType addressT; - : - : protected SpmvCacheKernel(KernelParameters parameters, - : int inputWidth, - : int cacheSize, - : int indexWidth, - : int mantissaWidth) { - : super(parameters); - : - : this.inputWidth = inputWidth; - : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); - : - : // load entire vector or until cache is full - : int sizeBits = 32; // XXX may need to run for more cycles - : DFEVar vRomLoadEnable = io.input("loadEnabled_in", dfeBool()); - : - : DFEVar vectorLoadCycles = io.scalarInput("vectorLoadCycles", dfeUInt(32)); - : Params loadAddressParams = control.count.makeParams(sizeBits ) - : .withMax(vectorLoadCycles) - : .withEnable(vRomLoadEnable); - : DFEVar loadAddress = control.count.makeCounter(loadAddressParams).getCount(); - : - : - : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); - : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); - : DFEVar vectorValue = io.input("vromLoad", dfeFloat(11, mantissaWidth), vRomLoadEnable); - : //--- Cache allocation and control - : vroms = new ArrayList>(); - : for (int i = 0; i < inputWidth; i++) { - : Memory vrom = mem.alloc(dfeFloat(11, mantissaWidth), cacheSize); - : vroms.add(vrom); - : vrom.write( - : loadAddress.cast(addressT), - : vectorValue, - : vRomLoadEnable); - : } - : - : // --- I/O - : DFEVar readEnable = io.input("readenable", dfeBool()) & ~vRomLoadEnable; - : DFEVar readMask = io.input("readmask", dfeUInt(inputWidth)); - : DFEVector matrixValues = selectValues( - : io.input("values", vtype, readEnable), - : readMask); - : DFEVector colptr = selectValues( - : io.input("indptr", ivtype, readEnable), - : readMask); - : DFEVector vectorValues = resolveVectorReads(colptr); - : - : io.output("loadEnabled_out", vRomLoadEnable, dfeBool()); - : io.output("matrixValues", matrixValues, vtype, ~vRomLoadEnable); - : io.output("vectorValues", vectorValues, vtype, ~vRomLoadEnable); - : } - : - : DFEVector selectValues( - : DFEVector in, - : DFEVar readMask) { - : DFEVector out = in.getType().newInstance(this); - : for (int i = 0; i < in.getSize(); i++) - : out[i] <== readMask.slice(i) === 0 ? 0 : in[i]; - : return out; - : } - : - : - : DFEVector resolveVectorReads(DFEVector reads) { - : DFEVector out = vtype.newInstance(this); - : for (int i = 0; i < vroms.size(); i++) - : out[i] <== vroms.get(i).read(reads[i].cast(addressT)); - : return out; - : } - : - : } - : - : // This implements cache as - : // - row of BRAMs - : // - FetchSubTuple - : // First, rough and pointless implementation. - : class SpmvCacheFSTKernel extends Kernel { - : - : private final DFEVectorType vtype, ivtype; - : private final List> vroms; - : private final int inputWidth; - : private final DFEType addressT; - : - : protected SpmvCacheFSTKernel(KernelParameters parameters, - : int inputWidth, - : int cacheSize, - : int indexWidth, - : int mantissaWidth) { - : super(parameters); - : - : this.inputWidth = inputWidth; - : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); - : - : // load entire vector or until cache is full - : int sizeBits = 32; // XXX may need to run for more cycles - 1 1 0 0 : DFEVar vRomLoadEnable = io.input("loadEnabled_in", dfeBool()); - : - : DFEVar vectorLoadCycles = io.scalarInput("vectorLoadCycles", dfeUInt(32)); - : Params loadAddressParams = control.count.makeParams(sizeBits ) - : .withMax(vectorLoadCycles) - : .withEnable(vRomLoadEnable); - 94 78 0 0 : DFEVar loadAddress = control.count.makeCounter(loadAddressParams).getCount(); - : - : - : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); - : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); - 1 65 0 0 : DFEVar vectorValue = io.input("vromLoad", dfeFloat(11, mantissaWidth), vRomLoadEnable); - : //--- Cache allocation and control - : vroms = new ArrayList>(); - : for (int i = 0; i < inputWidth; i++) { - 1 1 336 0 : Memory vrom = mem.alloc(dfeFloat(11, mantissaWidth), cacheSize); - : vroms.add(vrom); - : vrom.write( - : loadAddress.cast(addressT), - : vectorValue, - : vRomLoadEnable); - : } - : - : // --- I/O - : // --- buffering matrix and colptr data in FST - : - : // assuming readEnable guards internal storage of FST from overflow: - : // - : // DFEVar dataRequestEnableLoop = dfeBool().newInstance(this); - : // DFEVar dataRequestEnable = control.count.pulse(1)? 0 - : // : stream.offset(dataRequestEnableLoop,-1); - : // DFEVar enable = readEnable & dataRequestEnable; - : - 2 3 0 0 : DFEVar readEnable = io.input("readenable", dfeBool()) & ~vRomLoadEnable; - 1 1 0 0 : DFEVar readMask = io.input("readmask", dfeUInt(inputWidth)); - : - 1 3803 0 0 : DFEVector matrix_in = io.input("values", vtype, readEnable); - 1 1 0 0 : DFEVector index_in = io.input("indptr", ivtype, readEnable); - : - : // big hack around: counting the number of 1s in readmask - : List readmask_bits = new ArrayList(); - : for (int i = 0; i < inputWidth; i++) - : { - 0 529 0 0 : readmask_bits.add(readMask[i].cast(dfeBool()).cast(dfeUInt(6))); // 2^6 = 64 > 48 = inputWidth - : } - 144 145 0 0 : DFEVar numEntriesToRead = Reductions.reduce(readmask_bits); - : - : // we don't care which PE receives each entry (assume matrices are - : // numerically nice enough to change the order of accumulation) - : boolean alignOutput = false; - : int matrixTypeWidth = 11 + mantissaWidth; - : FetchSubTuple matrixBuffer = new FetchSubTuple(this, "matrix", inputWidth, - : matrixTypeWidth, dfeFloat(11, mantissaWidth), - : alignOutput); - : FetchSubTuple indexBuffer = new FetchSubTuple(this, "index", inputWidth, - : indexWidth, dfeUInt(indexWidth), alignOutput); - : - 25403 25051 0 0 : DFEVector matrixValues = matrixBuffer.popPush(numEntriesToRead, readEnable, matrix_in); - 4753 4228 0 0 : DFEVector colptr = indexBuffer.popPush(numEntriesToRead, readEnable, index_in); - : - : //dataRequestEnableLoop <== matrixBuffer.nextPushEnable(); - : - : DFEVector vectorValues = resolveVectorReads(colptr); - : - : io.output("loadEnabled_out", vRomLoadEnable, dfeBool()); - 0 5 0 0 : io.output("matrixValues", matrixValues, vtype, ~vRomLoadEnable); - 1 2 0 0 : io.output("vectorValues", vectorValues, vtype, ~vRomLoadEnable); - : } - : - : DFEVector resolveVectorReads(DFEVector reads) { - : DFEVector out = vtype.newInstance(this); - : for (int i = 0; i < vroms.size(); i++) - : out[i] <== vroms.get(i).read(reads[i].cast(addressT)); - : return out; - : } - : - : } - : - : - : - : - : // XXX for now we assume the matrix is smaller then max rows - : // will have to implement an lmem design above this threshold - : // using lmem wrapped above this thresholed may be feasilbe, - : // see the DramAccumulator snippet in dfe-snippets - : class SpmvReductionKernel extends Kernel { - : - : protected SpmvReductionKernel(KernelParameters parameters, int fpl, int maxRows) { - : super(parameters); - : - 1 1 0 0 : DFEVar in = io.input("reductionIn", dfeFloat(11, 53)); - : DFEVar n = io.scalarInput("nRows", dfeUInt(32)); - : DFEVar totalCycles = io.scalarInput("totalCycles", dfeUInt(32)); - : - 69 120 0 0 : DFEVar cycles = control.count.simpleCounter(32); - : - : DFEVar sumCarried = dfeFloat(11, 53).newInstance(this); - 1116 1572 2 0 : DFEVar sum = in + (cycles < n ? 0 : sumCarried); - 44 48 128 0 : sumCarried <== stream.offset(sum, -(n.cast(dfeInt(32))), -maxRows, -(fpl + 2)); - : - : // output on the last n cycles - 55 33 0 0 : DFEVar outputEnable = totalCycles - cycles <= n; - 1 14 0 0 : io.output("reductionOut", sum, dfeFloat(11, 53), outputEnable); - : } - : } - : - : - : class PaddingKernel extends Kernel { - : protected PaddingKernel(KernelParameters parameters) { - : super(parameters); - : DFEVar nInputs = io.scalarInput("nInputs", dfeUInt(32)); - 69 107 0 0 : DFEVar cycles = control.count.simpleCounter(32); - 20 1 0 0 : DFEVar paddingCycles = cycles >= nInputs; - 1 1 0 0 : DFEVar input = io.input("paddingIn", dfeFloat(11, 53), ~paddingCycles); - 0 69 0 0 : DFEVar out = paddingCycles ? 0 : input; - : io.output("paddingOut", out, dfeFloat(11, 53)); - : } - : } diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj deleted file mode 100644 index 419d9c1..0000000 --- a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj +++ /dev/null @@ -1,153 +0,0 @@ - LUTs FFs BRAMs DSPs : SpmvManager.maxj - 105961 134189 614 192 : resources used by this file - 20.19% 12.78% 23.92% 9.78% : % of available - 59.46% 52.27% 47.30% 100.00% : % of total used - 99.59% 94.33% 99.68% 100.00% : % of user resources - - : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.CPUTypes; - : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.EngineInterface; - : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.InterfaceParam; - : import com.maxeler.maxcompiler.v2.managers.custom.CustomManager; - : import com.maxeler.maxcompiler.v2.managers.custom.blocks.KernelBlock; - : import com.maxeler.maxcompiler.v2.build.EngineParameters; - : import com.maxeler.maxcompiler.v2.managers.custom.blocks.StateMachineBlock; - : import com.maxeler.maxcompiler.v2.statemachine.manager.ManagerStateMachine; - : import com.maxeler.maxcompiler.v2.managers.custom.stdlib.MemoryControlGroup; - : - : import com.custom_computing_ic.dfe_snippets.sparse.*; - : import com.custom_computing_ic.dfe_snippets.manager.*; - : - : public class SpmvManager extends CustomManager{ - : private static final String s_kernelName = "SpmvKernel"; - : private static final String s_reductionKernel = "SpmvReductionKernel"; - : private static final String s_paddingKernel = "SpmvPaddingKernel"; - : private static final String s_cacheKernel = "SpmvCacheKernel"; - : - : private static final int cacheSize = 1024 * 2; - : private static final int inputWidth = 48; - : private static final int MAX_ROWS = 30000; - : - : // parameters of CSR format used: float64 values, int32 index. - : private static final int mantissaWidth = 53; - : private static final int indexWidth = 32; - : - : private static final int FLOATING_POINT_LATENCY = 16; - : - : private static final boolean DBG_CSR_DECODER = false; - : private static final boolean DBG_PAR_CSR_CTL = false; - : private static final boolean DBG_SPMV_KERNEL = false; - : - : SpmvManager(EngineParameters ep) { - : super(ep); - : addMaxFileConstant("inputWidth", inputWidth); - : addMaxFileConstant("cacheSize", cacheSize); - : addMaxFileConstant("maxRows", MAX_ROWS); - : - : ManagerUtils.setDRAMMaxDeviceFrequency(this, ep); - : - : ManagerStateMachine csrDecoder = new CsrDecoder(this, DBG_CSR_DECODER); - : StateMachineBlock csrDecoderBlock = addStateMachine("csrDecoder", csrDecoder); - : csrDecoderBlock.getInput("colptr") <== addStreamFromCPU("colptr"); - : - : ManagerStateMachine readControl = new ParallelCsrReadControl(this, inputWidth, DBG_PAR_CSR_CTL); - : StateMachineBlock readControlBlock = addStateMachine("readControl", readControl); - : readControlBlock.getInput("length") <== csrDecoderBlock.getOutput("rowLength_out"); - : - 227 370 0 0 : KernelBlock cache = addKernel(new SpmvCacheFSTKernel( - : makeKernelParameters(s_cacheKernel), - : inputWidth, - : cacheSize, - : indexWidth, - 30403 33913 336 0 : mantissaWidth - : )); - : - 226 374 0 0 : KernelBlock k = addKernel(new SpmvKernel( - : makeKernelParameters(s_kernelName), - : inputWidth, - : cacheSize, - : indexWidth, - : mantissaWidth, - 73276 96847 148 192 : DBG_SPMV_KERNEL - : )); - : - : addStreamToOnCardMemory("cpu2lmem", MemoryControlGroup.MemoryAccessPattern.LINEAR_1D) <== addStreamFromCPU("fromcpu"); - : - : - : - : ManagerUtils.addLinearStreamFromLmemToKernel(this, cache, "indptr"); - : ManagerUtils.addLinearStreamFromLmemToKernel(this, cache, "values"); - : - : cache.getInput("vromLoad") <== addStreamFromCPU("vromLoad"); - : - : cache.getInput("readenable") <== readControlBlock.getOutput("readenable"); - : cache.getInput("readmask") <== readControlBlock.getOutput("readmask"); - : cache.getInput("loadEnabled_in") <== readControlBlock.getOutput("vectorLoad"); - : - : k.getInput("loadEnabled") <== cache.getOutput("loadEnabled_out"); - : k.getInput("vectorValues") <== cache.getOutput("vectorValues"); - : k.getInput("matrixValues") <== cache.getOutput("matrixValues"); - : - : k.getInput("rowLength") <== readControlBlock.getOutput("rowLength"); - : k.getInput("rowFinished") <== readControlBlock.getOutput("rowFinished"); - : k.getInput("cycleCounter") <== readControlBlock.getOutput("cycleCounter"); - : k.getInput("firstReadPosition") <== readControlBlock.getOutput("firstReadPosition"); - : - 227 358 0 0 : KernelBlock r = addKernel(new SpmvReductionKernel( - : makeKernelParameters(s_reductionKernel), - : FLOATING_POINT_LATENCY, - 1286 1788 130 0 : MAX_ROWS)); - : r.getInput("reductionIn") <== k.getOutput("output"); - : - 226 361 0 0 : KernelBlock p = addKernel(new PaddingKernel( - 90 178 0 0 : makeKernelParameters(s_paddingKernel))); - : - : p.getInput("paddingIn") <== r.getOutput("reductionOut"); - : addStreamToCPU("output") <== p.getOutput("paddingOut"); - : } - : - : private static EngineInterface interfaceDefault() { - : EngineInterface ei = new EngineInterface(); - : - : InterfaceParam n = ei.addParam("nrows", CPUTypes.INT); - : InterfaceParam vectorSize = ei.addParam("vectorSize", CPUTypes.INT); - : InterfaceParam vectorLoadCycles = ei.addParam("vectorLoadCycles", CPUTypes.INT); - : InterfaceParam totalCycles = ei.addParam("totalCycles", CPUTypes.INT); - : InterfaceParam paddingCycles = ei.addParam("paddingCycles", CPUTypes.INT); - : InterfaceParam nPartitions = ei.addParam("nPartitions", CPUTypes.INT); - : - : ei.setTicks(s_kernelName, totalCycles); - : - : ei.setTicks(s_cacheKernel, totalCycles); - : ei.setScalar(s_cacheKernel, "vectorLoadCycles", vectorLoadCycles); - : - : ei.setTicks(s_reductionKernel, (n * nPartitions)); - : ei.setScalar(s_reductionKernel, "nRows", n); - : ei.setScalar(s_reductionKernel, "totalCycles", n * nPartitions); - : - : ei.setTicks(s_paddingKernel, (n + paddingCycles)); - : ei.setScalar(s_paddingKernel, "nInputs", n); - : - : ei.setScalar("csrDecoder", "nrows", n); - : - : ei.setScalar("readControl", "nrows", n); - : ei.setScalar("readControl", "vectorLoadCycles", vectorLoadCycles); - : ei.setScalar("readControl", "nPartitions", nPartitions); - : - : ei.setStream("output", CPUTypes.DOUBLE, (n + paddingCycles) * CPUTypes.DOUBLE.sizeInBytes()); - : ei.setStream("vromLoad", CPUTypes.DOUBLE, vectorSize * CPUTypes.DOUBLE.sizeInBytes()); - : - : ei.ignoreLMem("cpu2lmem"); - : ei.ignoreStream("fromcpu"); - : return ei; - : } - : - : public static void main(String[] args) { - 105961 134189 614 192 : SpmvManager manager = new SpmvManager(new EngineParameters(args)); - : manager.createSLiCinterface(interfaceDefault()); - : // ManagerUtils.debug(manager); - : ManagerUtils.setFullBuild(manager, 2, 2); - : manager.createSLiCinterface(ManagerUtils.interfaceWrite( - : "write", "fromcpu", "cpu2lmem")); - : manager.build(); - : } - : } diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/_build.log b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/_build.log deleted file mode 100644 index 30c4b54..0000000 --- a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/_build.log +++ /dev/null @@ -1,16923 +0,0 @@ -Thu 14:54: PROGRESS: MaxCompiler version: 2013.2.2 -Thu 14:54: PROGRESS: Build "Spmv" start time: Thu Sep 10 14:54:13 BST 2015 -Thu 14:54: PROGRESS: Main build process running as user pburovsk on host cccad1.doc.ic.ac.uk -Thu 14:54: INFO : Loading build properties from bundled MaxCompiler_build.conf... -Thu 14:54: INFO : No default external build property file has been specified. -Thu 14:54: INFO : (Set environment variable MAXCOMPILER_DEFAULT_CONF_FILE to assign one) -Thu 14:54: INFO : Loading user build properties from: /mnt/ccnas/pburovsk/.MaxCompiler_build_user.conf -Thu 14:54: INFO : No user-specified external build property file has been specified. -Thu 14:54: INFO : (Set environment variable MAXCOMPILER_BUILD_CONF_FILE to assign one) -Thu 14:54: PROGRESS: Build location: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE -Thu 14:54: PROGRESS: Detailed build log available in "_build.log" -Thu 14:54: INFO : Created build manager Spmv (Spmv_MAIA_DFE Thu Sep 10 14:54:13 BST 2015). (14:54:13 10/09/15) -Thu 14:54: INFO : Working in dir: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE -Thu 14:54: INFO : Java class path (2 paths): -Thu 14:54: INFO : /vol/cc/opt/maxeler/maxcompiler-2013.2.2/lib/MaxCompiler.jar -Thu 14:54: INFO : . -Thu 14:54: INFO : Java process started by 'main' method in class 'SpmvManager'. -Thu 14:54: INFO : build.arbitrated_core_cache parameter is blank, not using core-cache -Thu 14:54: INFO : Checking license files in directory: /vol/cc/opt/maxeler/maxcompiler-2013.2.2/licenses -Thu 14:54: INFO : All license signatures valid. -Thu 14:54: INFO : Backing-up source-files (old source files in build directory will be removed first)... -Thu 14:54: INFO : Source directories: ../src -Thu 14:54: INFO : Deleting directory: src -Thu 14:54: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/scratch/quartus_version_test -Thu 14:54: INFO : Running command: quartus_fit | head -n 5 > quartus_version_test -Thu 14:54: INFO : ERROR: ld.so: object '/vol/cc/opt/maxeler/maxcompiler-2013.2.2/lib/maxeleros-sim/lib/libmaxeleros.so' from LD_PRELOAD cannot be preloaded: ignored. -Thu 14:54: INFO : Installed Quartus version: 13.0 -Thu 14:54: INFO : No hash stored for Quartus version v13_0_0 -Thu 14:54: USER : -Thu 14:54: USER : ENGINE BUILD PARAMETERS -Thu 14:54: USER : Build name: Spmv_MAIA_DFE -Thu 14:54: USER : DFEModel: MAIA -Thu 14:54: USER : maxFileName: Spmv -Thu 14:54: USER : target: DFE -Thu 14:54: USER : enableMPCX: true -Thu 14:54: PROGRESS: Instantiating kernel "SpmvCacheKernel" -Thu 14:54: PROGRESS: Instantiating kernel "SpmvKernel" -Thu 14:54: PROGRESS: Instantiating kernel "SpmvReductionKernel" -Thu 14:54: PROGRESS: Instantiating kernel "SpmvPaddingKernel" -Thu 14:54: INFO : Manager Configuration: -Thu 14:54: INFO : ManagerConfiguration.allowNonMultipleTransitions = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.board = MAX4848A [Init: null, init: MAX4848A] -Thu 14:54: INFO : ManagerConfiguration.build.buildEffort = HIGH [Init: MEDIUM, change: HIGH] -Thu 14:54: INFO : ManagerConfiguration.build.enableChipScopeInserter = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.build.enableTimingAnalysis = true [Init: true] -Thu 14:54: INFO : ManagerConfiguration.build.level = FULL_BUILD [Init: FULL_BUILD] -Thu 14:54: INFO : ManagerConfiguration.build.mpprContinueAfterMeetingTiming = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.build.mpprCtMax = 2 [Init: 1, change: 2] -Thu 14:54: INFO : ManagerConfiguration.build.mpprCtMin = 1 [Init: 1] -Thu 14:54: INFO : ManagerConfiguration.build.mpprParallelism = 2 [Init: 1, change: 2] -Thu 14:54: INFO : ManagerConfiguration.build.mpprRetryMissesThrshld = 0 [Init: 0] -Thu 14:54: INFO : ManagerConfiguration.build.optGoal = AREA [Init: AREA] -Thu 14:54: INFO : ManagerConfiguration.build.physSynthAsyncPipelining = AUTO [Init: AUTO] -Thu 14:54: INFO : ManagerConfiguration.build.physSynthCombLogic = AUTO [Init: AUTO] -Thu 14:54: INFO : ManagerConfiguration.build.physSynthCombLogicForArea = AUTO [Init: AUTO] -Thu 14:54: INFO : ManagerConfiguration.build.physSynthEffort = AUTO [Init: AUTO] -Thu 14:54: INFO : ManagerConfiguration.build.physSynthRegDuplication = AUTO [Init: AUTO] -Thu 14:54: INFO : ManagerConfiguration.build.physSynthRetiming = AUTO [Init: AUTO] -Thu 14:54: INFO : ManagerConfiguration.build.physicalSynthesis = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.buildTarget = DFE [Init: null, init: DFE] -Thu 14:54: INFO : ManagerConfiguration.debug.chipscopeCaptureDepth = 4096 [Init: 4096] -Thu 14:54: INFO : ManagerConfiguration.debug.fifoUnderOverFlowRegs = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.debug.memCtlDebugRegs = true [Init: true] -Thu 14:54: INFO : ManagerConfiguration.debug.memCtlExtraDebugRegs = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.debug.memMarginingSupport = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.debug.memPhyDebugRegister = NONE [Init: NONE] -Thu 14:54: INFO : ManagerConfiguration.debug.memPllLockDebugRegs = true [Init: true] -Thu 14:54: INFO : ManagerConfiguration.debug.streamStatus = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.debug.streamStatusChecksums = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.addressGeneratorsInSlowClock = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.arbitrationMode = ROUND_ROBIN [Init: ROUND_ROBIN] -Thu 14:54: INFO : ManagerConfiguration.dram.burstSize = 8 [Init: 8] -Thu 14:54: INFO : ManagerConfiguration.dram.cmdFifoInReg = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.cmdFifoLutRam = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.cmdFifoRegInRam = true [Init: true] -Thu 14:54: INFO : ManagerConfiguration.dram.cmdFifoSize = 31 [Init: 31] -Thu 14:54: INFO : ManagerConfiguration.dram.dataFifoDepth = 512 [Init: 512] -Thu 14:54: INFO : ManagerConfiguration.dram.dataFifoLutRam = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.dataFifoWidth = 792 [Init: 792] -Thu 14:54: INFO : ManagerConfiguration.dram.eccMode = true [Init: false, change: true] -Thu 14:54: INFO : ManagerConfiguration.dram.fabricDataFifoReg = true [Init: true] -Thu 14:54: INFO : ManagerConfiguration.dram.fabricRdDataFifoReg = true [Init: false, change: true] -Thu 14:54: INFO : ManagerConfiguration.dram.flagSupport = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.highPrioStream = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.max2CompatMode = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.max4m_MAIA_MCP_UseRefClk = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.max4qrateMode = true [Init: false, change: true] -Thu 14:54: INFO : ManagerConfiguration.dram.memCmdIncSize = 8 [Init: 8] -Thu 14:54: INFO : ManagerConfiguration.dram.memCmdStartAddrSize = 32 [Init: 32] -Thu 14:54: INFO : ManagerConfiguration.dram.onCardMemFreq = 800.0 [Init: 0.0, change: 400.0, change: 800.0] -Thu 14:54: INFO : ManagerConfiguration.dram.parEccDebugStream = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.parityEccWidth = 72 [Init: 0, change: 72] -Thu 14:54: INFO : ManagerConfiguration.dram.parityMode = true [Init: false, change: true] -Thu 14:54: INFO : ManagerConfiguration.dram.perdqsPhaseDetect = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.dram.performanceMode = true [Init: true] -Thu 14:54: INFO : ManagerConfiguration.enableMPCX = true [Init: false, init: true] -Thu 14:54: INFO : ManagerConfiguration.maxring.maxringConnections = [] [Init: []] -Thu 14:54: INFO : ManagerConfiguration.maxring.maxringNumLanes = {} [Init: {}] -Thu 14:54: INFO : ManagerConfiguration.multiCycleMappedMemoryBus = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.pcie.numPCIeLanes = 8 [Init: 0, change: 8] -Thu 14:54: INFO : ManagerConfiguration.pcie.pcieFastClock = true [Init: false, change: true] -Thu 14:54: INFO : ManagerConfiguration.pcie.streamFromHostMaxNum = 0 [Init: 0] -Thu 14:54: INFO : ManagerConfiguration.pcie.streamToHostMaxNum = 0 [Init: 0] -Thu 14:54: INFO : ManagerConfiguration.persona.boardModel = MAX4848A [Init: null, change: MAX4848A] -Thu 14:54: INFO : ManagerConfiguration.persona.ddr3Frq = 800.0 [Init: 400.0, change: 800.0] -Thu 14:54: INFO : ManagerConfiguration.persona.ddr3Qmode = true [Init: false, change: true] -Thu 14:54: INFO : ManagerConfiguration.persona.disableMultiplePersona = true [Init: false, change: true] -Thu 14:54: INFO : ManagerConfiguration.persona.dynamic_scaling = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.persona.fastBuild = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.persona.maxRingLocal = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.persona.maxRingOptical = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.persona.maxringDataRate = 2500 [Init: 2500] -Thu 14:54: INFO : ManagerConfiguration.persona.mode = InitMode [Init: Off, change: InitMode] -Thu 14:54: INFO : ManagerConfiguration.persona.panMaxRingA = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.persona.panMaxRingB = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.persona.personaInterfaceVersion = 1 [Init: 1] -Thu 14:54: INFO : ManagerConfiguration.persona.streamClks = 1 [Init: 1] -Thu 14:54: INFO : ManagerConfiguration.persona.streamFrq = [100.0] [Init: [150.0], change: [100.0]] -Thu 14:54: INFO : ManagerConfiguration.persona.streamPs = [0] [Init: [0]] -Thu 14:54: INFO : ManagerConfiguration.persona.usePCIeGen1 = true [Init: true] -Thu 14:54: INFO : ManagerConfiguration.simulation.nativeFloatingPoint = false [Init: false] -Thu 14:54: INFO : ManagerConfiguration.streamClockFrq = 100 [Init: 100] -Thu 14:54: INFO : -Thu 14:54: INFO : -- -Thu 14:54: INFO : Running manager compiler graph-pass: GenerateMXGInfo -Thu 14:54: INFO : Running manager compiler graph-pass: CalculateBandwidthForward -Thu 14:54: INFO : Running manager compiler graph-pass: CalculateBandwidthBackward -Thu 14:54: INFO : Running manager compiler graph-pass: ScheduleStallLatency -Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment -Thu 14:54: INFO : Running manager compiler graph-pass: InsertDualAspectLogic -Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment -Thu 14:54: INFO : Running manager compiler graph-pass: InsertPullPushAdapter -Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment -Thu 14:54: INFO : Running manager compiler graph-pass: InsertStreamFifos -Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment -Thu 14:54: INFO : Running manager compiler graph-pass: InsertStreamStatus -Thu 14:54: INFO : Running manager compiler graph-pass: InsertChipscope -Thu 14:54: INFO : Inserted 0 chipscope manager nodes. -Thu 14:54: INFO : Running manager compiler graph-pass: ClockWidthAssignment -Thu 14:54: PROGRESS: -Thu 14:54: PROGRESS: Compiling kernel "SpmvCacheKernel" -Thu 14:54: INFO : Configuration: -Thu 14:54: INFO : KernelConfiguration.allowDSPCascading = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.allowInputsOutputsBeforeFlushNode = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.allowZeroLatencyNodeHold = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.board = MAX4848A [Init: MAX2116B, change: MAX4848A] -Thu 14:54: INFO : KernelConfiguration.bramBitsThreshold = 2080 [Init: 2080] -Thu 14:54: INFO : KernelConfiguration.buildTarget = HARDWARE [Init: NONE, change: HARDWARE] -Thu 14:54: INFO : KernelConfiguration.cePipelining = 2 [Init: 2] -Thu 14:54: INFO : KernelConfiguration.clockPhaseBalanceThreshold = 0.1 [Init: 0.1] -Thu 14:54: INFO : KernelConfiguration.clockPhasingRetries = 50 [Init: 50] -Thu 14:54: INFO : KernelConfiguration.dumpNeighboursString = [Init: ] -Thu 14:54: INFO : KernelConfiguration.enableCeReplication = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.enableClockPhasePartitioning = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.enableDebugIOControlRegs = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.enableDummyBuild = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.enableKernelProfiler = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.enablePipelinedComputeController = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.enableShadowRegister = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.fifoSrlRegisterStages = 1 [Init: 1] -Thu 14:54: INFO : KernelConfiguration.flushOnInputDataCongtiguous = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.hardwareDebugDepth = 512 [Init: 512] -Thu 14:54: INFO : KernelConfiguration.hwHierarchyMode = UNSET [Init: UNSET] -Thu 14:54: INFO : KernelConfiguration.latencyAnnotation = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.latencyAnnotationIOs = [Init: null] -Thu 14:54: INFO : KernelConfiguration.maxCoalescedFifoWidth = 2147483647 [Init: 2147483647] -Thu 14:54: INFO : KernelConfiguration.maxPreAdderFanOut = 1 [Init: 1] -Thu 14:54: INFO : KernelConfiguration.netlistMode = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.numPhotonStateMachines = 1 [Init: 1] -Thu 14:54: INFO : KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1 [Init: 1] -Thu 14:54: INFO : KernelConfiguration.optimizations.conditionalArithmetic = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.optimizations.counterChainWrapPipelining = 0 [Init: 0] -Thu 14:54: INFO : KernelConfiguration.optimizations.dspAddChain = OPTIMISE [Init: null, Init after BuildTarget change: OPTIMISE] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableActiveFanoutReduction = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableBUFGCE = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableBetterInputRegistering = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableBetterRegistering = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableFifoCoalescing = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableFullPrecisionBinaryOpConstants = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableIntegratedRounding = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableMultiCycleReset = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.optimizations.enablePowerTwoFloatMult = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.optimizations.inputFlushDistanceFactor = 0 [Init: 0] -Thu 14:54: INFO : KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1 [Init: 1] -Thu 14:54: INFO : KernelConfiguration.optimizations.optimizationTechnique = DEFAULT [Init: DEFAULT] -Thu 14:54: INFO : KernelConfiguration.optimizations.triAdd = true [Init: true] -Thu 14:54: INFO : KernelConfiguration.partialReconfBlockName = [Init: ] -Thu 14:54: INFO : KernelConfiguration.partialReconfMode = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.partialReconfTemplate = false [Init: false] -Thu 14:54: INFO : KernelConfiguration.replicateNodeCeLog2NumPartitions = 0 [Init: 0] -Thu 14:54: INFO : KernelConfiguration.romBRAMBitsThreshold = 2080 [Init: 2080] -Thu 14:54: INFO : KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION [Init: EXCEPTION] -Thu 14:54: INFO : KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION [Init: EXCEPTION] -Thu 14:54: INFO : KernelConfiguration.simulation.simProgressMessageFrequency = 0 [Init: 0] -Thu 14:54: INFO : -Thu 14:54: INFO : -- -Thu 14:54: WARNING : Warning (UNCONNECTED_DESIGN_ELEMENT): -Thu 14:54: WARNING : Unconnected elements in design 'SpmvCacheKernel' -Thu 14:54: WARNING : details in : /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_graph_warnings.txt -Thu 14:54: INFO : Writing current graph to: Spmv_SpmvCacheKernel_original.pxg -Thu 14:54: INFO : Running kernel graph-pass 'GeneratePXG'. -Thu 14:54: INFO : Graph-pass 'GeneratePXG' took 4.85201 s (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:54: INFO : Graph-pass 'MarkConstantPass' took 46.4142 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'ReachabilityPass'. -Thu 14:54: INFO : Graph-pass 'ReachabilityPass' took 451.574 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'FindInputsLeadingToFlush'. -Thu 14:54: INFO : Graph-pass 'FindInputsLeadingToFlush' took 2.80781 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'CheckForStatefulToFlushViolations'. -Thu 14:54: INFO : Graph-pass 'CheckForStatefulToFlushViolations' took 3.37235 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. -Thu 14:54: INFO : Graph-pass 'CheckForInputToFlushViolations' took 13.5077 ms (1 iterations) -Thu 14:54: INFO : Not deleting directory (does not exist): neighbours -Thu 14:54: INFO : Running Photon pre-schedule graph optimisations -Thu 14:54: INFO : Running kernel graph-pass 'AlignOrEradicatePrintfs'. -Thu 14:54: INFO : Graph-pass 'AlignOrEradicatePrintfs' took 10.3464 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'FoldConstantsPass'. -Thu 14:54: INFO : Graph-pass 'FoldConstantsPass' took 776.888 ms (2 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'OptimiseNodesPass'. -Thu 14:54: INFO : Graph-pass 'OptimiseNodesPass' took 733.297 ms (2 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'DeleteRedundantNodes'. -Thu 14:54: INFO : Graph-pass 'DeleteRedundantNodes' took 5.10112 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'AlteraDSPExtractionGraphPass'. -Thu 14:54: INFO : Optimized 0 sub-graphs into DSP multiply/add chains -Thu 14:54: INFO : Graph-pass 'AlteraDSPExtractionGraphPass' took 89.9622 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'TriAddExtractionPass'. -Thu 14:54: INFO : optimised graph of 47 adds into 23 tri-adds and 1 bi-add (folded 0 constants) -Thu 14:54: INFO : Graph-pass 'TriAddExtractionPass' took 727.027 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'ConditionalAddExtractionPass'. -Thu 14:54: INFO : Optimized 0 sub-graphs into conditional adds/subs/triadds. -Thu 14:54: INFO : Graph-pass 'ConditionalAddExtractionPass' took 11.8250 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'PO2FPMultOptimiser'. -Thu 14:54: INFO : Graph-pass 'PO2FPMultOptimiser' took 3.53062 ms (1 iterations) -Thu 14:54: INFO : Logging Photon stats to: SpmvCacheKernel_photon_stats.csv -Thu 14:54: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:54: INFO : Graph-pass 'StatsPass' took 39.1907 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'CollectNumericExceptions'. -Thu 14:54: INFO : Graph-pass 'CollectNumericExceptions' took 5.22934 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'StreamOffsetDivExpand'. -Thu 14:54: INFO : Graph-pass 'StreamOffsetDivExpand' took 6.61072 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'FindIllegalLoops'. -Thu 14:54: INFO : Graph-pass 'FindIllegalLoops' took 19.1441 s (1 iterations) -Thu 14:54: INFO : Scheduling Photon graph (pass 1) -Thu 14:54: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:54: INFO : Graph-pass 'MarkConstantPass' took 31.5049 ms (1 iterations) -Thu 14:54: INFO : Running kernel graph-pass 'MIPScheduler'. -Thu 14:54: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvCacheKernel_scheduler_1_C.dat" --display "SpmvCacheKernel_scheduler_1_C.out" --log "SpmvCacheKernel_scheduler_1_C.log" -Thu 14:55: INFO : Reading model section from scheduler.mod... -Thu 14:55: INFO : 95 lines were read -Thu 14:55: INFO : Reading data section from SpmvCacheKernel_scheduler_1_C.dat... -Thu 14:55: INFO : 82467 lines were read -Thu 14:55: INFO : Generating schedulingEquation... -Thu 14:55: INFO : Generating bufferingEquation... -Thu 14:55: INFO : Generating afterFlushNode... -Thu 14:55: INFO : Generating forcePairConstraints... -Thu 14:55: INFO : Generating forceAtEnd... -Thu 14:55: INFO : Generating autoVarLatencyUserMin... -Thu 14:55: INFO : Generating autoVarLatencyUserMax... -Thu 14:55: INFO : Generating fifos... -Thu 14:55: INFO : Model has been successfully generated -Thu 14:55: INFO : ipp_basic_tech: 1 row(s) and 5 column(s) removed -Thu 14:55: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced -Thu 14:55: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed -Thu 14:55: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced -Thu 14:55: INFO : lpx_intopt: presolved MIP has 41288 rows, 27407 columns, 103191 non-zeros -Thu 14:55: INFO : lpx_intopt: 27407 integer columns, none of which are binary -Thu 14:55: INFO : lpx_adv_basis: size of triangular part = 41288 -Thu 14:55: INFO : Solving LP relaxation... -Thu 14:55: INFO : 0: objval = 6.326300000e+04 infeas = 1.000000000e+00 (0) -Thu 14:55: INFO : 200: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) -Thu 14:55: INFO : 400: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) -Thu 14:55: INFO : 600: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) -Thu 14:55: INFO : 800: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) -Thu 14:55: INFO : 1000: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) -Thu 14:55: INFO : 1200: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) -Thu 14:55: INFO : 1400: objval = 6.327800000e+04 infeas = 3.480308219e-01 (0) -Thu 14:55: INFO : 1600: objval = 6.327800000e+04 infeas = 3.480308219e-01 (0) -Thu 14:55: INFO : 1800: objval = 6.947200000e+04 infeas = 3.095034247e-01 (0) -Thu 14:55: INFO : 2000: objval = 6.947200000e+04 infeas = 2.649828767e-01 (0) -Thu 14:55: INFO : 2200: objval = 6.950900000e+04 infeas = 2.324486301e-01 (0) -Thu 14:55: INFO : 2400: objval = 6.956500000e+04 infeas = 3.809931507e-02 (0) -Thu 14:55: INFO : 2600: objval = 7.001100000e+04 infeas = 1.241438356e-02 (0) -Thu 14:55: INFO : 2800: objval = 7.001100000e+04 infeas = 1.070205479e-02 (0) -Thu 14:55: INFO : 2997: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 2997: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 3000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 3200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 3400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 3600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 3800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 4000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 4200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 4400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 4600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 4800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 5000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 5200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 5400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 5600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 5800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 6000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 6200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 6400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 6600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 6800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 7000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 7200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 7400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 7600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 7800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 8000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 8200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 8400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 8600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 8800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 9000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 9200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 9400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 9600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 9800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 10000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 10200: objval = 6.406400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 10400: objval = 6.361600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 10600: objval = 6.316800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 10800: objval = 6.272000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 11000: objval = 6.227200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 11200: objval = 6.188800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 11400: objval = 6.188800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 11600: objval = 6.099200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 11800: objval = 6.009600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 12000: objval = 5.964800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 12200: objval = 5.875200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 12400: objval = 5.830400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 12600: objval = 5.740500000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 12800: objval = 5.561200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 13000: objval = 5.471600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 13200: objval = 5.343600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 13400: objval = 5.249600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 13600: objval = 5.160000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 13800: objval = 5.003100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 14000: objval = 4.980600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 14200: objval = 4.896700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 14400: objval = 4.877400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 14600: objval = 4.877400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 14800: objval = 4.871000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 15000: objval = 4.871000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 15200: objval = 4.832700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 15400: objval = 4.813400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 15600: objval = 4.794100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 15800: objval = 4.774800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 16000: objval = 4.627600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 16200: objval = 4.627600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 16400: objval = 4.608300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 16600: objval = 4.608300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 16800: objval = 4.589000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 17000: objval = 4.566800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 17200: objval = 4.520100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 17400: objval = 4.500800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 17600: objval = 4.478600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 17800: objval = 4.456200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 18000: objval = 4.456200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 18200: objval = 4.344300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 18400: objval = 4.299300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 18600: objval = 4.254300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 18800: objval = 4.100100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 19000: objval = 4.100100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 19200: objval = 4.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 19400: objval = 4.036400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 19600: objval = 4.014200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 19800: objval = 3.992000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 20000: objval = 3.944000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 20200: objval = 3.923800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 20400: objval = 3.901300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 20600: objval = 3.859300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 20800: objval = 3.849700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 21000: objval = 3.849700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 21200: objval = 3.820000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 21400: objval = 3.810800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 21600: objval = 3.796400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 21800: objval = 3.794900000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 22000: objval = 3.794900000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 22200: objval = 3.780500000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 22400: objval = 3.779600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 22600: objval = 3.775400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 22800: objval = 3.770300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 23000: objval = 3.770000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : * 23058: objval = 3.770000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:55: INFO : OPTIMAL SOLUTION FOUND -Thu 14:55: INFO : Integer optimization begins... -Thu 14:55: INFO : + 23058: mip = not found yet >= -inf (1; 0) -Thu 14:55: INFO : + 23058: >>>>> 3.770000000e+04 >= 3.770000000e+04 0.0% (1; 0) -Thu 14:55: INFO : + 23058: mip = 3.770000000e+04 >= tree is empty 0.0% (0; 1) -Thu 14:55: INFO : INTEGER OPTIMAL SOLUTION FOUND -Thu 14:55: INFO : Time used: 50.8 secs -Thu 14:55: INFO : Memory used: 105.0 Mb (110140526 bytes) -Thu 14:55: INFO : Model has been successfully processed -Thu 14:55: INFO : Graph-pass 'MIPScheduler' took 52.8761 s (1 iterations) -Thu 14:55: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. -Thu 14:55: INFO : Graph-pass 'SubstituteEqPlaceholders' took 3.54410 ms (1 iterations) -Thu 14:55: INFO : Running kernel graph-pass 'ScheduleApplier'. -Thu 14:55: INFO : Graph-pass 'ScheduleApplier' took 73.2155 ms (1 iterations) -Thu 14:55: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:55: INFO : Graph-pass 'StatsPass' took 17.4868 ms (1 iterations) -Thu 14:55: INFO : Running kernel graph-pass 'ReachabilityPass'. -Thu 14:55: INFO : Graph-pass 'ReachabilityPass' took 313.504 ms (1 iterations) -Thu 14:55: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. -Thu 14:55: INFO : Graph-pass 'CheckForInputToFlushViolations' took 5.74101 ms (1 iterations) -Thu 14:55: INFO : Running Photon post-schedule graph optimisations (pass 1) -Thu 14:55: INFO : Running kernel graph-pass 'TapFIFOsPass'. -Thu 14:55: INFO : Graph-pass 'TapFIFOsPass' took 49.9582 ms (1 iterations) -Thu 14:55: INFO : Running kernel graph-pass 'FoldFIFOsPass'. -Thu 14:55: INFO : Graph-pass 'FoldFIFOsPass' took 6.46305 ms (1 iterations) -Thu 14:55: INFO : Running kernel graph-pass 'ValidateFIFOs'. -Thu 14:55: INFO : Graph-pass 'ValidateFIFOs' took 3.40887 ms (1 iterations) -Thu 14:55: INFO : Scheduling Photon graph (pass 2) -Thu 14:55: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:55: INFO : Graph-pass 'MarkConstantPass' took 5.09174 ms (1 iterations) -Thu 14:55: INFO : Running kernel graph-pass 'MIPScheduler'. -Thu 14:55: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvCacheKernel_scheduler_2_C.dat" --display "SpmvCacheKernel_scheduler_2_C.out" --log "SpmvCacheKernel_scheduler_2_C.log" -Thu 14:56: INFO : Reading model section from scheduler.mod... -Thu 14:56: INFO : 95 lines were read -Thu 14:56: INFO : Reading data section from SpmvCacheKernel_scheduler_2_C.dat... -Thu 14:56: INFO : 82467 lines were read -Thu 14:56: INFO : Generating schedulingEquation... -Thu 14:56: INFO : Generating bufferingEquation... -Thu 14:56: INFO : Generating afterFlushNode... -Thu 14:56: INFO : Generating forcePairConstraints... -Thu 14:56: INFO : Generating forceAtEnd... -Thu 14:56: INFO : Generating autoVarLatencyUserMin... -Thu 14:56: INFO : Generating autoVarLatencyUserMax... -Thu 14:56: INFO : Generating fifos... -Thu 14:56: INFO : Model has been successfully generated -Thu 14:56: INFO : ipp_basic_tech: 1 row(s) and 5 column(s) removed -Thu 14:56: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced -Thu 14:56: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed -Thu 14:56: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced -Thu 14:56: INFO : lpx_intopt: presolved MIP has 41288 rows, 27407 columns, 103191 non-zeros -Thu 14:56: INFO : lpx_intopt: 27407 integer columns, none of which are binary -Thu 14:56: INFO : lpx_adv_basis: size of triangular part = 41288 -Thu 14:56: INFO : Solving LP relaxation... -Thu 14:56: INFO : 0: objval = 6.326300000e+04 infeas = 1.000000000e+00 (0) -Thu 14:56: INFO : 200: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) -Thu 14:56: INFO : 400: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) -Thu 14:56: INFO : 600: objval = 6.325400000e+04 infeas = 3.779965753e-01 (0) -Thu 14:56: INFO : 800: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) -Thu 14:56: INFO : 1000: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) -Thu 14:56: INFO : 1200: objval = 6.327800000e+04 infeas = 3.587328767e-01 (0) -Thu 14:56: INFO : 1400: objval = 6.327800000e+04 infeas = 3.480308219e-01 (0) -Thu 14:56: INFO : 1600: objval = 6.327800000e+04 infeas = 3.480308219e-01 (0) -Thu 14:56: INFO : 1800: objval = 6.947200000e+04 infeas = 3.095034247e-01 (0) -Thu 14:56: INFO : 2000: objval = 6.947200000e+04 infeas = 2.649828767e-01 (0) -Thu 14:56: INFO : 2200: objval = 6.950900000e+04 infeas = 2.324486301e-01 (0) -Thu 14:56: INFO : 2400: objval = 6.956500000e+04 infeas = 3.809931507e-02 (0) -Thu 14:56: INFO : 2600: objval = 7.001100000e+04 infeas = 1.241438356e-02 (0) -Thu 14:56: INFO : 2800: objval = 7.001100000e+04 infeas = 1.070205479e-02 (0) -Thu 14:56: INFO : 2997: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 2997: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 3000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 3200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 3400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 3600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 3800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 4000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 4200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 4400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 4600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 4800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 5000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 5200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 5400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 5600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 5800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 6000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 6200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 6400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 6600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 6800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 7000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 7200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 7400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 7600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 7800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 8000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 8200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 8400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 8600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 8800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 9000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 9200: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 9400: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 9600: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 9800: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 10000: objval = 7.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 10200: objval = 6.406400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 10400: objval = 6.361600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 10600: objval = 6.316800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 10800: objval = 6.272000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 11000: objval = 6.227200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 11200: objval = 6.188800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 11400: objval = 6.188800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 11600: objval = 6.099200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 11800: objval = 6.009600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 12000: objval = 5.964800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 12200: objval = 5.875200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 12400: objval = 5.830400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 12600: objval = 5.740500000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 12800: objval = 5.561200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 13000: objval = 5.471600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 13200: objval = 5.343600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 13400: objval = 5.249600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 13600: objval = 5.160000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 13800: objval = 5.003100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 14000: objval = 4.980600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 14200: objval = 4.896700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 14400: objval = 4.877400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 14600: objval = 4.877400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 14800: objval = 4.871000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 15000: objval = 4.871000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 15200: objval = 4.832700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 15400: objval = 4.813400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 15600: objval = 4.794100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 15800: objval = 4.774800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 16000: objval = 4.627600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 16200: objval = 4.627600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 16400: objval = 4.608300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 16600: objval = 4.608300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 16800: objval = 4.589000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 17000: objval = 4.566800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 17200: objval = 4.520100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 17400: objval = 4.500800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 17600: objval = 4.478600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 17800: objval = 4.456200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 18000: objval = 4.456200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 18200: objval = 4.344300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 18400: objval = 4.299300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 18600: objval = 4.254300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 18800: objval = 4.100100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 19000: objval = 4.100100000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 19200: objval = 4.080800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 19400: objval = 4.036400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 19600: objval = 4.014200000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 19800: objval = 3.992000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 20000: objval = 3.944000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 20200: objval = 3.923800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 20400: objval = 3.901300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 20600: objval = 3.859300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 20800: objval = 3.849700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 21000: objval = 3.849700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 21200: objval = 3.820000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 21400: objval = 3.810800000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 21600: objval = 3.796400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 21800: objval = 3.794900000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 22000: objval = 3.794900000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 22200: objval = 3.780500000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 22400: objval = 3.779600000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 22600: objval = 3.775400000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 22800: objval = 3.770300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 23000: objval = 3.770000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : * 23058: objval = 3.770000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:56: INFO : OPTIMAL SOLUTION FOUND -Thu 14:56: INFO : Integer optimization begins... -Thu 14:56: INFO : + 23058: mip = not found yet >= -inf (1; 0) -Thu 14:56: INFO : + 23058: >>>>> 3.770000000e+04 >= 3.770000000e+04 0.0% (1; 0) -Thu 14:56: INFO : + 23058: mip = 3.770000000e+04 >= tree is empty 0.0% (0; 1) -Thu 14:56: INFO : INTEGER OPTIMAL SOLUTION FOUND -Thu 14:56: INFO : Time used: 50.1 secs -Thu 14:56: INFO : Memory used: 105.0 Mb (110140526 bytes) -Thu 14:56: INFO : Model has been successfully processed -Thu 14:56: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_schedule_report.csv -Thu 14:56: INFO : Graph-pass 'MIPScheduler' took 51.8851 s (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'RemoveDistMeasurementNodes'. -Thu 14:56: INFO : Graph-pass 'RemoveDistMeasurementNodes' took 23.8070 µs (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. -Thu 14:56: INFO : Graph-pass 'SubstituteEqPlaceholders' took 1.31064 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'ScheduleApplier'. -Thu 14:56: INFO : Graph-pass 'ScheduleApplier' took 1.48713 s (1 iterations) -Thu 14:56: INFO : Maximum stream latency for kernel 'SpmvCacheKernel': 40 -Thu 14:56: INFO : Using user logic for flush. -Thu 14:56: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:56: INFO : Graph-pass 'StatsPass' took 48.5060 ms (1 iterations) -Thu 14:56: INFO : Running Photon post-schedule graph optimisations (pass 2) -Thu 14:56: INFO : Running kernel graph-pass 'TapFIFOsPass'. -Thu 14:56: INFO : Graph-pass 'TapFIFOsPass' took 1.71144 s (2 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'FoldFIFOsPass'. -Thu 14:56: INFO : Graph-pass 'FoldFIFOsPass' took 8.46178 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:56: INFO : Graph-pass 'MarkConstantPass' took 6.03112 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'ScheduleAsserter'. -Thu 14:56: INFO : Graph-pass 'ScheduleAsserter' took 53.4247 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'ReplaceEvalStreamOffsetNodes'. -Thu 14:56: INFO : Graph-pass 'ReplaceEvalStreamOffsetNodes' took 3.50027 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'FIFOCoalesceRespectingPlacementPass'. -Thu 14:56: INFO : Graph-pass 'FIFOCoalesceRespectingPlacementPass' took 15.0504 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'FIFOReport'. -Thu 14:56: INFO : Graph-pass 'FIFOReport' took 23.0350 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:56: INFO : Graph-pass 'StatsPass' took 19.3618 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'RemoveUntypedConstants'. -Thu 14:56: INFO : Graph-pass 'RemoveUntypedConstants' took 1.54652 s (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'VariableSizeMappedRegInserter'. -Thu 14:56: INFO : Graph-pass 'VariableSizeMappedRegInserter' took 6.18298 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:56: INFO : Graph-pass 'MarkConstantPass' took 9.73287 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'MakeMaxFileNodeData'. -Thu 14:56: INFO : Graph-pass 'MakeMaxFileNodeData' took 311.756 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'MoveFanoutRegsForwards'. -Thu 14:56: INFO : Graph-pass 'MoveFanoutRegsForwards' took 7.45724 ms (1 iterations) -Thu 14:56: INFO : Optimization report for Kernel 'SpmvCacheKernel'. -Thu 14:56: INFO : Enabled optimizations: -Thu 14:56: INFO : DSP-MultAdd -Thu 14:56: INFO : Tri-Adder -Thu 14:56: INFO : Conditional (Tri)Adds/Subs/AddSubs -Thu 14:56: INFO : Power-of-2 Floating Point -Thu 14:56: INFO : Fifo Coalescing -Thu 14:56: INFO : Creating a preliminary MaxCompilerDesignData.dat. (@ CoreCompile SpmvCacheKernel) -Thu 14:56: INFO : Running kernel graph-pass 'WeightBasedCEPartitioner'. -Thu 14:56: INFO : Partitioning design into 1 CE domain(s) to minimize global signal fanout. -Thu 14:56: INFO : Graph-pass 'WeightBasedCEPartitioner' took 91.2140 µs (1 iterations) -Thu 14:56: INFO : Using maximum counter CE delay chain length 6 -Thu 14:56: INFO : CE Partition 0 Clock Phase 0 : Nodes=17059 (use fill=256, use flush=58) Fill counters=2 (+17 delay regs) Flush counters=1 (+13 delay regs) -Thu 14:56: INFO : Running kernel graph-pass 'FindWriteableMappedMemories'. -Thu 14:56: INFO : Graph-pass 'FindWriteableMappedMemories' took 3.46119 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:56: INFO : Graph-pass 'MarkConstantPass' took 5.80853 ms (1 iterations) -Thu 14:56: INFO : Running kernel graph-pass 'MaxConstantLatency'. -Thu 14:56: INFO : Graph-pass 'MaxConstantLatency' took 7.80843 ms (1 iterations) -Thu 14:56: INFO : Maximum constant latency: 0 -Thu 14:56: INFO : Running kernel graph-pass 'PhotonMaxDCTopEntity'. -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 2 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 2 -Thu 14:56: INFO : Implementing static multi-stage delay of 2 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 2 -Thu 14:56: INFO : Implementing static multi-stage delay of 3 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 3 -Thu 14:56: INFO : Implementing static multi-stage delay of 3 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 3 -Thu 14:56: INFO : Implementing static multi-stage delay of 4 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 4 -Thu 14:56: INFO : Implementing static multi-stage delay of 4 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 4 -Thu 14:56: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 -Thu 14:56: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 -Thu 14:56: INFO : Implementing static multi-stage delay of 6 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 6 -Thu 14:56: INFO : Implementing static multi-stage delay of 6 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 6 -Thu 14:56: INFO : Implementing static multi-stage delay of 7 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 7 -Thu 14:56: INFO : Implementing static multi-stage delay of 7 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 7 -Thu 14:56: INFO : Implementing static multi-stage delay of 8 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 8 -Thu 14:56: INFO : Implementing static multi-stage delay of 8 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 8 -Thu 14:56: INFO : Implementing static multi-stage delay of 9 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 9 -Thu 14:56: INFO : Implementing static multi-stage delay of 9 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 9 -Thu 14:56: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:56: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:56: INFO : Implementing static multi-stage delay of 11 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 11 -Thu 14:56: INFO : Implementing static multi-stage delay of 11 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 11 -Thu 14:56: INFO : Implementing static multi-stage delay of 12 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 12 -Thu 14:56: INFO : Implementing static multi-stage delay of 12 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 12 -Thu 14:56: INFO : Implementing static multi-stage delay of 13 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 13 -Thu 14:56: INFO : Implementing static multi-stage delay of 13 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 13 -Thu 14:56: INFO : Implementing static multi-stage delay of 14 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 14 -Thu 14:56: INFO : Implementing static multi-stage delay of 14 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 14 -Thu 14:56: INFO : Implementing static multi-stage delay of 15 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 15 -Thu 14:56: INFO : Implementing static multi-stage delay of 15 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 15 -Thu 14:56: INFO : Implementing static multi-stage delay of 16 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 16 -Thu 14:56: INFO : Implementing static multi-stage delay of 16 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 16 -Thu 14:56: INFO : Implementing static multi-stage delay of 17 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 17 -Thu 14:56: INFO : Implementing static multi-stage delay of 17 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 17 -Thu 14:56: INFO : Implementing static multi-stage delay of 18 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 18 -Thu 14:56: INFO : Implementing static multi-stage delay of 18 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 18 -Thu 14:56: INFO : Implementing static multi-stage delay of 19 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 19 -Thu 14:56: INFO : Implementing static multi-stage delay of 19 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 19 -Thu 14:56: INFO : Implementing static multi-stage delay of 20 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 20 -Thu 14:56: INFO : Implementing static multi-stage delay of 20 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 20 -Thu 14:56: INFO : Implementing static multi-stage delay of 21 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 21 -Thu 14:56: INFO : Implementing static multi-stage delay of 21 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 21 -Thu 14:56: INFO : Implementing static multi-stage delay of 22 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 22 -Thu 14:56: INFO : Implementing static multi-stage delay of 22 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 22 -Thu 14:56: INFO : Implementing static multi-stage delay of 23 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 23 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (6 bits wide), cost 0 RAMB18-equivalents, and 6 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:56: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (3 bits wide), cost 0 RAMB18-equivalents, and 3 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Graph-pass 'PhotonMaxDCTopEntity' took 29.0750 s (1 iterations) -Thu 14:57: INFO : Writing current graph to: Spmv_SpmvCacheKernel_final-hardware.pxg -Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. -Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 4.37400 s (1 iterations) -Thu 14:57: PROGRESS: -Thu 14:57: PROGRESS: Compiling kernel "SpmvKernel" -Thu 14:57: INFO : Configuration: -Thu 14:57: INFO : KernelConfiguration.allowDSPCascading = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.allowInputsOutputsBeforeFlushNode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.allowZeroLatencyNodeHold = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.board = MAX4848A [Init: MAX2116B, change: MAX4848A] -Thu 14:57: INFO : KernelConfiguration.bramBitsThreshold = 2080 [Init: 2080] -Thu 14:57: INFO : KernelConfiguration.buildTarget = HARDWARE [Init: NONE, change: HARDWARE] -Thu 14:57: INFO : KernelConfiguration.cePipelining = 2 [Init: 2] -Thu 14:57: INFO : KernelConfiguration.clockPhaseBalanceThreshold = 0.1 [Init: 0.1] -Thu 14:57: INFO : KernelConfiguration.clockPhasingRetries = 50 [Init: 50] -Thu 14:57: INFO : KernelConfiguration.dumpNeighboursString = [Init: ] -Thu 14:57: INFO : KernelConfiguration.enableCeReplication = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.enableClockPhasePartitioning = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableDebugIOControlRegs = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.enableDummyBuild = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableKernelProfiler = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enablePipelinedComputeController = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableShadowRegister = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.fifoSrlRegisterStages = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.flushOnInputDataCongtiguous = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.hardwareDebugDepth = 512 [Init: 512] -Thu 14:57: INFO : KernelConfiguration.hwHierarchyMode = UNSET [Init: UNSET] -Thu 14:57: INFO : KernelConfiguration.latencyAnnotation = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.latencyAnnotationIOs = [Init: null] -Thu 14:57: INFO : KernelConfiguration.maxCoalescedFifoWidth = 2147483647 [Init: 2147483647] -Thu 14:57: INFO : KernelConfiguration.maxPreAdderFanOut = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.netlistMode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.numPhotonStateMachines = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.conditionalArithmetic = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.counterChainWrapPipelining = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.optimizations.dspAddChain = OPTIMISE [Init: null, Init after BuildTarget change: OPTIMISE] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableActiveFanoutReduction = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBUFGCE = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterInputRegistering = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterRegistering = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFifoCoalescing = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFullPrecisionBinaryOpConstants = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableIntegratedRounding = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableMultiCycleReset = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enablePowerTwoFloatMult = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.inputFlushDistanceFactor = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.optimizationTechnique = DEFAULT [Init: DEFAULT] -Thu 14:57: INFO : KernelConfiguration.optimizations.triAdd = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.partialReconfBlockName = [Init: ] -Thu 14:57: INFO : KernelConfiguration.partialReconfMode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.partialReconfTemplate = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.replicateNodeCeLog2NumPartitions = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.romBRAMBitsThreshold = 2080 [Init: 2080] -Thu 14:57: INFO : KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION [Init: EXCEPTION] -Thu 14:57: INFO : KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION [Init: EXCEPTION] -Thu 14:57: INFO : KernelConfiguration.simulation.simProgressMessageFrequency = 0 [Init: 0] -Thu 14:57: INFO : -Thu 14:57: INFO : -- -Thu 14:57: WARNING : Warning (UNCONNECTED_DESIGN_ELEMENT): -Thu 14:57: WARNING : Unconnected elements in design 'SpmvKernel' -Thu 14:57: WARNING : details in : /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_graph_warnings.txt -Thu 14:57: INFO : Writing current graph to: Spmv_SpmvKernel_original.pxg -Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. -Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 160.743 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 190.003 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. -Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 860.268 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FindInputsLeadingToFlush'. -Thu 14:57: INFO : Graph-pass 'FindInputsLeadingToFlush' took 197.839 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForStatefulToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForStatefulToFlushViolations' took 154.077 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 297.850 µs (1 iterations) -Thu 14:57: INFO : Deleting directory: neighbours -Thu 14:57: INFO : Running Photon pre-schedule graph optimisations -Thu 14:57: INFO : Running kernel graph-pass 'AlignOrEradicatePrintfs'. -Thu 14:57: INFO : Graph-pass 'AlignOrEradicatePrintfs' took 46.5110 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldConstantsPass'. -Thu 14:57: INFO : Graph-pass 'FoldConstantsPass' took 220.519 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'OptimiseNodesPass'. -Thu 14:57: INFO : Graph-pass 'OptimiseNodesPass' took 751.732 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'DeleteRedundantNodes'. -Thu 14:57: INFO : Graph-pass 'DeleteRedundantNodes' took 217.130 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'AlteraDSPExtractionGraphPass'. -Thu 14:57: INFO : Optimized 0 sub-graphs into DSP multiply/add chains -Thu 14:57: INFO : Graph-pass 'AlteraDSPExtractionGraphPass' took 7.70974 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'TriAddExtractionPass'. -Thu 14:57: INFO : Graph-pass 'TriAddExtractionPass' took 74.6630 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ConditionalAddExtractionPass'. -Thu 14:57: INFO : Optimized 1 sub-graphs into conditional adds/subs/triadds. -Thu 14:57: INFO : Sub-graph 1 (ADD) contained: 32 bits, unconditional A, condition on input B, unconditional C, unconditional output -Thu 14:57: INFO : Origin stack trace: -Thu 14:57: INFO : com.maxeler.maxcompiler.v2.kernelcompiler.types.base.DFEVar.add(DFEVar.java:775) -Thu 14:57: INFO : SpmvKernel.(SpmvKernel.maxj:76) -Thu 14:57: INFO : SpmvManager.(SpmvManager.maxj:64) -Thu 14:57: INFO : SpmvManager.main(SpmvManager.maxj:139) -Thu 14:57: INFO : Graph-pass 'ConditionalAddExtractionPass' took 6.04135 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'PO2FPMultOptimiser'. -Thu 14:57: INFO : Graph-pass 'PO2FPMultOptimiser' took 159.683 µs (1 iterations) -Thu 14:57: INFO : Logging Photon stats to: SpmvKernel_photon_stats.csv -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.64957 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CollectNumericExceptions'. -Thu 14:57: INFO : Graph-pass 'CollectNumericExceptions' took 97.9830 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StreamOffsetDivExpand'. -Thu 14:57: INFO : Graph-pass 'StreamOffsetDivExpand' took 219.144 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FindIllegalLoops'. -Thu 14:57: INFO : Graph-pass 'FindIllegalLoops' took 5.18309 ms (1 iterations) -Thu 14:57: INFO : Scheduling Photon graph (pass 1) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 100.354 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. -Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvKernel_scheduler_1_C.dat" --display "SpmvKernel_scheduler_1_C.out" --log "SpmvKernel_scheduler_1_C.log" -Thu 14:57: INFO : Reading model section from scheduler.mod... -Thu 14:57: INFO : 95 lines were read -Thu 14:57: INFO : Reading data section from SpmvKernel_scheduler_1_C.dat... -Thu 14:57: INFO : 3085 lines were read -Thu 14:57: INFO : Generating schedulingEquation... -Thu 14:57: INFO : Generating bufferingEquation... -Thu 14:57: INFO : Generating afterFlushNode... -Thu 14:57: INFO : Generating forcePairConstraints... -Thu 14:57: INFO : Generating forceAtEnd... -Thu 14:57: INFO : Generating autoVarLatencyUserMin... -Thu 14:57: INFO : Generating autoVarLatencyUserMax... -Thu 14:57: INFO : Generating fifos... -Thu 14:57: INFO : Model has been successfully generated -Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 7 column(s) removed -Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced -Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed -Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced -Thu 14:57: INFO : lpx_intopt: presolved MIP has 1399 rows, 1075 columns, 3493 non-zeros -Thu 14:57: INFO : lpx_intopt: 1075 integer columns, none of which are binary -Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 1399 -Thu 14:57: INFO : Solving LP relaxation... -Thu 14:57: INFO : 0: objval = -6.126800000e+04 infeas = 1.000000000e+00 (0) -Thu 14:57: INFO : 200: objval = -2.380900000e+04 infeas = 3.533236994e-01 (0) -Thu 14:57: INFO : 400: objval = 1.093400000e+04 infeas = 6.250000000e-02 (0) -Thu 14:57: INFO : 464: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 464: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 600: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 800: objval = 1.204300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 1000: objval = 1.146700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 1024: objval = 1.129000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Integer optimization begins... -Thu 14:57: INFO : + 1024: mip = not found yet >= -inf (1; 0) -Thu 14:57: INFO : + 1024: >>>>> 1.129000000e+04 >= 1.129000000e+04 0.0% (1; 0) -Thu 14:57: INFO : + 1024: mip = 1.129000000e+04 >= tree is empty 0.0% (0; 1) -Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Time used: 0.1 secs -Thu 14:57: INFO : Memory used: 3.8 Mb (4005845 bytes) -Thu 14:57: INFO : Model has been successfully processed -Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 166.732 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. -Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 113.449 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. -Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 797.679 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.35259 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. -Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 689.107 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 68.9220 µs (1 iterations) -Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 1) -Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 2.09717 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 64.9960 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ValidateFIFOs'. -Thu 14:57: INFO : Graph-pass 'ValidateFIFOs' took 53.5520 µs (1 iterations) -Thu 14:57: INFO : Scheduling Photon graph (pass 2) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 75.7900 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. -Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvKernel_scheduler_2_C.dat" --display "SpmvKernel_scheduler_2_C.out" --log "SpmvKernel_scheduler_2_C.log" -Thu 14:57: INFO : Reading model section from scheduler.mod... -Thu 14:57: INFO : 95 lines were read -Thu 14:57: INFO : Reading data section from SpmvKernel_scheduler_2_C.dat... -Thu 14:57: INFO : 3085 lines were read -Thu 14:57: INFO : Generating schedulingEquation... -Thu 14:57: INFO : Generating bufferingEquation... -Thu 14:57: INFO : Generating afterFlushNode... -Thu 14:57: INFO : Generating forcePairConstraints... -Thu 14:57: INFO : Generating forceAtEnd... -Thu 14:57: INFO : Generating autoVarLatencyUserMin... -Thu 14:57: INFO : Generating autoVarLatencyUserMax... -Thu 14:57: INFO : Generating fifos... -Thu 14:57: INFO : Model has been successfully generated -Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 7 column(s) removed -Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced -Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed -Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced -Thu 14:57: INFO : lpx_intopt: presolved MIP has 1399 rows, 1075 columns, 3493 non-zeros -Thu 14:57: INFO : lpx_intopt: 1075 integer columns, none of which are binary -Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 1399 -Thu 14:57: INFO : Solving LP relaxation... -Thu 14:57: INFO : 0: objval = -6.126800000e+04 infeas = 1.000000000e+00 (0) -Thu 14:57: INFO : 200: objval = -2.380900000e+04 infeas = 3.533236994e-01 (0) -Thu 14:57: INFO : 400: objval = 1.093400000e+04 infeas = 6.250000000e-02 (0) -Thu 14:57: INFO : 464: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 464: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 600: objval = 1.213300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 800: objval = 1.204300000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 1000: objval = 1.146700000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 1024: objval = 1.129000000e+04 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Integer optimization begins... -Thu 14:57: INFO : + 1024: mip = not found yet >= -inf (1; 0) -Thu 14:57: INFO : + 1024: >>>>> 1.129000000e+04 >= 1.129000000e+04 0.0% (1; 0) -Thu 14:57: INFO : + 1024: mip = 1.129000000e+04 >= tree is empty 0.0% (0; 1) -Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Time used: 0.1 secs -Thu 14:57: INFO : Memory used: 3.8 Mb (4005845 bytes) -Thu 14:57: INFO : Model has been successfully processed -Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_schedule_report.csv -Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 162.303 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'RemoveDistMeasurementNodes'. -Thu 14:57: INFO : Graph-pass 'RemoveDistMeasurementNodes' took 5.88100 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. -Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 89.0560 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. -Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 13.0672 ms (1 iterations) -Thu 14:57: INFO : Maximum stream latency for kernel 'SpmvKernel': 134 -Thu 14:57: INFO : Using user logic for flush. -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.59587 ms (1 iterations) -Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 2) -Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 8.30207 ms (2 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 134.753 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 75.0760 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleAsserter'. -Thu 14:57: INFO : Graph-pass 'ScheduleAsserter' took 300.247 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReplaceEvalStreamOffsetNodes'. -Thu 14:57: INFO : Graph-pass 'ReplaceEvalStreamOffsetNodes' took 36.7310 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FIFOCoalesceRespectingPlacementPass'. -Thu 14:57: INFO : Graph-pass 'FIFOCoalesceRespectingPlacementPass' took 1.72370 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FIFOReport'. -Thu 14:57: INFO : Graph-pass 'FIFOReport' took 1.83741 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.63018 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'RemoveUntypedConstants'. -Thu 14:57: INFO : Graph-pass 'RemoveUntypedConstants' took 5.71052 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'VariableSizeMappedRegInserter'. -Thu 14:57: INFO : Graph-pass 'VariableSizeMappedRegInserter' took 37.0120 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 72.3890 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MakeMaxFileNodeData'. -Thu 14:57: INFO : Graph-pass 'MakeMaxFileNodeData' took 7.63173 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MoveFanoutRegsForwards'. -Thu 14:57: INFO : Graph-pass 'MoveFanoutRegsForwards' took 59.1670 µs (1 iterations) -Thu 14:57: INFO : Optimization report for Kernel 'SpmvKernel'. -Thu 14:57: INFO : Enabled optimizations: -Thu 14:57: INFO : DSP-MultAdd -Thu 14:57: INFO : Tri-Adder -Thu 14:57: INFO : Conditional (Tri)Adds/Subs/AddSubs -Thu 14:57: INFO : Power-of-2 Floating Point -Thu 14:57: INFO : Fifo Coalescing -Thu 14:57: INFO : Updating the preliminary MaxCompilerDesignData.dat. (@ CoreCompile SpmvKernel) -Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxCompilerDesignData.dat -Thu 14:57: INFO : Running kernel graph-pass 'WeightBasedCEPartitioner'. -Thu 14:57: INFO : Partitioning design into 1 CE domain(s) to minimize global signal fanout. -Thu 14:57: INFO : Graph-pass 'WeightBasedCEPartitioner' took 52.8530 µs (1 iterations) -Thu 14:57: INFO : Using maximum counter CE delay chain length 8 -Thu 14:57: INFO : CE Partition 0 Clock Phase 0 : Nodes=634 (use fill=20, use flush=9) Fill counters=8 (+16 delay regs) Flush counters=5 (+0 delay regs) -Thu 14:57: INFO : Running kernel graph-pass 'FindWriteableMappedMemories'. -Thu 14:57: INFO : Graph-pass 'FindWriteableMappedMemories' took 108.710 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 214.396 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MaxConstantLatency'. -Thu 14:57: INFO : Graph-pass 'MaxConstantLatency' took 140.705 µs (1 iterations) -Thu 14:57: INFO : Maximum constant latency: 0 -Thu 14:57: INFO : Running kernel graph-pass 'PhotonMaxDCTopEntity'. -Thu 14:57: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 -Thu 14:57: INFO : Implementing static multi-stage delay of 80 (1 bits wide), cost 1 RAMB18-equivalents, and 0 SRL32s. Made from: 0 x 512 BRAMs, Straggler BRAM 78, SRL of length 0 -Thu 14:57: INFO : Implementing static multi-stage delay of 40 (1 bits wide), cost 1 RAMB18-equivalents, and 0 SRL32s. Made from: 0 x 512 BRAMs, Straggler BRAM 38, SRL of length 0 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 16 (32 bits wide), cost 0 RAMB18-equivalents, and 32 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 16 -Thu 14:57: INFO : Implementing static multi-stage delay of 18 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 18 -Thu 14:57: INFO : Implementing static multi-stage delay of 11 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 11 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 1 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 1 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 10 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 10 -Thu 14:57: INFO : Implementing static multi-stage delay of 5 (64 bits wide), cost 0 RAMB18-equivalents, and 64 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 -Thu 14:57: INFO : Graph-pass 'PhotonMaxDCTopEntity' took 1.63105 s (1 iterations) -Thu 14:57: INFO : Writing current graph to: Spmv_SpmvKernel_final-hardware.pxg -Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. -Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 159.990 ms (1 iterations) -Thu 14:57: PROGRESS: -Thu 14:57: PROGRESS: Compiling kernel "SpmvReductionKernel" -Thu 14:57: INFO : Configuration: -Thu 14:57: INFO : KernelConfiguration.allowDSPCascading = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.allowInputsOutputsBeforeFlushNode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.allowZeroLatencyNodeHold = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.board = MAX4848A [Init: MAX2116B, change: MAX4848A] -Thu 14:57: INFO : KernelConfiguration.bramBitsThreshold = 2080 [Init: 2080] -Thu 14:57: INFO : KernelConfiguration.buildTarget = HARDWARE [Init: NONE, change: HARDWARE] -Thu 14:57: INFO : KernelConfiguration.cePipelining = 2 [Init: 2] -Thu 14:57: INFO : KernelConfiguration.clockPhaseBalanceThreshold = 0.1 [Init: 0.1] -Thu 14:57: INFO : KernelConfiguration.clockPhasingRetries = 50 [Init: 50] -Thu 14:57: INFO : KernelConfiguration.dumpNeighboursString = [Init: ] -Thu 14:57: INFO : KernelConfiguration.enableCeReplication = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.enableClockPhasePartitioning = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableDebugIOControlRegs = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.enableDummyBuild = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableKernelProfiler = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enablePipelinedComputeController = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableShadowRegister = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.fifoSrlRegisterStages = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.flushOnInputDataCongtiguous = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.hardwareDebugDepth = 512 [Init: 512] -Thu 14:57: INFO : KernelConfiguration.hwHierarchyMode = UNSET [Init: UNSET] -Thu 14:57: INFO : KernelConfiguration.latencyAnnotation = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.latencyAnnotationIOs = [Init: null] -Thu 14:57: INFO : KernelConfiguration.maxCoalescedFifoWidth = 2147483647 [Init: 2147483647] -Thu 14:57: INFO : KernelConfiguration.maxPreAdderFanOut = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.netlistMode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.numPhotonStateMachines = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.conditionalArithmetic = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.counterChainWrapPipelining = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.optimizations.dspAddChain = OPTIMISE [Init: null, Init after BuildTarget change: OPTIMISE] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableActiveFanoutReduction = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBUFGCE = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterInputRegistering = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterRegistering = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFifoCoalescing = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFullPrecisionBinaryOpConstants = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableIntegratedRounding = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableMultiCycleReset = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enablePowerTwoFloatMult = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.inputFlushDistanceFactor = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.optimizationTechnique = DEFAULT [Init: DEFAULT] -Thu 14:57: INFO : KernelConfiguration.optimizations.triAdd = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.partialReconfBlockName = [Init: ] -Thu 14:57: INFO : KernelConfiguration.partialReconfMode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.partialReconfTemplate = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.replicateNodeCeLog2NumPartitions = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.romBRAMBitsThreshold = 2080 [Init: 2080] -Thu 14:57: INFO : KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION [Init: EXCEPTION] -Thu 14:57: INFO : KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION [Init: EXCEPTION] -Thu 14:57: INFO : KernelConfiguration.simulation.simProgressMessageFrequency = 0 [Init: 0] -Thu 14:57: INFO : -Thu 14:57: INFO : -- -Thu 14:57: INFO : Writing current graph to: Spmv_SpmvReductionKernel_original.pxg -Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. -Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 9.73425 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 9.01900 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. -Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 37.2780 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FindInputsLeadingToFlush'. -Thu 14:57: INFO : Graph-pass 'FindInputsLeadingToFlush' took 83.5950 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForStatefulToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForStatefulToFlushViolations' took 59.5980 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 21.0010 µs (1 iterations) -Thu 14:57: INFO : Deleting directory: neighbours -Thu 14:57: INFO : Running Photon pre-schedule graph optimisations -Thu 14:57: INFO : Running kernel graph-pass 'AlignOrEradicatePrintfs'. -Thu 14:57: INFO : Graph-pass 'AlignOrEradicatePrintfs' took 5.17500 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldConstantsPass'. -Thu 14:57: INFO : Graph-pass 'FoldConstantsPass' took 26.8250 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'OptimiseNodesPass'. -Thu 14:57: INFO : Graph-pass 'OptimiseNodesPass' took 60.2750 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'DeleteRedundantNodes'. -Thu 14:57: INFO : Graph-pass 'DeleteRedundantNodes' took 10.2110 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'AlteraDSPExtractionGraphPass'. -Thu 14:57: INFO : Optimized 0 sub-graphs into DSP multiply/add chains -Thu 14:57: INFO : Graph-pass 'AlteraDSPExtractionGraphPass' took 159.777 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'TriAddExtractionPass'. -Thu 14:57: INFO : Graph-pass 'TriAddExtractionPass' took 6.61100 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ConditionalAddExtractionPass'. -Thu 14:57: INFO : Optimized 0 sub-graphs into conditional adds/subs/triadds. -Thu 14:57: INFO : Graph-pass 'ConditionalAddExtractionPass' took 56.2480 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'PO2FPMultOptimiser'. -Thu 14:57: INFO : Graph-pass 'PO2FPMultOptimiser' took 8.91200 µs (1 iterations) -Thu 14:57: INFO : Logging Photon stats to: SpmvReductionKernel_photon_stats.csv -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.10475 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CollectNumericExceptions'. -Thu 14:57: INFO : Graph-pass 'CollectNumericExceptions' took 13.7920 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StreamOffsetDivExpand'. -Thu 14:57: INFO : Graph-pass 'StreamOffsetDivExpand' took 104.754 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FindIllegalLoops'. -Thu 14:57: INFO : Graph-pass 'FindIllegalLoops' took 260.091 µs (1 iterations) -Thu 14:57: INFO : Scheduling Photon graph (pass 1) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 5.87000 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. -Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvReductionKernel_scheduler_1_C.dat" --display "SpmvReductionKernel_scheduler_1_C.out" --log "SpmvReductionKernel_scheduler_1_C.log" -Thu 14:57: INFO : Reading model section from scheduler.mod... -Thu 14:57: INFO : 95 lines were read -Thu 14:57: INFO : Reading data section from SpmvReductionKernel_scheduler_1_C.dat... -Thu 14:57: INFO : 157 lines were read -Thu 14:57: INFO : Generating schedulingEquation... -Thu 14:57: INFO : Generating bufferingEquation... -Thu 14:57: INFO : Generating afterFlushNode... -Thu 14:57: INFO : Generating forcePairConstraints... -Thu 14:57: INFO : Generating forceAtEnd... -Thu 14:57: INFO : Generating autoVarLatencyUserMin... -Thu 14:57: INFO : Generating autoVarLatencyUserMax... -Thu 14:57: INFO : Generating fifos... -Thu 14:57: INFO : Model has been successfully generated -Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 3 column(s) removed -Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced -Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed -Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced -Thu 14:57: INFO : lpx_intopt: presolved MIP has 39 rows, 35 columns, 96 non-zeros -Thu 14:57: INFO : lpx_intopt: 35 integer columns, none of which are binary -Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 39 -Thu 14:57: INFO : Solving LP relaxation... -Thu 14:57: INFO : 0: objval = 4.930000000e+02 infeas = 1.000000000e+00 (0) -Thu 14:57: INFO : 29: objval = 4.700000000e+01 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 29: objval = 4.700000000e+01 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 35: objval = 1.400000000e+01 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Integer optimization begins... -Thu 14:57: INFO : + 35: mip = not found yet >= -inf (1; 0) -Thu 14:57: INFO : + 35: >>>>> 1.400000000e+01 >= 1.400000000e+01 0.0% (1; 0) -Thu 14:57: INFO : + 35: mip = 1.400000000e+01 >= tree is empty 0.0% (0; 1) -Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Time used: 0.0 secs -Thu 14:57: INFO : Memory used: 0.2 Mb (240330 bytes) -Thu 14:57: INFO : Model has been successfully processed -Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 28.3936 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. -Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 12.2380 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. -Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 28.2610 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 920.953 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. -Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 31.4030 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 16.6260 µs (1 iterations) -Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 1) -Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 53.5250 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 7.66000 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ValidateFIFOs'. -Thu 14:57: INFO : Graph-pass 'ValidateFIFOs' took 5.27000 µs (1 iterations) -Thu 14:57: INFO : Scheduling Photon graph (pass 2) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 6.19700 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. -Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvReductionKernel_scheduler_2_C.dat" --display "SpmvReductionKernel_scheduler_2_C.out" --log "SpmvReductionKernel_scheduler_2_C.log" -Thu 14:57: INFO : Reading model section from scheduler.mod... -Thu 14:57: INFO : 95 lines were read -Thu 14:57: INFO : Reading data section from SpmvReductionKernel_scheduler_2_C.dat... -Thu 14:57: INFO : 157 lines were read -Thu 14:57: INFO : Generating schedulingEquation... -Thu 14:57: INFO : Generating bufferingEquation... -Thu 14:57: INFO : Generating afterFlushNode... -Thu 14:57: INFO : Generating forcePairConstraints... -Thu 14:57: INFO : Generating forceAtEnd... -Thu 14:57: INFO : Generating autoVarLatencyUserMin... -Thu 14:57: INFO : Generating autoVarLatencyUserMax... -Thu 14:57: INFO : Generating fifos... -Thu 14:57: INFO : Model has been successfully generated -Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 3 column(s) removed -Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced -Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed -Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced -Thu 14:57: INFO : lpx_intopt: presolved MIP has 39 rows, 35 columns, 96 non-zeros -Thu 14:57: INFO : lpx_intopt: 35 integer columns, none of which are binary -Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 39 -Thu 14:57: INFO : Solving LP relaxation... -Thu 14:57: INFO : 0: objval = 4.930000000e+02 infeas = 1.000000000e+00 (0) -Thu 14:57: INFO : 29: objval = 4.700000000e+01 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 29: objval = 4.700000000e+01 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 35: objval = 1.400000000e+01 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Integer optimization begins... -Thu 14:57: INFO : + 35: mip = not found yet >= -inf (1; 0) -Thu 14:57: INFO : + 35: >>>>> 1.400000000e+01 >= 1.400000000e+01 0.0% (1; 0) -Thu 14:57: INFO : + 35: mip = 1.400000000e+01 >= tree is empty 0.0% (0; 1) -Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Time used: 0.0 secs -Thu 14:57: INFO : Memory used: 0.2 Mb (240330 bytes) -Thu 14:57: INFO : Model has been successfully processed -Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_schedule_report.csv -Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 26.4224 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'RemoveDistMeasurementNodes'. -Thu 14:57: INFO : Graph-pass 'RemoveDistMeasurementNodes' took 3.09400 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. -Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 9.32700 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. -Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 465.243 µs (1 iterations) -Thu 14:57: INFO : Maximum stream latency for kernel 'SpmvReductionKernel': 30000 -Thu 14:57: INFO : Using user logic for flush. -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 994.328 µs (1 iterations) -Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 2) -Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 14.7650 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 8.00100 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 6.64700 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleAsserter'. -Thu 14:57: INFO : Graph-pass 'ScheduleAsserter' took 11.0640 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReplaceEvalStreamOffsetNodes'. -Thu 14:57: INFO : Graph-pass 'ReplaceEvalStreamOffsetNodes' took 4.60200 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FIFOCoalesceRespectingPlacementPass'. -Thu 14:57: INFO : Graph-pass 'FIFOCoalesceRespectingPlacementPass' took 105.192 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FIFOReport'. -Thu 14:57: INFO : Graph-pass 'FIFOReport' took 1.04517 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.16188 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'RemoveUntypedConstants'. -Thu 14:57: INFO : Graph-pass 'RemoveUntypedConstants' took 684.527 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'VariableSizeMappedRegInserter'. -Thu 14:57: INFO : Graph-pass 'VariableSizeMappedRegInserter' took 4.86100 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 5.79100 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MakeMaxFileNodeData'. -Thu 14:57: INFO : Graph-pass 'MakeMaxFileNodeData' took 302.265 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MoveFanoutRegsForwards'. -Thu 14:57: INFO : Graph-pass 'MoveFanoutRegsForwards' took 4.76700 µs (1 iterations) -Thu 14:57: INFO : Optimization report for Kernel 'SpmvReductionKernel'. -Thu 14:57: INFO : Enabled optimizations: -Thu 14:57: INFO : DSP-MultAdd -Thu 14:57: INFO : Tri-Adder -Thu 14:57: INFO : Conditional (Tri)Adds/Subs/AddSubs -Thu 14:57: INFO : Power-of-2 Floating Point -Thu 14:57: INFO : Fifo Coalescing -Thu 14:57: INFO : Updating the preliminary MaxCompilerDesignData.dat. (@ CoreCompile SpmvReductionKernel) -Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxCompilerDesignData.dat -Thu 14:57: INFO : Running kernel graph-pass 'WeightBasedCEPartitioner'. -Thu 14:57: INFO : Partitioning design into 1 CE domain(s) to minimize global signal fanout. -Thu 14:57: INFO : Graph-pass 'WeightBasedCEPartitioner' took 48.2220 µs (1 iterations) -Thu 14:57: INFO : Using maximum counter CE delay chain length 15 -Thu 14:57: INFO : CE Partition 0 Clock Phase 0 : Nodes=39 (use fill=7, use flush=3) Fill counters=1 (+23 delay regs) Flush counters=1 (+0 delay regs) -Thu 14:57: INFO : Running kernel graph-pass 'FindWriteableMappedMemories'. -Thu 14:57: INFO : Graph-pass 'FindWriteableMappedMemories' took 25.4730 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 14.6460 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MaxConstantLatency'. -Thu 14:57: INFO : Graph-pass 'MaxConstantLatency' took 22.1220 µs (1 iterations) -Thu 14:57: INFO : Maximum constant latency: 1 -Thu 14:57: INFO : Running kernel graph-pass 'PhotonMaxDCTopEntity'. -Thu 14:57: INFO : Implementing static multi-stage delay of 14 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 14 -Thu 14:57: INFO : Graph-pass 'PhotonMaxDCTopEntity' took 160.151 ms (1 iterations) -Thu 14:57: INFO : Writing current graph to: Spmv_SpmvReductionKernel_final-hardware.pxg -Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. -Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 9.79377 ms (1 iterations) -Thu 14:57: PROGRESS: -Thu 14:57: PROGRESS: Compiling kernel "SpmvPaddingKernel" -Thu 14:57: INFO : Configuration: -Thu 14:57: INFO : KernelConfiguration.allowDSPCascading = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.allowInputsOutputsBeforeFlushNode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.allowZeroLatencyNodeHold = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.board = MAX4848A [Init: MAX2116B, change: MAX4848A] -Thu 14:57: INFO : KernelConfiguration.bramBitsThreshold = 2080 [Init: 2080] -Thu 14:57: INFO : KernelConfiguration.buildTarget = HARDWARE [Init: NONE, change: HARDWARE] -Thu 14:57: INFO : KernelConfiguration.cePipelining = 2 [Init: 2] -Thu 14:57: INFO : KernelConfiguration.clockPhaseBalanceThreshold = 0.1 [Init: 0.1] -Thu 14:57: INFO : KernelConfiguration.clockPhasingRetries = 50 [Init: 50] -Thu 14:57: INFO : KernelConfiguration.dumpNeighboursString = [Init: ] -Thu 14:57: INFO : KernelConfiguration.enableCeReplication = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.enableClockPhasePartitioning = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableDebugIOControlRegs = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.enableDummyBuild = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableKernelProfiler = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enablePipelinedComputeController = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.enableShadowRegister = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.fifoSrlRegisterStages = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.flushOnInputDataCongtiguous = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.hardwareDebugDepth = 512 [Init: 512] -Thu 14:57: INFO : KernelConfiguration.hwHierarchyMode = UNSET [Init: UNSET] -Thu 14:57: INFO : KernelConfiguration.latencyAnnotation = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.latencyAnnotationIOs = [Init: null] -Thu 14:57: INFO : KernelConfiguration.maxCoalescedFifoWidth = 2147483647 [Init: 2147483647] -Thu 14:57: INFO : KernelConfiguration.maxPreAdderFanOut = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.netlistMode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.numPhotonStateMachines = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.conditionalArithmetic = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.counterChainWrapPipelining = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.optimizations.dspAddChain = OPTIMISE [Init: null, Init after BuildTarget change: OPTIMISE] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableActiveFanoutReduction = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBUFGCE = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterInputRegistering = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableBetterRegistering = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFifoCoalescing = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableFullPrecisionBinaryOpConstants = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableIntegratedRounding = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableMultiCycleReset = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.optimizations.enablePowerTwoFloatMult = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.optimizations.inputFlushDistanceFactor = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1 [Init: 1] -Thu 14:57: INFO : KernelConfiguration.optimizations.optimizationTechnique = DEFAULT [Init: DEFAULT] -Thu 14:57: INFO : KernelConfiguration.optimizations.triAdd = true [Init: true] -Thu 14:57: INFO : KernelConfiguration.partialReconfBlockName = [Init: ] -Thu 14:57: INFO : KernelConfiguration.partialReconfMode = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.partialReconfTemplate = false [Init: false] -Thu 14:57: INFO : KernelConfiguration.replicateNodeCeLog2NumPartitions = 0 [Init: 0] -Thu 14:57: INFO : KernelConfiguration.romBRAMBitsThreshold = 2080 [Init: 2080] -Thu 14:57: INFO : KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION [Init: EXCEPTION] -Thu 14:57: INFO : KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION [Init: EXCEPTION] -Thu 14:57: INFO : KernelConfiguration.simulation.simProgressMessageFrequency = 0 [Init: 0] -Thu 14:57: INFO : -Thu 14:57: INFO : -- -Thu 14:57: INFO : Writing current graph to: Spmv_SpmvPaddingKernel_original.pxg -Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. -Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 8.90121 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 8.32500 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. -Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 29.3590 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FindInputsLeadingToFlush'. -Thu 14:57: INFO : Graph-pass 'FindInputsLeadingToFlush' took 8.56500 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForStatefulToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForStatefulToFlushViolations' took 26.5070 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 20.2720 µs (1 iterations) -Thu 14:57: INFO : Deleting directory: neighbours -Thu 14:57: INFO : Running Photon pre-schedule graph optimisations -Thu 14:57: INFO : Running kernel graph-pass 'AlignOrEradicatePrintfs'. -Thu 14:57: INFO : Graph-pass 'AlignOrEradicatePrintfs' took 5.17000 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldConstantsPass'. -Thu 14:57: INFO : Graph-pass 'FoldConstantsPass' took 408.010 µs (2 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'OptimiseNodesPass'. -Thu 14:57: INFO : Graph-pass 'OptimiseNodesPass' took 117.195 µs (2 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'DeleteRedundantNodes'. -Thu 14:57: INFO : Graph-pass 'DeleteRedundantNodes' took 7.34400 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'AlteraDSPExtractionGraphPass'. -Thu 14:57: INFO : Optimized 0 sub-graphs into DSP multiply/add chains -Thu 14:57: INFO : Graph-pass 'AlteraDSPExtractionGraphPass' took 101.869 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'TriAddExtractionPass'. -Thu 14:57: INFO : Graph-pass 'TriAddExtractionPass' took 5.51500 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ConditionalAddExtractionPass'. -Thu 14:57: INFO : Optimized 0 sub-graphs into conditional adds/subs/triadds. -Thu 14:57: INFO : Graph-pass 'ConditionalAddExtractionPass' took 52.7820 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'PO2FPMultOptimiser'. -Thu 14:57: INFO : Graph-pass 'PO2FPMultOptimiser' took 8.37900 µs (1 iterations) -Thu 14:57: INFO : Logging Photon stats to: SpmvPaddingKernel_photon_stats.csv -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.01281 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CollectNumericExceptions'. -Thu 14:57: INFO : Graph-pass 'CollectNumericExceptions' took 7.21900 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StreamOffsetDivExpand'. -Thu 14:57: INFO : Graph-pass 'StreamOffsetDivExpand' took 9.42200 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FindIllegalLoops'. -Thu 14:57: INFO : Graph-pass 'FindIllegalLoops' took 22.1690 µs (1 iterations) -Thu 14:57: INFO : Scheduling Photon graph (pass 1) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 5.44400 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. -Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvPaddingKernel_scheduler_1_C.dat" --display "SpmvPaddingKernel_scheduler_1_C.out" --log "SpmvPaddingKernel_scheduler_1_C.log" -Thu 14:57: INFO : Reading model section from scheduler.mod... -Thu 14:57: INFO : 95 lines were read -Thu 14:57: INFO : Reading data section from SpmvPaddingKernel_scheduler_1_C.dat... -Thu 14:57: INFO : 135 lines were read -Thu 14:57: INFO : Generating schedulingEquation... -Thu 14:57: INFO : Generating bufferingEquation... -Thu 14:57: INFO : Generating afterFlushNode... -Thu 14:57: INFO : Generating forcePairConstraints... -Thu 14:57: INFO : Generating forceAtEnd... -Thu 14:57: INFO : Generating autoVarLatencyUserMin... -Thu 14:57: INFO : Generating autoVarLatencyUserMax... -Thu 14:57: INFO : Generating fifos... -Thu 14:57: INFO : Model has been successfully generated -Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 3 column(s) removed -Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced -Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed -Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced -Thu 14:57: INFO : lpx_intopt: presolved MIP has 29 rows, 27 columns, 71 non-zeros -Thu 14:57: INFO : lpx_intopt: 27 integer columns, none of which are binary -Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 29 -Thu 14:57: INFO : Solving LP relaxation... -Thu 14:57: INFO : 0: objval = -4.330000000e+02 infeas = 1.000000000e+00 (0) -Thu 14:57: INFO : 20: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 20: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 22: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Integer optimization begins... -Thu 14:57: INFO : + 22: mip = not found yet >= -inf (1; 0) -Thu 14:57: INFO : + 22: >>>>> 5.000000000e+00 >= 5.000000000e+00 0.0% (1; 0) -Thu 14:57: INFO : + 22: mip = 5.000000000e+00 >= tree is empty 0.0% (0; 1) -Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Time used: 0.0 secs -Thu 14:57: INFO : Memory used: 0.2 Mb (227608 bytes) -Thu 14:57: INFO : Model has been successfully processed -Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 28.4552 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. -Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 15.0270 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. -Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 26.8780 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 832.365 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReachabilityPass'. -Thu 14:57: INFO : Graph-pass 'ReachabilityPass' took 28.9440 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'CheckForInputToFlushViolations'. -Thu 14:57: INFO : Graph-pass 'CheckForInputToFlushViolations' took 18.6410 µs (1 iterations) -Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 1) -Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 13.3410 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 6.79400 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ValidateFIFOs'. -Thu 14:57: INFO : Graph-pass 'ValidateFIFOs' took 4.80200 µs (1 iterations) -Thu 14:57: INFO : Scheduling Photon graph (pass 2) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 6.16300 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MIPScheduler'. -Thu 14:57: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/glpsol" --intopt --model "scheduler.mod" --data "SpmvPaddingKernel_scheduler_2_C.dat" --display "SpmvPaddingKernel_scheduler_2_C.out" --log "SpmvPaddingKernel_scheduler_2_C.log" -Thu 14:57: INFO : Reading model section from scheduler.mod... -Thu 14:57: INFO : 95 lines were read -Thu 14:57: INFO : Reading data section from SpmvPaddingKernel_scheduler_2_C.dat... -Thu 14:57: INFO : 135 lines were read -Thu 14:57: INFO : Generating schedulingEquation... -Thu 14:57: INFO : Generating bufferingEquation... -Thu 14:57: INFO : Generating afterFlushNode... -Thu 14:57: INFO : Generating forcePairConstraints... -Thu 14:57: INFO : Generating forceAtEnd... -Thu 14:57: INFO : Generating autoVarLatencyUserMin... -Thu 14:57: INFO : Generating autoVarLatencyUserMax... -Thu 14:57: INFO : Generating fifos... -Thu 14:57: INFO : Model has been successfully generated -Thu 14:57: INFO : ipp_basic_tech: 1 row(s) and 3 column(s) removed -Thu 14:57: INFO : ipp_reduce_bnds: 1 pass(es) made, 0 bound(s) reduced -Thu 14:57: INFO : ipp_basic_tech: 0 row(s) and 0 column(s) removed -Thu 14:57: INFO : ipp_reduce_coef: 1 pass(es) made, 0 coefficient(s) reduced -Thu 14:57: INFO : lpx_intopt: presolved MIP has 29 rows, 27 columns, 71 non-zeros -Thu 14:57: INFO : lpx_intopt: 27 integer columns, none of which are binary -Thu 14:57: INFO : lpx_adv_basis: size of triangular part = 29 -Thu 14:57: INFO : Solving LP relaxation... -Thu 14:57: INFO : 0: objval = -4.330000000e+02 infeas = 1.000000000e+00 (0) -Thu 14:57: INFO : 20: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 20: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : * 22: objval = 5.000000000e+00 infeas = 0.000000000e+00 (0) -Thu 14:57: INFO : OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Integer optimization begins... -Thu 14:57: INFO : + 22: mip = not found yet >= -inf (1; 0) -Thu 14:57: INFO : + 22: >>>>> 5.000000000e+00 >= 5.000000000e+00 0.0% (1; 0) -Thu 14:57: INFO : + 22: mip = 5.000000000e+00 >= tree is empty 0.0% (0; 1) -Thu 14:57: INFO : INTEGER OPTIMAL SOLUTION FOUND -Thu 14:57: INFO : Time used: 0.0 secs -Thu 14:57: INFO : Memory used: 0.2 Mb (227608 bytes) -Thu 14:57: INFO : Model has been successfully processed -Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel_schedule_report.csv -Thu 14:57: INFO : Graph-pass 'MIPScheduler' took 29.4286 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'RemoveDistMeasurementNodes'. -Thu 14:57: INFO : Graph-pass 'RemoveDistMeasurementNodes' took 5.22300 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'SubstituteEqPlaceholders'. -Thu 14:57: INFO : Graph-pass 'SubstituteEqPlaceholders' took 13.3800 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleApplier'. -Thu 14:57: INFO : Graph-pass 'ScheduleApplier' took 355.744 µs (1 iterations) -Thu 14:57: INFO : Maximum stream latency for kernel 'SpmvPaddingKernel': 10 -Thu 14:57: INFO : Using user logic for flush. -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 877.573 µs (1 iterations) -Thu 14:57: INFO : Running Photon post-schedule graph optimisations (pass 2) -Thu 14:57: INFO : Running kernel graph-pass 'TapFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'TapFIFOsPass' took 13.9690 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FoldFIFOsPass'. -Thu 14:57: INFO : Graph-pass 'FoldFIFOsPass' took 8.39300 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 5.77000 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ScheduleAsserter'. -Thu 14:57: INFO : Graph-pass 'ScheduleAsserter' took 9.36900 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'ReplaceEvalStreamOffsetNodes'. -Thu 14:57: INFO : Graph-pass 'ReplaceEvalStreamOffsetNodes' took 4.37700 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FIFOCoalesceRespectingPlacementPass'. -Thu 14:57: INFO : Graph-pass 'FIFOCoalesceRespectingPlacementPass' took 66.8490 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'FIFOReport'. -Thu 14:57: INFO : Graph-pass 'FIFOReport' took 970.546 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'StatsPass'. -Thu 14:57: INFO : Graph-pass 'StatsPass' took 1.08633 ms (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'RemoveUntypedConstants'. -Thu 14:57: INFO : Graph-pass 'RemoveUntypedConstants' took 644.501 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'VariableSizeMappedRegInserter'. -Thu 14:57: INFO : Graph-pass 'VariableSizeMappedRegInserter' took 4.28200 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 4.97500 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MakeMaxFileNodeData'. -Thu 14:57: INFO : Graph-pass 'MakeMaxFileNodeData' took 243.285 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MoveFanoutRegsForwards'. -Thu 14:57: INFO : Graph-pass 'MoveFanoutRegsForwards' took 4.34800 µs (1 iterations) -Thu 14:57: INFO : Optimization report for Kernel 'SpmvPaddingKernel'. -Thu 14:57: INFO : Enabled optimizations: -Thu 14:57: INFO : DSP-MultAdd -Thu 14:57: INFO : Tri-Adder -Thu 14:57: INFO : Conditional (Tri)Adds/Subs/AddSubs -Thu 14:57: INFO : Power-of-2 Floating Point -Thu 14:57: INFO : Fifo Coalescing -Thu 14:57: INFO : Updating the preliminary MaxCompilerDesignData.dat. (@ CoreCompile SpmvPaddingKernel) -Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxCompilerDesignData.dat -Thu 14:57: INFO : Running kernel graph-pass 'WeightBasedCEPartitioner'. -Thu 14:57: INFO : Partitioning design into 1 CE domain(s) to minimize global signal fanout. -Thu 14:57: INFO : Graph-pass 'WeightBasedCEPartitioner' took 52.6570 µs (1 iterations) -Thu 14:57: INFO : Using maximum counter CE delay chain length 4 -Thu 14:57: INFO : CE Partition 0 Clock Phase 0 : Nodes=33 (use fill=7, use flush=3) Fill counters=2 (+5 delay regs) Flush counters=1 (+0 delay regs) -Thu 14:57: INFO : Running kernel graph-pass 'FindWriteableMappedMemories'. -Thu 14:57: INFO : Graph-pass 'FindWriteableMappedMemories' took 5.67600 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MarkConstantPass'. -Thu 14:57: INFO : Graph-pass 'MarkConstantPass' took 11.9300 µs (1 iterations) -Thu 14:57: INFO : Running kernel graph-pass 'MaxConstantLatency'. -Thu 14:57: INFO : Graph-pass 'MaxConstantLatency' took 19.6460 µs (1 iterations) -Thu 14:57: INFO : Maximum constant latency: 0 -Thu 14:57: INFO : Running kernel graph-pass 'PhotonMaxDCTopEntity'. -Thu 14:57: INFO : Implementing static multi-stage delay of 5 (1 bits wide), cost 0 RAMB18-equivalents, and 1 SRL32s. Made from: 0 x 0 BRAMs, Straggler BRAM 0, SRL of length 5 -Thu 14:57: INFO : Graph-pass 'PhotonMaxDCTopEntity' took 106.512 ms (1 iterations) -Thu 14:57: INFO : Writing current graph to: Spmv_SpmvPaddingKernel_final-hardware.pxg -Thu 14:57: INFO : Running kernel graph-pass 'GeneratePXG'. -Thu 14:57: INFO : Graph-pass 'GeneratePXG' took 8.35731 ms (1 iterations) -Thu 14:57: INFO : Running manager compiler graph-pass: GenerateMXGInfo -Thu 14:57: INFO : Running manager compiler graph-pass: GenerateSlicHostCode -Thu 14:57: INFO : Generating SLIC interface information -Thu 14:57: INFO : Generating SLIC code for interface 'write' -Thu 14:57: INFO : Creating CModeDramLinear instance for "cpu2lmem". -Thu 14:57: INFO : Creating CModeDramLinear instance for "indptr". -Thu 14:57: INFO : Creating CModeDramLinear instance for "values". -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvReductionKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvPaddingKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvCacheKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvKernel.current_run_cycle_count' -Thu 14:57: INFO : Interface 'write' depends on parameter 'size_bytes' -Thu 14:57: INFO : Interface 'write' depends on parameter 'start_bytes' -Thu 14:57: INFO : Generating SLIC code for interface 'default' -Thu 14:57: INFO : Creating CModeDramLinear instance for "cpu2lmem". -Thu 14:57: INFO : Creating CModeDramLinear instance for "indptr". -Thu 14:57: INFO : Creating CModeDramLinear instance for "values". -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvReductionKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvPaddingKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvCacheKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvKernel.current_run_cycle_count' -Thu 14:57: INFO : Interface 'default' depends on parameter 'nPartitions' -Thu 14:57: INFO : Interface 'default' depends on parameter 'nrows' -Thu 14:57: INFO : Interface 'default' depends on parameter 'paddingCycles' -Thu 14:57: INFO : Interface 'default' depends on parameter 'totalCycles' -Thu 14:57: INFO : Interface 'default' depends on parameter 'vectorLoadCycles' -Thu 14:57: INFO : Interface 'default' depends on parameter 'vectorSize' -Thu 14:57: INFO : Generating XML description for Maxfile -Thu 14:57: INFO : Generating XML description for mode 'write' -Thu 14:57: INFO : Creating CModeDramLinear instance for "cpu2lmem". -Thu 14:57: INFO : Creating CModeDramLinear instance for "indptr". -Thu 14:57: INFO : Creating CModeDramLinear instance for "values". -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvReductionKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvPaddingKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvCacheKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvKernel.current_run_cycle_count' -Thu 14:57: INFO : Interface 'write' depends on parameter 'size_bytes' -Thu 14:57: INFO : Interface 'write' depends on parameter 'start_bytes' -Thu 14:57: INFO : Generating XML description for mode 'default' -Thu 14:57: INFO : Creating CModeDramLinear instance for "cpu2lmem". -Thu 14:57: INFO : Creating CModeDramLinear instance for "indptr". -Thu 14:57: INFO : Creating CModeDramLinear instance for "values". -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvReductionKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvPaddingKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvCacheKernel.current_run_cycle_count' -Thu 14:57: INFO : Skipping blacklisted scalar parameter 'SpmvKernel.current_run_cycle_count' -Thu 14:57: INFO : Interface 'default' depends on parameter 'nPartitions' -Thu 14:57: INFO : Interface 'default' depends on parameter 'nrows' -Thu 14:57: INFO : Interface 'default' depends on parameter 'paddingCycles' -Thu 14:57: INFO : Interface 'default' depends on parameter 'totalCycles' -Thu 14:57: INFO : Interface 'default' depends on parameter 'vectorLoadCycles' -Thu 14:57: INFO : Interface 'default' depends on parameter 'vectorSize' -Thu 14:57: INFO : Adding SLIC sections to the maxfile -Thu 14:57: INFO : Adding user files to the maxfile -Thu 14:57: INFO : Generating SLIC include file -Thu 14:57: INFO : Done generating SLIC interface information -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:57: INFO : All asynchronous jobs are now completed. -Thu 14:57: INFO : Control Streams: Connecting block MappedElementsSwitchPCIeEA with select value: 1 -Thu 14:57: INFO : DDR3 Connectivity: -Thu 14:57: INFO : Memory Controller Pro sodimm1 connected to Controller resource sodimm_1_ddr3_core -Thu 14:57: INFO : Memory Controller Pro sodimm2 connected to Controller resource sodimm_2_ddr3_core -Thu 14:57: INFO : Memory Controller Pro sodimm3 connected to Controller resource sodimm_3_ddr3_core -Thu 14:57: INFO : Memory Controller Pro sodimm4 connected to Controller resource sodimm_4_ddr3_core -Thu 14:57: INFO : Memory Controller Pro sodimm5 connected to Controller resource sodimm_5_ddr3_core -Thu 14:57: INFO : Memory Controller Pro sodimm6 connected to Controller resource sodimm_6_ddr3_core -Thu 14:57: INFO : Running ' lmutil lmdiag -n quartus' -Thu 14:57: INFO : Successfully checked out license for Quartus (quartus) -Thu 14:57: INFO : Updating the preliminary MaxCompilerDesignData.dat. (@ Main build) -Thu 14:57: INFO : Deleting /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxCompilerDesignData.dat -Thu 14:57: PROGRESS: Generating input files (VHDL, netlists, MegaWizard/CoreGen) -Thu 14:57: INFO : Not deleting directory (does not exist): tmp -Thu 14:57: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altclkctrl -f:MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1.txt MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1.vhd > qmegawiz.log -Thu 14:57: INFO : Not deleting directory (does not exist): tmp -Thu 14:57: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altclkctrl -f:MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena.txt MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena.vhd > qmegawiz.log -Thu 14:58: INFO : Mapped register report: -Thu 14:58: INFO : 0 SFA_FORWARD_EN 4bytes -Thu 14:58: INFO : 4 nrows 4bytes -Thu 14:58: INFO : 8 nPartitions 4bytes -Thu 14:58: INFO : c nrows 4bytes -Thu 14:58: INFO : 10 vectorLoadCycles 4bytes -Thu 14:58: INFO : 14 dbg_stall_vector 1bytes -Thu 14:58: INFO : 15 io_loadEnabled_out_force_disabled 1bytes -Thu 14:58: INFO : 16 io_loadEnabled_in_force_disabled 1bytes -Thu 14:58: INFO : 17 io_matrixValues_force_disabled 1bytes -Thu 14:58: INFO : 18 io_readmask_force_disabled 1bytes -Thu 14:58: INFO : 19 io_readenable_force_disabled 1bytes -Thu 14:58: INFO : 1a io_values_force_disabled 1bytes -Thu 14:58: INFO : 1b io_vectorValues_force_disabled 1bytes -Thu 14:58: INFO : 1c vectorLoadCycles 4bytes -Thu 14:58: INFO : 20 io_vromLoad_force_disabled 1bytes -Thu 14:58: INFO : 21 io_indptr_force_disabled 1bytes -Thu 14:58: INFO : 22 run_cycle_count 6bytes -Thu 14:58: INFO : 28 current_run_cycle_count 6bytes -Thu 14:58: INFO : 2e dbg_ctld_empty 1bytes -Thu 14:58: INFO : 2f dbg_ctld_almost_empty 1bytes -Thu 14:58: INFO : 30 dbg_ctld_done 1bytes -Thu 14:58: INFO : 31 dbg_ctld_read 1bytes -Thu 14:58: INFO : 32 dbg_ctld_request 1bytes -Thu 14:58: INFO : 33 dbg_flush_start 1bytes -Thu 14:58: INFO : 34 dbg_full_level 1bytes -Thu 14:58: INFO : 35 dbg_flush_start_level 1bytes -Thu 14:58: INFO : 36 dbg_done_out 1bytes -Thu 14:58: INFO : 37 dbg_flushing 1bytes -Thu 14:58: INFO : 38 dbg_fill_level 1bytes -Thu 14:58: INFO : 39 dbg_flush_level 1bytes -Thu 14:58: INFO : 3a dbg_ctld_read_pipe_dbg 3bytes -Thu 14:58: INFO : 3d dbg_out_valid 1bytes -Thu 14:58: INFO : 3e dbg_out_stall 1bytes -Thu 14:58: INFO : 3f dbg_stall_vector 1bytes -Thu 14:58: INFO : 40 io_loadEnabled_force_disabled 1bytes -Thu 14:58: INFO : 41 io_rowFinished_force_disabled 1bytes -Thu 14:58: INFO : 42 io_output_force_disabled 1bytes -Thu 14:58: INFO : 43 io_cycleCounter_force_disabled 1bytes -Thu 14:58: INFO : 44 io_firstReadPosition_force_disabled 1bytes -Thu 14:58: INFO : 45 io_rowLength_force_disabled 1bytes -Thu 14:58: INFO : 46 io_matrixValues_force_disabled 1bytes -Thu 14:58: INFO : 47 io_vectorValues_force_disabled 1bytes -Thu 14:58: INFO : 48 run_cycle_count 6bytes -Thu 14:58: INFO : 4e current_run_cycle_count 6bytes -Thu 14:58: INFO : 54 dbg_ctld_empty 1bytes -Thu 14:58: INFO : 55 dbg_ctld_almost_empty 1bytes -Thu 14:58: INFO : 56 dbg_ctld_done 1bytes -Thu 14:58: INFO : 57 dbg_ctld_read 1bytes -Thu 14:58: INFO : 58 dbg_ctld_request 1bytes -Thu 14:58: INFO : 59 dbg_flush_start 1bytes -Thu 14:58: INFO : 5a dbg_full_level 1bytes -Thu 14:58: INFO : 5b dbg_flush_start_level 1bytes -Thu 14:58: INFO : 5c dbg_done_out 1bytes -Thu 14:58: INFO : 5d dbg_flushing 1bytes -Thu 14:58: INFO : 5e dbg_fill_level 1bytes -Thu 14:58: INFO : 5f dbg_flush_level 1bytes -Thu 14:58: INFO : 60 dbg_ctld_read_pipe_dbg 3bytes -Thu 14:58: INFO : 63 dbg_out_valid 1bytes -Thu 14:58: INFO : 64 dbg_out_stall 1bytes -Thu 14:58: INFO : 65 Lin1dAddrGen_addrgen_cmd_cpu2lmem_Addr_En 1bytes -Thu 14:58: INFO : 66 Lin1dAddrGen_addrgen_cmd_cpu2lmem_CmdSize 1bytes -Thu 14:58: INFO : 67 Lin1dAddrGen_addrgen_cmd_cpu2lmem_BlockSize_X 5bytes -Thu 14:58: INFO : 6c Lin1dAddrGen_addrgen_cmd_cpu2lmem_Wrap_X 5bytes -Thu 14:58: INFO : 71 Lin1dAddrGen_addrgen_cmd_cpu2lmem_Start_X_Addr 4bytes -Thu 14:58: INFO : 75 Lin1dAddrGen_addrgen_cmd_cpu2lmem_Offset_0 4bytes -Thu 14:58: INFO : 79 Lin1dAddrGen_addrgen_cmd_indptr_Addr_En 1bytes -Thu 14:58: INFO : 7a Lin1dAddrGen_addrgen_cmd_indptr_CmdSize 1bytes -Thu 14:58: INFO : 7b Lin1dAddrGen_addrgen_cmd_indptr_BlockSize_X 5bytes -Thu 14:58: INFO : 80 Lin1dAddrGen_addrgen_cmd_indptr_Wrap_X 5bytes -Thu 14:58: INFO : 85 Lin1dAddrGen_addrgen_cmd_indptr_Start_X_Addr 4bytes -Thu 14:58: INFO : 89 Lin1dAddrGen_addrgen_cmd_indptr_Offset_0 4bytes -Thu 14:58: INFO : 8d Lin1dAddrGen_addrgen_cmd_values_Addr_En 1bytes -Thu 14:58: INFO : 8e Lin1dAddrGen_addrgen_cmd_values_CmdSize 1bytes -Thu 14:58: INFO : 8f Lin1dAddrGen_addrgen_cmd_values_BlockSize_X 5bytes -Thu 14:58: INFO : 94 Lin1dAddrGen_addrgen_cmd_values_Wrap_X 5bytes -Thu 14:58: INFO : 99 Lin1dAddrGen_addrgen_cmd_values_Start_X_Addr 4bytes -Thu 14:58: INFO : 9d Lin1dAddrGen_addrgen_cmd_values_Offset_0 4bytes -Thu 14:58: INFO : a1 dbg_stall_vector 1bytes -Thu 14:58: INFO : a2 totalCycles 4bytes -Thu 14:58: INFO : a6 nRows 4bytes -Thu 14:58: INFO : aa io_reductionOut_force_disabled 1bytes -Thu 14:58: INFO : ab io_reductionIn_force_disabled 1bytes -Thu 14:58: INFO : ac run_cycle_count 6bytes -Thu 14:58: INFO : b2 current_run_cycle_count 6bytes -Thu 14:58: INFO : b8 dbg_ctld_empty 1bytes -Thu 14:58: INFO : b9 dbg_ctld_almost_empty 1bytes -Thu 14:58: INFO : ba dbg_ctld_done 1bytes -Thu 14:58: INFO : bb dbg_ctld_read 1bytes -Thu 14:58: INFO : bc dbg_ctld_request 1bytes -Thu 14:58: INFO : bd dbg_flush_start 1bytes -Thu 14:58: INFO : be dbg_full_level 2bytes -Thu 14:58: INFO : c0 dbg_flush_start_level 2bytes -Thu 14:58: INFO : c2 dbg_done_out 1bytes -Thu 14:58: INFO : c3 dbg_flushing 1bytes -Thu 14:58: INFO : c4 dbg_fill_level 2bytes -Thu 14:58: INFO : c6 dbg_flush_level 2bytes -Thu 14:58: INFO : c8 dbg_ctld_read_pipe_dbg 1bytes -Thu 14:58: INFO : c9 dbg_out_valid 1bytes -Thu 14:58: INFO : ca dbg_out_stall 1bytes -Thu 14:58: INFO : cb dbg_stall_vector 1bytes -Thu 14:58: INFO : cc io_paddingOut_force_disabled 1bytes -Thu 14:58: INFO : cd nInputs 4bytes -Thu 14:58: INFO : d1 io_paddingIn_force_disabled 1bytes -Thu 14:58: INFO : d2 run_cycle_count 6bytes -Thu 14:58: INFO : d8 current_run_cycle_count 6bytes -Thu 14:58: INFO : de dbg_ctld_empty 1bytes -Thu 14:58: INFO : df dbg_ctld_almost_empty 1bytes -Thu 14:58: INFO : e0 dbg_ctld_done 1bytes -Thu 14:58: INFO : e1 dbg_ctld_read 1bytes -Thu 14:58: INFO : e2 dbg_ctld_request 1bytes -Thu 14:58: INFO : e3 dbg_flush_start 1bytes -Thu 14:58: INFO : e4 dbg_full_level 1bytes -Thu 14:58: INFO : e5 dbg_flush_start_level 1bytes -Thu 14:58: INFO : e6 dbg_done_out 1bytes -Thu 14:58: INFO : e7 dbg_flushing 1bytes -Thu 14:58: INFO : e8 dbg_fill_level 1bytes -Thu 14:58: INFO : e9 dbg_flush_level 1bytes -Thu 14:58: INFO : ea dbg_ctld_read_pipe_dbg 1bytes -Thu 14:58: INFO : eb dbg_out_valid 1bytes -Thu 14:58: INFO : ec dbg_out_stall 1bytes -Thu 14:58: INFO : ed dynpcie_sth0_sth_compl_fifo_flags 1bytes -Thu 14:58: INFO : ee MemoryControllerPro_reg_no_rdstreams 1bytes -Thu 14:58: INFO : ef MemoryControllerPro_reg_no_wrstreams 1bytes -Thu 14:58: INFO : f0 MemoryControllerPro_phy_init_done 1bytes -Thu 14:58: INFO : f1 MemoryControllerPro_MemCtrl_Idle 1bytes -Thu 14:58: INFO : f2 MemoryControllerPro_MemCmd_QEmpty 1bytes -Thu 14:58: INFO : f3 MemoryControllerPro_MemCmd_QFull 1bytes -Thu 14:58: INFO : f4 MemoryControllerPro_Time 4bytes -Thu 14:58: INFO : f8 MemoryControllerPro_IdleTime 4bytes -Thu 14:58: INFO : fc MemoryControllerPro_INT_Sent 1bytes -Thu 14:58: INFO : fd MemoryControllerPro_TAG_Seen 1bytes -Thu 14:58: INFO : fe MemoryControllerPro_CMD_Counter0 4bytes -Thu 14:58: INFO : 102 MemoryControllerPro_Data_Counter0 4bytes -Thu 14:58: INFO : 106 MemoryControllerPro_CMD_Counter1 4bytes -Thu 14:58: INFO : 10a MemoryControllerPro_Data_Counter1 4bytes -Thu 14:58: INFO : 10e MemoryControllerPro_CMD_Counter2 4bytes -Thu 14:58: INFO : 112 MemoryControllerPro_Data_Counter2 4bytes -Thu 14:58: INFO : 116 MemoryControllerPro_Corrected_Errors 4bytes -Thu 14:58: INFO : 11a MemoryControllerPro_UnCorrected_Errors 4bytes -Thu 14:58: INFO : 11e MemoryControllerPro_Disable_DaemonCount 1bytes -Thu 14:58: INFO : 11f MemoryControllerPro_Int_Enable_AND 1bytes -Thu 14:58: INFO : 120 MemoryControllerPro_Int_Disable_OR 1bytes -Thu 14:58: INFO : 121 MemoryControllerPro_Debug_Reset 1bytes -Thu 14:58: INFO : 122 MemoryControllerPro_Arb_Control 1bytes -Thu 14:58: INFO : 123 clock_counters_base_clock_cclk 2bytes -Thu 14:58: INFO : 125 clock_counters_STREAM 2bytes -Thu 14:58: INFO : 127 clock_counters_mem_clk0 2bytes -Thu 14:58: INFO : 129 clock_counters_clk_pcie 2bytes -Thu 14:58: INFO : 12b seen_reset_reset_n 1bytes -Thu 14:58: INFO : 12c seen_reset_mem_rst0 1bytes -Thu 14:58: INFO : 12d seen_reset_STREAM_rst 1bytes -Thu 14:58: INFO : 12e seen_reset_STREAM_rst_delay 1bytes -Thu 14:58: INFO : 12f seen_reset_PCIE_rst 1bytes -Thu 14:58: INFO : 130 seen_reset_PCIE_rst_delay 1bytes -Thu 14:58: INFO : 131 seen_toggle_crash_input 1bytes -Thu 14:58: INFO : Mapped register chain length = 306 -Thu 14:58: INFO : Mapped memory report: -Thu 14:58: INFO : Memory 'MappedClockControl.STREAM_CLKPRIM' @ 4063232 -Thu 14:58: INFO : Memory 'MappedDRP.CHECKSUM' @ 3932160 -Thu 14:58: INFO : Memory 'Monitoring.PERFMONITOR' @ 3866624 -Thu 14:58: INFO : Not deleting directory (does not exist): tmp -Thu 14:58: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altfp_add_sub -f:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce.txt MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce.vhd > qmegawiz.log -Thu 14:58: INFO : Not deleting directory (does not exist): tmp -Thu 14:58: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altfp_add_sub -f:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce.txt MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce.vhd > qmegawiz.log -Thu 14:58: INFO : Not deleting directory (does not exist): tmp -Thu 14:58: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; qmegawiz --64bit -silent module=altfp_mult -f:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce.txt MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce.vhd > qmegawiz.log -Thu 14:58: INFO : ERROR: ld.so: object '/vol/cc/opt/maxeler/maxcompiler-2013.2.2/lib/maxeleros-sim/lib/libmaxeleros.so' from LD_PRELOAD cannot be preloaded: ignored. -Thu 14:58: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:58: INFO : All asynchronous jobs are now completed. -Thu 14:59: INFO : Waiting for any external asynchronous jobs to complete (e.g. MegaWizard/CoreGen)... -Thu 14:59: INFO : All asynchronous jobs are now completed. -Thu 14:59: PROGRESS: Running back-end build (10 phases) -Thu 14:59: PROGRESS: (1/10) - Prepare MaxFile Data (GenerateMaxFileDataFile) -Thu 14:59: INFO : Build pass 'GenerateMaxFileDataFile' took 186.442 ms. -Thu 14:59: PROGRESS: (2/10) - Prepare for Placement (QuartusMap) -Thu 14:59: INFO : Starting quartus_map. (14:59:01 10/09/15) -Thu 14:59: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; quartus_map MAX4MAIAPeripheryTop --64bit --parallel=1 -Thu 14:59: INFO : Info: ******************************************************************* -Thu 14:59: INFO : Info: Running Quartus II 64-Bit Analysis & Synthesis -Thu 14:59: INFO : Info: Version 13.0.0 Build 156 04/24/2013 SJ Full Version -Thu 14:59: INFO : Info: Copyright (C) 1991-2013 Altera Corporation. All rights reserved. -Thu 14:59: INFO : Info: Your use of Altera Corporation's design tools, logic functions -Thu 14:59: INFO : Info: and other software and tools, and its AMPP partner logic -Thu 14:59: INFO : Info: functions, and any output files from any of the foregoing -Thu 14:59: INFO : Info: (including device programming or simulation files), and any -Thu 14:59: INFO : Info: associated documentation or information are expressly subject -Thu 14:59: INFO : Info: to the terms and conditions of the Altera Program License -Thu 14:59: INFO : Info: Subscription Agreement, Altera MegaCore Function License -Thu 14:59: INFO : Info: Agreement, or other applicable license agreement, including, -Thu 14:59: INFO : Info: without limitation, that your use is for the sole purpose of -Thu 14:59: INFO : Info: programming logic devices manufactured by Altera and sold by -Thu 14:59: INFO : Info: Altera or its authorized distributors. Please refer to the -Thu 14:59: INFO : Info: applicable agreement for further details. -Thu 14:59: INFO : Info: Processing started: Thu Sep 10 14:59:04 2015 -Thu 14:59: INFO : Info: Command: quartus_map MAX4MAIAPeripheryTop --parallel=1 -Thu 14:59: INFO : Info (12021): Found 6 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/altera_primitives.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: dff_ce_asyncsr-altera -Thu 14:59: INFO : Info (12022): Found design unit 2: dff_ce_syncsr-altera -Thu 14:59: INFO : Info (12022): Found design unit 3: dff_ce_syncsr_ne-altera -Thu 14:59: INFO : Info (12023): Found entity 1: dff_ce_asyncsr -Thu 14:59: INFO : Info (12023): Found entity 2: dff_ce_syncsr -Thu 14:59: INFO : Info (12023): Found entity 3: dff_ce_syncsr_ne -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/rg_buffer_sfh.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: rg_buffer_sfh-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: rg_buffer_sfh -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/rg_buffer_info.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: rg_buffer_info-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: rg_buffer_info -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/posted_credits_fifo.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: posted_credits_fifo-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: posted_credits_fifo -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_3_16_3_aclr_fwft.vhdl(101) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_3_16_3_aclr_fwft.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_3_16_3_aclr_fwft-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_3_16_3_aclr_fwft -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/rg_buffer_sth.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: rg_buffer_sth-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: rg_buffer_sth -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/rg_buffer_info_sth.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: rg_buffer_info_sth-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: rg_buffer_info_sth -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/sth_compl_fifo_debug.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: sth_compl_fifo_debug-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: sth_compl_fifo_debug -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of.vhdl(106) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../compl_fifo.vhdl(104) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/compl_fifo.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: compl_fifo-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: compl_fifo -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../pcie_tx_fifo.vhdl(104) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_tx_fifo.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_tx_fifo-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: pcie_tx_fifo -Thu 14:59: INFO : Info (12021): Found 2 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/cross_clock_pkg.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: cross_clock_pkg -Thu 14:59: INFO : Info (12022): Found design unit 2: cross_clock_pkg-body -Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/strobe_to_strobe.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: strobe_to_strobe_prim-altera -Thu 14:59: INFO : Info (12022): Found design unit 2: strobe_to_strobe-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: strobe_to_strobe_prim -Thu 14:59: INFO : Info (12023): Found entity 2: strobe_to_strobe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max4_cpld_flash_if/max4_cpld_flash_if.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: max4_cpld_flash_if-struct -Thu 14:59: INFO : Info (12023): Found entity 1: max4_cpld_flash_if -Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/basic_synchroniser/basic_synchroniser.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: basic_synchroniser_prim-altera -Thu 14:59: INFO : Info (12022): Found design unit 2: basic_synchroniser-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: basic_synchroniser_prim -Thu 14:59: INFO : Info (12023): Found entity 2: basic_synchroniser -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_events/max_events.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: max_events-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: max_events -Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/level_synchroniser/level_synchroniser.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: level_synchroniser_prim-altera -Thu 14:59: INFO : Info (12022): Found design unit 2: level_synchroniser-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: level_synchroniser_prim -Thu 14:59: INFO : Info (12023): Found entity 2: level_synchroniser -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max4_cpld_ioexpand/max4_cpld_ioexpand.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: max4_cpld_ioexpand-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: max4_cpld_ioexpand -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_xcvr_reconfig_SV.quartus.v -Thu 14:59: INFO : Info (12023): Found entity 1: pcie_xcvr_reconfig_SV -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV.v -Thu 14:59: INFO : Info (12023): Found entity 1: pcie_reconfig_SV -Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_xcvr_functions.sv -Thu 14:59: INFO : Info (12022): Found design unit 1: altera_xcvr_functions (SystemVerilog) (pcie_reconfig_SV) -Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_h.sv -Thu 14:59: INFO : Info (12022): Found design unit 1: sv_xcvr_h (SystemVerilog) (pcie_reconfig_SV) -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_resync.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_resync -Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_h.sv -Thu 14:59: INFO : Info (12022): Found design unit 1: alt_xcvr_reconfig_h (SystemVerilog) (pcie_reconfig_SV) -Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_dfe_cal_sweep_h.sv -Thu 14:59: INFO : Info (12022): Found design unit 1: sv_xcvr_dfe_cal_sweep_h (SystemVerilog) (pcie_reconfig_SV) -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cal_seq.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cal_seq -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_cif.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_cif -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_uif.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_uif -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_basic_acq.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_basic_acq -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_analog.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_analog -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_analog_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_analog_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_analog_datactrl.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_analog_datactrl -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_analog_rmw.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_analog_rmw -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xreconf_analog_ctrlsm.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xreconf_analog_ctrlsm -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_offset_cancellation.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_offset_cancellation -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_offset_cancellation_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_offset_cancellation_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_eyemon.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_eyemon -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_eyemon_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_eyemon_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_eyemon_ctrl_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_eyemon_ctrl_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_eyemon_ber_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_eyemon_ber_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/ber_reader_dcfifo.v -Thu 14:59: INFO : Info (12023): Found entity 1: ber_reader_dcfifo -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/step_to_mon_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: step_to_mon_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/mon_to_step_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: mon_to_step_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_reg_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_reg_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_cal_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_cal_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_cal_sweep_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_cal_sweep_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_cal_sweep_datapath_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_cal_sweep_datapath_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_oc_cal_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_oc_cal_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_pi_phase_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_pi_phase_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_step_to_mon_en_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_step_to_mon_en_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_adapt_tap_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_adapt_tap_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_ctrl_mux_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_ctrl_mux_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_local_reset_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_local_reset_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_cal_sim_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_cal_sim_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dfe_adapt_tap_sim_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dfe_adapt_tap_sim_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_adce.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_adce -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_adce_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_adce_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_adce_datactrl_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_adce_datactrl_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_sv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_cal.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_cal -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_control.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_control -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_datapath.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_pll_reset.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_pll_reset -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_eye_width.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_eye_width -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_align_clk.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_align_clk -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_get_sum.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_dcd_get_sum -Thu 14:59: INFO : Info (12021): Found 0 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_dcd_cal_sim_model.sv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_mif.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_mif -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_mif.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_mif -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_mif_ctrl.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_mif_ctrl -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_mif_avmm.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_mif_avmm -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_pll.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_pll -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_pll.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_pll -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_pll_ctrl.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_pll_ctrl -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_soc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_soc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_ram.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_ram -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_direct.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_direct -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_l2p_addr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_l2p_addr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_l2p_ch.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_l2p_ch -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_l2p_rom.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_l2p_rom -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_lif_csr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_lif_csr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xrbasic_lif.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xrbasic_lif -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_xcvr_reconfig_basic.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_reconfig_basic -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_arbiter_acq.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_arbiter_acq -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_basic.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_basic -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_arbiter.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_arbiter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_m2s.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_m2s -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_wait_generate.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_wait_generate -Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_csr_selector.sv -Thu 14:59: INFO : Info (12023): Found entity 1: csr_mux -Thu 14:59: INFO : Info (12023): Found entity 2: csr_indexed_write_mux -Thu 14:59: INFO : Info (12023): Found entity 3: csr_indexed_read_only_reg -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/sv_reconfig_bundle_to_basic.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_reconfig_bundle_to_basic -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu -Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_reconfig_cpu.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module -Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module -Thu 14:59: INFO : Info (12023): Found entity 3: alt_xcvr_reconfig_cpu_reconfig_cpu -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_master_translator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_translator -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_slave_translator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_translator -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_master_agent.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_agent -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_slave_agent.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_agent -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_burst_uncompressor.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_burst_uncompressor -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_avalon_sc_fifo.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_avalon_sc_fifo -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_addr_router.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_addr_router_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_addr_router -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_addr_router_001.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_addr_router_001_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_addr_router_001 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_id_router.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_id_router_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_id_router -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_id_router_001.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_id_router_001_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: alt_xcvr_reconfig_cpu_id_router_001 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_reset_controller.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_controller -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_reset_synchronizer.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_synchronizer -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_cmd_xbar_demux.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_cmd_xbar_demux -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_cmd_xbar_demux_001.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_cmd_xbar_demux_001 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/altera_merlin_arbitrator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_arbitrator -Thu 14:59: INFO : Info (12023): Found entity 2: altera_merlin_arb_adder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_cmd_xbar_mux.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_cmd_xbar_mux -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_rsp_xbar_mux.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_rsp_xbar_mux -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_xcvr_reconfig_SV/pcie_reconfig_SV/alt_xcvr_reconfig_cpu_irq_mapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_reconfig_cpu_irq_mapper -Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1/MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh-RTL -Thu 14:59: INFO : Info (12022): Found design unit 2: mwaltclkctrl_quartusv13_0_0_gclk_numclk_1-RTL -Thu 14:59: INFO : Info (12023): Found entity 1: MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh -Thu 14:59: INFO : Info (12023): Found entity 2: MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_SV_hard_ip-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: pcie_SV_hard_ip -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altpcie_sv_hip_ast_hwtcl.v -Thu 14:59: INFO : Info (12023): Found entity 1: altpcie_sv_hip_ast_hwtcl -Thu 14:59: INFO : Info (12021): Found 7 design units, including 7 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altpcie_hip_256_pipen1b.v -Thu 14:59: INFO : Info (12023): Found entity 1: altpcie_hip_256_pipen1b -Thu 14:59: INFO : Info (12023): Found entity 2: altpcie_hip_bitsync2 -Thu 14:59: INFO : Info (12023): Found entity 3: altpcie_hip_bitsync -Thu 14:59: INFO : Info (12023): Found entity 4: altpcie_hip_vecsync2 -Thu 14:59: INFO : Info (12023): Found entity 5: altpcie_hip_vecsync -Thu 14:59: INFO : Info (12023): Found entity 6: hd_altpe3_hip_eq_bypass_ph3 -Thu 14:59: INFO : Info (12023): Found entity 7: hip_eq_dprio -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altpcie_rs_serdes.v -Thu 14:59: INFO : Info (12023): Found entity 1: altpcie_rs_serdes -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altpcie_rs_hip.v -Thu 14:59: INFO : Info (12023): Found entity 1: altpcie_rs_hip -Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/altera_xcvr_functions.sv -Thu 14:59: INFO : Info (12022): Found design unit 1: altera_xcvr_functions (SystemVerilog) (pcie_SV_hard_ip) -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_pcs.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_pcs -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_pcs_ch.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_pcs_ch -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_pma.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_pma -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_reconfig_bundle_to_xcvr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_reconfig_bundle_to_xcvr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_reconfig_bundle_to_ip.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_reconfig_bundle_to_ip -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_reconfig_bundle_merger.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_reconfig_bundle_merger -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_rx_pma.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_rx_pma -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_tx_pma.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_tx_pma -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_tx_pma_ch.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_tx_pma_ch -Thu 14:59: INFO : Info (12021): Found 1 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_h.sv -Thu 14:59: INFO : Info (12022): Found design unit 1: sv_xcvr_h (SystemVerilog) (pcie_SV_hard_ip) -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_avmm_csr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_avmm_csr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_avmm_dcd.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_avmm_dcd -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_avmm.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_avmm -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_data_adapter.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_data_adapter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_native.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_native -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_plls.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_plls -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/alt_xcvr_resync.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_xcvr_resync -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_10g_rx_pcs_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_10g_rx_pcs_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_10g_tx_pcs_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_10g_tx_pcs_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_8g_rx_pcs_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_8g_rx_pcs_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_8g_tx_pcs_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_8g_tx_pcs_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_8g_pcs_aggregate_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_8g_pcs_aggregate_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_common_pcs_pma_interface_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_common_pcs_pma_interface_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_common_pld_pcs_interface_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_common_pld_pcs_interface_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_pipe_gen1_2_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_pipe_gen1_2_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_pipe_gen3_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_pipe_gen3_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_rx_pcs_pma_interface_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_rx_pcs_pma_interface_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_rx_pld_pcs_interface_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_rx_pld_pcs_interface_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_tx_pcs_pma_interface_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_tx_pcs_pma_interface_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_hssi_tx_pld_pcs_interface_rbc.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_hssi_tx_pld_pcs_interface_rbc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_emsip_adapter.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_emsip_adapter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_SV_hard_ip/pcie_SV_hard_ip/sv_xcvr_pipe_native.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sv_xcvr_pipe_native -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q_wrap.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: ddr3_72_800_sl_u_q_wrap-RTL -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_wrap -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_0002.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_0002 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_c0.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_c0 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_mm_st_converter.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_mm_st_converter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_addr_cmd.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_addr_cmd -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_addr_cmd_wrap.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_addr_cmd_wrap -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ddr2_odt_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ddr2_odt_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ddr3_odt_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ddr3_odt_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_lpddr2_addr_cmd.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_lpddr2_addr_cmd -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_odt_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_odt_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_rdwr_data_tmg.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rdwr_data_tmg -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_arbiter.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_arbiter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_burst_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_burst_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_cmd_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_cmd_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_csr.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_csr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_buffer.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_buffer -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_buffer_manager.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_buffer_manager -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_burst_tracking.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_burst_tracking -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_dataid_manager.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_dataid_manager -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_fifo.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_fifo -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_list.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_list -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_rdata_path.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rdata_path -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_wdata_path.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_wdata_path -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_decoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder -Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_decoder_32_syn.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder_32_decode -Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_decoder_32_altecc_decoder -Thu 14:59: INFO : Info (12023): Found entity 3: alt_mem_ddrx_ecc_decoder_32 -Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_decoder_64_syn.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder_64_decode -Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_decoder_64_altecc_decoder -Thu 14:59: INFO : Info (12023): Found entity 3: alt_mem_ddrx_ecc_decoder_64 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_encoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_encoder_32_syn.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_32_altecc_encoder -Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_encoder_32 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_encoder_64_syn.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_64_altecc_encoder -Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_encoder_64 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_ecc_encoder_decoder_wrapper.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_decoder_wrapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_axi_st_converter.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_axi_st_converter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_input_if.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_input_if -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_rank_timer.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rank_timer -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_sideband.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_sideband -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_tbp.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_tbp -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_timing_param.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_timing_param -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_controller.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_controller -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_ddrx_controller_st_top.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_controller_st_top -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/alt_mem_if_nextgen_ddr3_controller_core.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_if_nextgen_ddr3_controller_core -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_slave_agent.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_agent -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_slave_translator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_translator -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_jumplogic.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_jumplogic -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_data_broadcast.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_data_broadcast -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_avalon_sc_fifo.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_avalon_sc_fifo -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_siii_wrapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_siii_wrapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_phy_mgr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_phy_mgr -Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module -Thu 14:59: INFO : Info (12023): Found entity 2: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module -Thu 14:59: INFO : Info (12023): Found entity 3: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_inst_ROM_no_ifdef_params.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_inst_ROM_no_ifdef_params -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_sv_phase_decode.v -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_sv_phase_decode -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_lfsr72.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr72 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_master_agent.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_agent -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_lfsr36.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr36 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_rsp_xbar_mux.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_rsp_xbar_mux -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_reset_synchronizer.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_synchronizer -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_id_router.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_id_router_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_sl_u_q_s0_id_router -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_cmd_xbar_demux_001.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_cmd_xbar_demux_001 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_addr_router_001.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_addr_router_001_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_sl_u_q_s0_addr_router_001 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_data_decoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_data_decoder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ddr3.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ddr3 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_mgr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_mgr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ac_ROM_no_ifdef_params.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ac_ROM_no_ifdef_params -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_data_mgr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_data_mgr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_rsp_xbar_demux_003.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_rsp_xbar_demux_003 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_siii_phase_decode.v -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_siii_phase_decode -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_id_router_003.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_id_router_003_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_sl_u_q_s0_id_router_003 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ram.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ram -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ram_csr.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ram_csr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_pattern_fifo.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_pattern_fifo -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_ac_ROM_reg.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ac_ROM_reg -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_reg_file.v -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_reg_file -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_reset_controller.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_controller -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_core.sv -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_core -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_irq_mapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_irq_mapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_reg_file.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_reg_file -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_acv_wrapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_acv_wrapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_acv_phase_decode.v -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_acv_phase_decode -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_lfsr12.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr12 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_dm_decoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_dm_decoder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_inst_ROM_reg.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_inst_ROM_reg -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_master_translator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_translator -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_cmd_xbar_demux.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_cmd_xbar_demux -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_arbitrator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_arbitrator -Thu 14:59: INFO : Info (12023): Found entity 2: altera_merlin_arb_adder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_mem_if_sequencer_mem_no_ifdef_params.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_mem_no_ifdef_params -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_datamux.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_datamux -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_generic.sv -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_generic -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_s0_addr_router.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_s0_addr_router_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_sl_u_q_s0_addr_router -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_write_decoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_write_decoder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_merlin_burst_uncompressor.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_burst_uncompressor -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_read_datapath.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_read_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/sequencer_scc_sv_wrapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_sv_wrapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_bitcheck.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_bitcheck -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_di_buffer.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_di_buffer -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/rw_manager_di_buffer_wrap.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_di_buffer_wrap -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/afi_mux_ddr3_ddrx_use_shadow_regs.v -Thu 14:59: INFO : Info (12023): Found entity 1: afi_mux_ddr3_ddrx_use_shadow_regs -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_clock_pair_generator.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_clock_pair_generator -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_read_valid_selector.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_read_valid_selector -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_addr_cmd_datapath.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_addr_cmd_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_reset.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_reset -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_acv_ldc.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_acv_ldc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_memphy.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_memphy -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_reset_sync.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_reset_sync -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_new_io_pads.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_new_io_pads -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_fr_cycle_shifter.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_fr_cycle_shifter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_fr_cycle_extender.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_fr_cycle_extender -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_read_datapath.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_read_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_write_datapath.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_write_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_core_shadow_registers.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_core_shadow_registers -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_simple_ddio_out.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_simple_ddio_out -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_phy_csr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_phy_csr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_iss_probe.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_iss_probe -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_read_fifo_hard.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_read_fifo_hard -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/ddr3_72_800_sl_u_q_p0_altdqdqs.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_sl_u_q_p0_altdqdqs -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_sl_u_q_wrap/ddr3_72_800_sl_u_q/altdq_dqs2_stratixv_use_shadow_regs.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altdq_dqs2_stratixv_use_shadow_regs -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q_wrap.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: ddr3_72_800_m_u_q_wrap-RTL -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_wrap -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_0002.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_0002 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_dll_stratixv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_dll_stratixv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_oct_stratixv.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_oct_stratixv -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_c0.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_c0 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_mm_st_converter.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_mm_st_converter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_addr_cmd.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_addr_cmd -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_addr_cmd_wrap.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_addr_cmd_wrap -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ddr2_odt_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ddr2_odt_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ddr3_odt_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ddr3_odt_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_lpddr2_addr_cmd.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_lpddr2_addr_cmd -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_odt_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_odt_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_rdwr_data_tmg.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rdwr_data_tmg -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_arbiter.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_arbiter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_burst_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_burst_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_cmd_gen.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_cmd_gen -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_csr.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_csr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_buffer.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_buffer -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_buffer_manager.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_buffer_manager -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_burst_tracking.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_burst_tracking -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_dataid_manager.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_dataid_manager -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_fifo.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_fifo -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_list.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_list -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_rdata_path.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rdata_path -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_wdata_path.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_wdata_path -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_decoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder -Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_decoder_32_syn.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder_32_decode -Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_decoder_32_altecc_decoder -Thu 14:59: INFO : Info (12023): Found entity 3: alt_mem_ddrx_ecc_decoder_32 -Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_decoder_64_syn.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_decoder_64_decode -Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_decoder_64_altecc_decoder -Thu 14:59: INFO : Info (12023): Found entity 3: alt_mem_ddrx_ecc_decoder_64 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_encoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_encoder_32_syn.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_32_altecc_encoder -Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_encoder_32 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_encoder_64_syn.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_64_altecc_encoder -Thu 14:59: INFO : Info (12023): Found entity 2: alt_mem_ddrx_ecc_encoder_64 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_ecc_encoder_decoder_wrapper.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_ecc_encoder_decoder_wrapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_axi_st_converter.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_axi_st_converter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_input_if.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_input_if -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_rank_timer.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_rank_timer -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_sideband.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_sideband -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_tbp.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_tbp -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_timing_param.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_timing_param -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_controller.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_controller -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_ddrx_controller_st_top.v -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_ddrx_controller_st_top -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/alt_mem_if_nextgen_ddr3_controller_core.sv -Thu 14:59: INFO : Info (12023): Found entity 1: alt_mem_if_nextgen_ddr3_controller_core -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_slave_agent.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_agent -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_slave_translator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_slave_translator -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_jumplogic.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_jumplogic -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_data_broadcast.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_data_broadcast -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_avalon_sc_fifo.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_avalon_sc_fifo -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_siii_wrapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_siii_wrapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_phy_mgr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_phy_mgr -Thu 14:59: INFO : Info (12021): Found 3 design units, including 3 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module -Thu 14:59: INFO : Info (12023): Found entity 2: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module -Thu 14:59: INFO : Info (12023): Found entity 3: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_rsp_xbar_mux.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_rsp_xbar_mux -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_inst_ROM_no_ifdef_params.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_inst_ROM_no_ifdef_params -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_sv_phase_decode.v -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_sv_phase_decode -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_rsp_xbar_demux_003.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_rsp_xbar_demux_003 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_lfsr72.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr72 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_addr_router_001.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_addr_router_001_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_m_u_q_s0_addr_router_001 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_master_agent.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_agent -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_lfsr36.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr36 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_reset_synchronizer.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_synchronizer -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_addr_router.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_addr_router_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_m_u_q_s0_addr_router -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_data_decoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_data_decoder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ddr3.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ddr3 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_mgr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_mgr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ac_ROM_no_ifdef_params.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ac_ROM_no_ifdef_params -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_data_mgr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_data_mgr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_siii_phase_decode.v -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_siii_phase_decode -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ram.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ram -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ram_csr.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ram_csr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_pattern_fifo.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_pattern_fifo -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_ac_ROM_reg.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_ac_ROM_reg -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_reg_file.v -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_reg_file -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_reset_controller.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_reset_controller -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_core.sv -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_core -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_reg_file.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_reg_file -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_acv_wrapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_acv_wrapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_irq_mapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_irq_mapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_acv_phase_decode.v -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_acv_phase_decode -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_id_router.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_id_router_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_m_u_q_s0_id_router -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_lfsr12.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_lfsr12 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_dm_decoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_dm_decoder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_inst_ROM_reg.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_inst_ROM_reg -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_master_translator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_master_translator -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_id_router_003.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_id_router_003_default_decode -Thu 14:59: INFO : Info (12023): Found entity 2: ddr3_72_800_m_u_q_s0_id_router_003 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_cmd_xbar_demux.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_cmd_xbar_demux -Thu 14:59: INFO : Info (12021): Found 2 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_arbitrator.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_arbitrator -Thu 14:59: INFO : Info (12023): Found entity 2: altera_merlin_arb_adder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_sequencer_mem_no_ifdef_params.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_mem_no_ifdef_params -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_datamux.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_datamux -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_generic.sv -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_generic -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_write_decoder.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_write_decoder -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_cmd_xbar_demux_001.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_cmd_xbar_demux_001 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_merlin_burst_uncompressor.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altera_merlin_burst_uncompressor -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_read_datapath.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_read_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/sequencer_scc_sv_wrapper.sv -Thu 14:59: INFO : Info (12023): Found entity 1: sequencer_scc_sv_wrapper -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_bitcheck.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_bitcheck -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_di_buffer.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_di_buffer -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/rw_manager_di_buffer_wrap.v -Thu 14:59: INFO : Info (12023): Found entity 1: rw_manager_di_buffer_wrap -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/afi_mux_ddr3_ddrx_use_shadow_regs.v -Thu 14:59: INFO : Info (12023): Found entity 1: afi_mux_ddr3_ddrx_use_shadow_regs -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_clock_pair_generator.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_clock_pair_generator -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_read_valid_selector.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_read_valid_selector -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_addr_cmd_datapath.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_addr_cmd_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_reset.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_reset -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_acv_ldc.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_acv_ldc -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_memphy.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_memphy -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_reset_sync.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_reset_sync -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_new_io_pads.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_new_io_pads -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_fr_cycle_shifter.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_fr_cycle_shifter -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_fr_cycle_extender.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_fr_cycle_extender -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_read_datapath.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_read_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_write_datapath.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_write_datapath -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_core_shadow_registers.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_core_shadow_registers -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_simple_ddio_out.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_simple_ddio_out -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_phy_csr.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_phy_csr -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_iss_probe.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_iss_probe -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_read_fifo_hard.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_read_fifo_hard -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0 -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_p0_altdqdqs.v -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_p0_altdqdqs -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/altdq_dqs2_stratixv_use_shadow_regs.sv -Thu 14:59: INFO : Info (12023): Found entity 1: altdq_dqs2_stratixv_use_shadow_regs -Thu 14:59: INFO : Info (12021): Found 1 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ddr3_72_800_m_u_q_wrap/ddr3_72_800_m_u_q/ddr3_72_800_m_u_q_pll0.sv -Thu 14:59: INFO : Info (12023): Found entity 1: ddr3_72_800_m_u_q_pll0 -Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena/MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg-RTL -Thu 14:59: INFO : Info (12022): Found design unit 2: mwaltclkctrl_quartusv13_0_0_auto_numclk_1_ena-RTL -Thu 14:59: INFO : Info (12023): Found entity 1: MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg -Thu 14:59: INFO : Info (12023): Found entity 2: MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena -Thu 14:59: INFO : Info (12021): Found 6 design units, including 6 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/altera_pll_reconfig_top/altera_pll_reconfig_top.quartus.v -Thu 14:59: INFO : Info (12023): Found entity 1: altera_pll_reconfig_top -Thu 14:59: INFO : Info (12023): Found entity 2: self_reset -Thu 14:59: INFO : Info (12023): Found entity 3: dprio_mux -Thu 14:59: INFO : Info (12023): Found entity 4: fpll_dprio_init -Thu 14:59: INFO : Info (12023): Found entity 5: dyn_phase_shift -Thu 14:59: INFO : Info (12023): Found entity 6: generic_lcell_comb -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/reset_control/reset_control.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: reset_control-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: reset_control -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_SV_pcie_rx/max_SV_pcie_rx.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: max_SV_pcie_rx-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: max_SV_pcie_rx -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_SV_pcie_tx/max_SV_pcie_tx.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: max_SV_pcie_tx-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: max_SV_pcie_tx -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_pcie_slave_req_dispatcher/max_pcie_slave_req_dispatcher.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: max_pcie_slave_req_dispatcher-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: max_pcie_slave_req_dispatcher -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/max_SV_pcie_slave/max_SV_pcie_slave.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: max_SV_pcie_slave-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: max_SV_pcie_slave -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/start_of_day_reset/start_of_day_reset.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: start_of_day_reset-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: start_of_day_reset -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/perf_monitor/perf_monitor.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: perf_monitor-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: perf_monitor -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DoneGen/DoneGen.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: DoneGen-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: DoneGen -Thu 14:59: INFO : Info (12021): Found 2 design units, including 0 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/MCP_ECC_Pkg.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: MCP_ECC -Thu 14:59: INFO : Info (12022): Found design unit 2: MCP_ECC-body -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/MemCtrlPro_Altera.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: MemCtrlPro_Altera-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: MemCtrlPro_Altera -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/Async_FIFO_Altera.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: Async_FIFO_Altera-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: Async_FIFO_Altera -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/Sync_FIFO_Altera.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: Sync_FIFO_Altera-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: Sync_FIFO_Altera -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemCtrlPro_Altera/DualPortRAM_SyncRd_Altera.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: DualPortRAM_SyncRd_Altera-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: DualPortRAM_SyncRd_Altera -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_register/mapped_register.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_register-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: mapped_register -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_register_readable/mapped_register_readable.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_register_readable-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: mapped_register_readable -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_posted_credits_writer/pcie_posted_credits_writer.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_posted_credits_writer-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: pcie_posted_credits_writer -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_slave_streaming_sfh_ring/pcie_slave_streaming_sfh_ring.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_slave_streaming_sfh_ring-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: pcie_slave_streaming_sfh_ring -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/pcie_slave_streaming_sth_ring/pcie_slave_streaming_sth_ring.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: pcie_slave_streaming_sth_ring-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: pcie_slave_streaming_sth_ring -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/fast_request_arbiter/fast_request_arbiter.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: fast_request_arbiter-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: fast_request_arbiter -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/priority_encoder/priority_encoder.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: priority_encoder-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: priority_encoder -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/write_request_encoder/write_request_encoder.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: write_request_encoder-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: write_request_encoder -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/dualaspectreg_int/dualaspectreg_int.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: dualaspectreg_int-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: dualaspectreg_int -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/dualaspectmuxpipe_mux2/dualaspectmuxpipe_mux2.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: dualaspectmuxpipe_mux2-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: dualaspectmuxpipe_mux2 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/dualaspectmuxpipe_counter/dualaspectmuxpipe_counter.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: dualaspectmuxpipe_counter-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: dualaspectmuxpipe_counter -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/dualaspectmuxpipe_mux4/dualaspectmuxpipe_mux4.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: dualaspectmuxpipe_mux4-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: dualaspectmuxpipe_mux4 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonDesignControl/PhotonDesignControl.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonDesignControl-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonDesignControl -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49/SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SimpleSR/SimpleSR.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SimpleSR-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SimpleSR -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33/SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49/SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 -Thu 14:59: INFO : Info (12021): Found 52 design units, including 26 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_qud-RTL -Thu 14:59: INFO : Info (12022): Found design unit 2: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_02g-RTL -Thu 14:59: INFO : Info (12022): Found design unit 3: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3e8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 4: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 5: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 6: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 7: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3v7-RTL -Thu 14:59: INFO : Info (12022): Found design unit 8: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7-RTL -Thu 14:59: INFO : Info (12022): Found design unit 9: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7-RTL -Thu 14:59: INFO : Info (12022): Found design unit 10: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08-RTL -Thu 14:59: INFO : Info (12022): Found design unit 11: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 12: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_te9-RTL -Thu 14:59: INFO : Info (12022): Found design unit 13: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 14: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_nh8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 15: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 16: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 17: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 18: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9-RTL -Thu 14:59: INFO : Info (12022): Found design unit 19: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_n28-RTL -Thu 14:59: INFO : Info (12022): Found design unit 20: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28-RTL -Thu 14:59: INFO : Info (12022): Found design unit 21: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28-RTL -Thu 14:59: INFO : Info (12022): Found design unit 22: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48-RTL -Thu 14:59: INFO : Info (12022): Found design unit 23: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39-RTL -Thu 14:59: INFO : Info (12022): Found design unit 24: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina-RTL -Thu 14:59: INFO : Info (12022): Found design unit 25: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj-RTL -Thu 14:59: INFO : Info (12022): Found design unit 26: mwfloatingpointunit_quartusv13_0_0_add_sub_11x53to11x53_lat14_add_ce-RTL -Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_qud -Thu 14:59: INFO : Info (12023): Found entity 2: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_02g -Thu 14:59: INFO : Info (12023): Found entity 3: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3e8 -Thu 14:59: INFO : Info (12023): Found entity 4: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8 -Thu 14:59: INFO : Info (12023): Found entity 5: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8 -Thu 14:59: INFO : Info (12023): Found entity 6: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8 -Thu 14:59: INFO : Info (12023): Found entity 7: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3v7 -Thu 14:59: INFO : Info (12023): Found entity 8: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7 -Thu 14:59: INFO : Info (12023): Found entity 9: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7 -Thu 14:59: INFO : Info (12023): Found entity 10: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08 -Thu 14:59: INFO : Info (12023): Found entity 11: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8 -Thu 14:59: INFO : Info (12023): Found entity 12: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_te9 -Thu 14:59: INFO : Info (12023): Found entity 13: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8 -Thu 14:59: INFO : Info (12023): Found entity 14: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_nh8 -Thu 14:59: INFO : Info (12023): Found entity 15: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8 -Thu 14:59: INFO : Info (12023): Found entity 16: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8 -Thu 14:59: INFO : Info (12023): Found entity 17: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8 -Thu 14:59: INFO : Info (12023): Found entity 18: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9 -Thu 14:59: INFO : Info (12023): Found entity 19: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_n28 -Thu 14:59: INFO : Info (12023): Found entity 20: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28 -Thu 14:59: INFO : Info (12023): Found entity 21: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28 -Thu 14:59: INFO : Info (12023): Found entity 22: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48 -Thu 14:59: INFO : Info (12023): Found entity 23: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39 -Thu 14:59: INFO : Info (12023): Found entity 24: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina -Thu 14:59: INFO : Info (12023): Found entity 25: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj -Thu 14:59: INFO : Info (12023): Found entity 26: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_dynamic_offset16/SpmvReductionKernel_dynamic_offset16.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel_dynamic_offset16-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel_dynamic_offset16 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33/SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Linear1DAddressGen/Linear1DAddressGen.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: Linear1DAddressGen-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: Linear1DAddressGen -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49/SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 -Thu 14:59: INFO : Info (12021): Found 52 design units, including 26 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_qud-RTL -Thu 14:59: INFO : Info (12022): Found design unit 2: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_ffb-RTL -Thu 14:59: INFO : Info (12022): Found design unit 3: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3e8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 4: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 5: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 6: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 7: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3v7-RTL -Thu 14:59: INFO : Info (12022): Found design unit 8: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7-RTL -Thu 14:59: INFO : Info (12022): Found design unit 9: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7-RTL -Thu 14:59: INFO : Info (12022): Found design unit 10: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08-RTL -Thu 14:59: INFO : Info (12022): Found design unit 11: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 12: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_te9-RTL -Thu 14:59: INFO : Info (12022): Found design unit 13: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 14: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_nh8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 15: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 16: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 17: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 18: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8-RTL -Thu 14:59: INFO : Info (12022): Found design unit 19: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_n28-RTL -Thu 14:59: INFO : Info (12022): Found design unit 20: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28-RTL -Thu 14:59: INFO : Info (12022): Found design unit 21: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28-RTL -Thu 14:59: INFO : Info (12022): Found design unit 22: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48-RTL -Thu 14:59: INFO : Info (12022): Found design unit 23: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48-RTL -Thu 14:59: INFO : Info (12022): Found design unit 24: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48-RTL -Thu 14:59: INFO : Info (12022): Found design unit 25: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj-RTL -Thu 14:59: INFO : Info (12022): Found design unit 26: mwfloatingpointunit_quartusv13_0_0_add_sub_11x53to11x53_lat10_add_ce-RTL -Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_qud -Thu 14:59: INFO : Info (12023): Found entity 2: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_ffb -Thu 14:59: INFO : Info (12023): Found entity 3: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3e8 -Thu 14:59: INFO : Info (12023): Found entity 4: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8 -Thu 14:59: INFO : Info (12023): Found entity 5: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8 -Thu 14:59: INFO : Info (12023): Found entity 6: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8 -Thu 14:59: INFO : Info (12023): Found entity 7: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3v7 -Thu 14:59: INFO : Info (12023): Found entity 8: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7 -Thu 14:59: INFO : Info (12023): Found entity 9: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7 -Thu 14:59: INFO : Info (12023): Found entity 10: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08 -Thu 14:59: INFO : Info (12023): Found entity 11: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8 -Thu 14:59: INFO : Info (12023): Found entity 12: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_te9 -Thu 14:59: INFO : Info (12023): Found entity 13: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8 -Thu 14:59: INFO : Info (12023): Found entity 14: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_nh8 -Thu 14:59: INFO : Info (12023): Found entity 15: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8 -Thu 14:59: INFO : Info (12023): Found entity 16: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8 -Thu 14:59: INFO : Info (12023): Found entity 17: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8 -Thu 14:59: INFO : Info (12023): Found entity 18: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8 -Thu 14:59: INFO : Info (12023): Found entity 19: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_n28 -Thu 14:59: INFO : Info (12023): Found entity 20: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28 -Thu 14:59: INFO : Info (12023): Found entity 21: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28 -Thu 14:59: INFO : Info (12023): Found entity 22: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48 -Thu 14:59: INFO : Info (12023): Found entity 23: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48 -Thu 14:59: INFO : Info (12023): Found entity 24: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48 -Thu 14:59: INFO : Info (12023): Found entity 25: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj -Thu 14:59: INFO : Info (12023): Found entity 26: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce -Thu 14:59: INFO : Info (12021): Found 4 design units, including 2 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce/MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco-RTL -Thu 14:59: INFO : Info (12022): Found design unit 2: mwfloatingpointunit_quartusv13_0_0_mult_11x53to11x53_lat10_ce-RTL -Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco -Thu 14:59: INFO : Info (12023): Found entity 2: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33/SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ConditionalAdd/ConditionalAdd.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: ConditionalAdd-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: ConditionalAdd -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ConditionalAddSubtract/ConditionalAddSubtract.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: ConditionalAddSubtract-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: ConditionalAddSubtract -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49/SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32/SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/TriAdd/TriAdd.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: TriAdd-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: TriAdd -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ManagerStateMachine_readControl/ManagerStateMachine_readControl.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: ManagerStateMachine_readControl-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: ManagerStateMachine_readControl -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ManagerStateMachine_csrDecoder/ManagerStateMachine_csrDecoder.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: ManagerStateMachine_csrDecoder-StateMachine -Thu 14:59: INFO : Info (12023): Found entity 1: ManagerStateMachine_csrDecoder -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/signal_forwarding_adapter/signal_forwarding_adapter.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: signal_forwarding_adapter-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: signal_forwarding_adapter -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/common_packet_parser/common_packet_parser.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: common_packet_parser-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: common_packet_parser -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_memories_adapter/mapped_memories_adapter.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_memories_adapter-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: mapped_memories_adapter -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_memories_controller_core/mapped_memories_controller_core.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_memories_controller_core-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: mapped_memories_controller_core -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_registers_controller/mapped_registers_controller.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_registers_controller-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: mapped_registers_controller -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mec_switch_arbiter/mec_switch_arbiter.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: mec_switch_arbiter-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: mec_switch_arbiter -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_clock_control/mapped_clock_control.quartus.vhd -Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_clock_control-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: mapped_clock_control -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mec_switch_arbiter_i.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: mec_switch_arbiter_i-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: mec_switch_arbiter_i -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedClockControl_id_3e.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedClockControl_id_3e-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedClockControl_id_3e -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/stream_clkprim_lock_count_32.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: stream_clkprim_lock_count_32-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: stream_clkprim_lock_count_32 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SanityBlock_cclk_STREAM_mem_clk0_clk_pcie.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SanityBlock_cclk_STREAM_mem_clk0_clk_pcie-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SanityBlock_cclk_STREAM_mem_clk0_clk_pcie -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_element_switch/mapped_element_switch.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: mapped_element_switch-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: mapped_element_switch -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/mapped_element_switch/src_to_dst_control.quartus.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: src_to_dst_control-rtl -Thu 14:59: INFO : Info (12023): Found entity 1: src_to_dst_control -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAX4MAIAPeripheryTop.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MAX4MAIAPeripheryTop-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MAX4MAIAPeripheryTop -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAX4CPLDInterface.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MAX4CPLDInterface-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MAX4CPLDInterface -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAXEvents.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MAXEvents-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MAXEvents -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixPCIeBase.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixPCIeBase-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixPCIeBase -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/TransceiverReconfig.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: TransceiverReconfig-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: TransceiverReconfig -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../StratixVHardIPPCIe.vhdl(503) -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../StratixVHardIPPCIe.vhdl(510) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVHardIPPCIe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVHardIPPCIe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixVHardIPPCIe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_6_controller.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_6_controller-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_6_controller -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_5_controller.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_5_controller-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_5_controller -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_4_controller.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_4_controller-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_4_controller -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_3_controller.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_3_controller-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_3_controller -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_2_controller.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_2_controller-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_2_controller -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVDDR3_sodimm_1_controller.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVDDR3_sodimm_1_controller-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixVDDR3_sodimm_1_controller -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraClockGenerator_250_100_STREAM.vhdl(107) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraClockGenerator_250_100_STREAM.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraClockGenerator_250_100_STREAM-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraClockGenerator_250_100_STREAM -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../StratixVClockManager_in250_out_f100p0dc50_f100p180dc50.vhdl(276) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixVClockManager_in250_out_f100p0dc50_f100p180dc50.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixVClockManager_in250_out_f100p0dc50_f100p180dc50-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixVClockManager_in250_out_f100p0dc50_f100p180dc50 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAX4FPGATop.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MAX4FPGATop-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MAX4FPGATop -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraStreamFifo_128_64_128_afv_95_pushin_pushout.vhdl(115) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraStreamFifo_128_64_128_afv_95_pushin_pushout.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraStreamFifo_128_64_128_afv_95_pushin_pushout-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraStreamFifo_128_64_128_afv_95_pushin_pushout -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PCIeEA.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PCIeEA-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PCIeEA -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_34_512_34_dualclock_aclr.vhdl(110) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_34_512_34_dualclock_aclr.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_34_512_34_dualclock_aclr-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_34_512_34_dualclock_aclr -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StratixPCIeInterface.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StratixPCIeInterface-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StratixPCIeInterface -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MAX4PCIeSlaveInterface.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MAX4PCIeSlaveInterface-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MAX4PCIeSlaveInterface -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FPGAWrapperEntity_Manager_Spmv.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FPGAWrapperEntity_Manager_Spmv-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FPGAWrapperEntity_Manager_Spmv -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PerfMonitor.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PerfMonitor-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PerfMonitor -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WideFifoWithLevel_3073_512_16_16_false_792_TO-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WideFifoWithLevel_3073_512_16_16_false_792_TO -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22.vhdl(115) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22.vhdl(115) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WideFifoWithLevel_3072_512_16_16_false_792_FROM-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WideFifoWithLevel_3072_512_16_16_false_792_FROM -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490.vhdl(115) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490.vhdl(115) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DDRAddressBitSwap8GBOpt.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DDRAddressBitSwap8GBOpt-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DDRAddressBitSwap8GBOpt -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedElementAdapterForwarder.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedElementAdapterForwarder-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedElementAdapterForwarder -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PCIeStreaming_2_4.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PCIeStreaming_2_4-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PCIeStreaming_2_4 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PCIeSlaveStreamFromHost.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PCIeSlaveStreamFromHost-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PCIeSlaveStreamFromHost -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PCIeSlaveStreamToHost.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PCIeSlaveStreamToHost-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PCIeSlaveStreamToHost -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SlaveStreamingCreditsBarParser.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SlaveStreamingCreditsBarParser-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SlaveStreamingCreditsBarParser -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SlaveStreamingRingConfigBarParser.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SlaveStreamingRingConfigBarParser-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SlaveStreamingRingConfigBarParser -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MemWriteRequestArbiter.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MemWriteRequestArbiter-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MemWriteRequestArbiter -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FastRequestArbiter_req5.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FastRequestArbiter_req5-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FastRequestArbiter_req5 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/TagGenerator.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: TagGenerator-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: TagGenerator -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/RequestEncoder.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: RequestEncoder-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: RequestEncoder -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_128_512_128_aclr_afv448.vhdl(104) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_128_512_128_aclr_afv448.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_128_512_128_aclr_afv448-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_128_512_128_aclr_afv448 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_115_512_115_aclr_fwft.vhdl(101) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_115_512_115_aclr_fwft.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_115_512_115_aclr_fwft-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraFifoEntity_115_512_115_aclr_fwft -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ReadComplRequestArbiter.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: ReadComplRequestArbiter-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: ReadComplRequestArbiter -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FastRequestArbiter_req1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FastRequestArbiter_req1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FastRequestArbiter_req1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "keep_hierarchy" at ../../../Manager_Spmv.vhdl(1375) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_80.vhdl(117) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_80.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_80-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_80 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_58.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_58.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_58-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_58 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_55.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_55.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_55-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_55 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_52.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_52.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_52-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_52 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_50.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_50.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_50-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_50 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_46.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_46.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_46-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_46 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_48.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_48.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_48-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_48 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_42.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_42.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_42-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_42 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_44.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_44.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_44-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_44 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_40.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_40.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_40-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_40 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_78.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_78.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_78-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_78 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_36.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_36.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_36-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_36 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_34.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_34.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_34-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_34 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_74.vhdl(119) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_74.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_74-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_74 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_38.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_38.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_38-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_38 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_5.vhdl(113) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_5.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_5-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_5 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_66.vhdl(119) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_66.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_66-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_66 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_72.vhdl(110) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_72.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_72-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_72 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_68.vhdl(117) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_68.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_68-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_68 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../Manager_Spmv_WrapperNodeEntity_Stream_64.vhdl(110) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_64.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_64-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_64 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_70.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_70-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_70 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StreamPullPushAdapter3072.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StreamPullPushAdapter3072-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StreamPullPushAdapter3072 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_61.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_61-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_61 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectReg_64_128.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectReg_64_128-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectReg_64_128 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_17.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_17-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_17 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectCounterPipelined_1536_3072.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectCounterPipelined_1536_3072-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectCounterPipelined_1536_3072 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_31.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_31-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_31 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectMux_128_64_COUNTER_PIPELINED.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectMux_128_64_COUNTER_PIPELINED-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectMux_128_64_COUNTER_PIPELINED -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectCounterPipelined_64_128.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectCounterPipelined_64_128-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectCounterPipelined_64_128 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_14.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_14-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_14 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectReg_128_3072.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectReg_128_3072-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectReg_128_3072 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_Stream_1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_Stream_1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_Stream_1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectMux_128_32_COUNTER_PIPELINED.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectMux_128_32_COUNTER_PIPELINED-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectMux_128_32_COUNTER_PIPELINED -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/DualAspectCounterPipelined_32_128.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: DualAspectCounterPipelined_32_128-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: DualAspectCounterPipelined_32_128 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_output.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_output-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_output -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvPaddingKernel_streamwrapper.vhdl(358) -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvPaddingKernel_streamwrapper.vhdl(359) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel_streamwrapper.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvPaddingKernel_streamwrapper-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvPaddingKernel_streamwrapper -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_20.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_20-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_20 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_19.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_19-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_19 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_18.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_18-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_18 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvPaddingKernel.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvPaddingKernel-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvPaddingKernel -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/OutputRegisterEntity_48.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: OutputRegisterEntity_48-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: OutputRegisterEntity_48 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_64_pipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_64_pipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_64_pipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_64.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_64-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_64 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonBitwiseOp_1_Andnopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonBitwiseOp_1_Andnopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonBitwiseOp_1_Andnopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonBitwiseNot_1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonBitwiseNot_1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonBitwiseNot_1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x5.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x5-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x5 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x5_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x5_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x5_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvReductionKernel_streamwrapper.vhdl(341) -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvReductionKernel_streamwrapper.vhdl(342) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel_streamwrapper.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel_streamwrapper-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel_streamwrapper -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_17.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_17-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_17 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_16.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_16-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_16 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_ee38d306568098454952bd3e86e61f39.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_ee38d306568098454952bd3e86e61f39-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_ee38d306568098454952bd3e86e61f39 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvReductionKernel.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvReductionKernel-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvReductionKernel -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0.vhdl(82) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvReductionKernel_dynamic_offset16.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvReductionKernel_dynamic_offset16-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvReductionKernel_dynamic_offset16 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x14.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x14-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x14 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x14_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x14_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x14_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_vromLoad.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_vromLoad-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_vromLoad -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_values.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_values-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_values -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_cmd_values_0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_cmd_values_0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_cmd_values_0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Linear1DAddressGen_1_addrgen_cmd_values.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Linear1DAddressGen_1_addrgen_cmd_values-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Linear1DAddressGen_1_addrgen_cmd_values -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_62befbd42223e4c6f7557ca75e01e116.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_62befbd42223e4c6f7557ca75e01e116-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_62befbd42223e4c6f7557ca75e01e116 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_indptr.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_indptr-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_indptr -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_cmd_indptr_0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_cmd_indptr_0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_cmd_indptr_0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Linear1DAddressGen_1_addrgen_cmd_indptr.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Linear1DAddressGen_1_addrgen_cmd_indptr-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Linear1DAddressGen_1_addrgen_cmd_indptr -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_fromcpu.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_fromcpu-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_fromcpu -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_cpu2lmem.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_cpu2lmem-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_cpu2lmem -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_cmd_cpu2lmem_0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WrapperNodeIO_cmd_cpu2lmem_0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WrapperNodeIO_cmd_cpu2lmem_0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Linear1DAddressGen_1_addrgen_cmd_cpu2lmem.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Linear1DAddressGen_1_addrgen_cmd_cpu2lmem-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Linear1DAddressGen_1_addrgen_cmd_cpu2lmem -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_SpmvKernel.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_SpmvKernel-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_SpmvKernel -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvKernel_streamwrapper.vhdl(621) -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvKernel_streamwrapper.vhdl(622) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel_streamwrapper.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvKernel_streamwrapper-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvKernel_streamwrapper -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_15.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_15-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_15 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_14.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_14-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_14 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_13.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_13-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_13 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_12.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_12-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_12 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_11.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_11-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_11 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_10.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_10-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_10 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_9.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_9-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_9 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_8.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_8-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_8 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_7.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_7-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_7 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_6.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_6-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_6 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_5.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_5-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_5 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_4.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_4-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_4 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_3.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_3-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_3 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvKernel.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvKernel-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvKernel -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0.vhdl(82) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_64_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_64_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_64_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_64x5.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_64x5-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_64x5 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_64x5_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_64x5_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_64x5_reg1 -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0.vhdl(82) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_64x10.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_64x10-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_64x10 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_64x10_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_64x10_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_64x10_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_3072.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_3072-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_3072 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x10.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x10-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x10 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x10_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x10_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x10_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x1_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x1_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x1_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_1_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_1_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_1_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonBitwiseOp_1_Ornopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonBitwiseOp_1_Ornopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonBitwiseOp_1_Ornopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x11.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x11-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x11 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x11_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x11_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x11_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_32_pipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_32_pipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_32_pipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x18.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x18-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x18 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x18_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x18_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x18_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_32x16.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_32x16-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_32x16 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_32x16_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_32x16_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_32x16_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_32.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_32-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_32 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Pulse_cycles1_initF.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Pulse_cycles1_initF-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Pulse_cycles1_initF -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x40.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x40-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x40 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x80.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x80-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x80 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvCacheKernel_streamwrapper.vhdl(447) -Thu 14:59: INFO : Warning (10335): Unrecognized synthesis attribute "buffer_type" at ../../../SpmvCacheKernel_streamwrapper.vhdl(448) -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel_streamwrapper.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvCacheKernel_streamwrapper-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvCacheKernel_streamwrapper -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FlushLevelCounter_2.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FlushLevelCounter_2-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FlushLevelCounter_2 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/FillLevelCounter_0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: FillLevelCounter_0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: FillLevelCounter_0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SpmvCacheKernel.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SpmvCacheKernel-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SpmvCacheKernel -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_32_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_32_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_32_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_32x1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_32x1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_32x1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_32x1_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_32x1_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_32x1_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_3_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_3_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_3_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_3x1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_3x1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_3x1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_3x1_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_3x1_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_3x1_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Pulse_cycles1_initT.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: Pulse_cycles1_initT-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: Pulse_cycles1_initT -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_1536.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_1536-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_1536 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WordLevelShifter_Left_Circular_1_48_6.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: WordLevelShifter_Left_Circular_1_48_6-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: WordLevelShifter_Left_Circular_1_48_6 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonMUX_1_2_6_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonMUX_1_2_6_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonMUX_1_2_6_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_64x1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_64x1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_64x1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_64x1_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_64x1_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_64x1_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/PhotonBitwiseOp_1_Andpipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: PhotonBitwiseOp_1_Andpipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: PhotonBitwiseOp_1_Andpipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_6x1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_6x1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_6x1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_6x1_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_6x1_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_6x1_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x23.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x23-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x23 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x23_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x23_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x23_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x22.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x22-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x22 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x22_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x22_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x22_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x21.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x21-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x21 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x21_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x21_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x21_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x20.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x20-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x20 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x20_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x20_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x20_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x19.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x19-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x19 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x19_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x19_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x19_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x17.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x17-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x17 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x17_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x17_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x17_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x16.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x16-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x16 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x16_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x16_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x16_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x15.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x15-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x15 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x15_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x15_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x15_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x13.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x13-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x13 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x13_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x13_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x13_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x12.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x12-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x12 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x12_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x12_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x12_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x9.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x9-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x9 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x9_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x9_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x9_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x8.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x8-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x8 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x8_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x8_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x8_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x7.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x7-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x7 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x7_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x7_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x7_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x6.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x6-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x6 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x6_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x6_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x6_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x4.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x4-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x4 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x4_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x4_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x4_reg1 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x3.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x3-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: MultiStageDelay_1x3 -Thu 14:59: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x3_reg1.vhdl -Thu 14:59: INFO : Info (12022): Found design unit 1: SRLDelay_1x3_reg1-MaxDC -Thu 14:59: INFO : Info (12023): Found entity 1: SRLDelay_1x3_reg1 -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MultiStageDelay_1x2.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MultiStageDelay_1x2-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MultiStageDelay_1x2 -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SRLDelay_1x2_reg1.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: SRLDelay_1x2_reg1-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: SRLDelay_1x2_reg1 -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/InputRegisterEntity2013_48.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: InputRegisterEntity2013_48-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: InputRegisterEntity2013_48 -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_readControl.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_readControl-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_readControl -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/WrapperNodeIO_colptr.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: WrapperNodeIO_colptr-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: WrapperNodeIO_colptr -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/Manager_Spmv_WrapperNodeEntity_csrDecoder.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: Manager_Spmv_WrapperNodeEntity_csrDecoder-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: Manager_Spmv_WrapperNodeEntity_csrDecoder -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_d913f77b396d0027f51d31cc753659b2.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegBlock_d913f77b396d0027f51d31cc753659b2-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegBlock_d913f77b396d0027f51d31cc753659b2 -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedDRP_Addr_3c0000_ChecksumMappedDRP.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedDRP_Addr_3c0000_ChecksumMappedDRP-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedDRP_Addr_3c0000_ChecksumMappedDRP -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ChecksumMappedDRP_RAM.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: ChecksumMappedDRP_RAM-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: ChecksumMappedDRP_RAM -Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "keep_hierarchy" at ../../../SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0.vhdl(219) -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0 -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830 -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/SignalForwardingEA.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: SignalForwardingEA-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: SignalForwardingEA -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/CommonPacketParser_SignalForwarding.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: CommonPacketParser_SignalForwarding-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: CommonPacketParser_SignalForwarding -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/ControlMux.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: ControlMux-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: ControlMux -Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "keep_hierarchy" at ../../../MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1.vhdl(328) -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1 -Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_36_512_36_dualclock_aclr.vhdl(110) -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_36_512_36_dualclock_aclr.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_36_512_36_dualclock_aclr-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: AlteraFifoEntity_36_512_36_dualclock_aclr -Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "box_type" at ../../../AlteraFifoEntity_71_512_71_dualclock_aclr.vhdl(110) -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/AlteraFifoEntity_71_512_71_dualclock_aclr.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: AlteraFifoEntity_71_512_71_dualclock_aclr-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: AlteraFifoEntity_71_512_71_dualclock_aclr -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedMemoriesEA.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedMemoriesEA-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedMemoriesEA -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/CommonPacketParser_MappedMemories.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: CommonPacketParser_MappedMemories-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: CommonPacketParser_MappedMemories -Thu 15:00: INFO : Warning (10335): Unrecognized synthesis attribute "keep_hierarchy" at ../../../MappedRegistersController_306.vhdl(193) -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegistersController_306.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegistersController_306-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegistersController_306 -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedRegistersEA.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedRegistersEA-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedRegistersEA -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/CommonPacketParser_MappedRegisters.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: CommonPacketParser_MappedRegisters-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: CommonPacketParser_MappedRegisters -Thu 15:00: INFO : Info (12021): Found 2 design units, including 1 entities, in source file /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/scratch/MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe.vhdl -Thu 15:00: INFO : Info (12022): Found design unit 1: MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe-MaxDC -Thu 15:00: INFO : Info (12023): Found entity 1: MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe -Thu 15:00: INFO : Warning (10236): Verilog HDL Implicit Net warning at altpcie_hip_256_pipen1b.v(3218): created implicit net for "swdnout" -Thu 15:00: INFO : Warning (10236): Verilog HDL Implicit Net warning at altpcie_hip_256_pipen1b.v(3219): created implicit net for "swupout" -Thu 15:00: INFO : Info (12127): Elaborating entity "MAX4MAIAPeripheryTop" for the top level hierarchy -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1286): object "pciebase_i_sim_pipe_rate" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1287): object "pciebase_i_sim_ltssmstate" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1288): object "pciebase_i_eidleinfersel0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1289): object "pciebase_i_eidleinfersel1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1290): object "pciebase_i_eidleinfersel2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1291): object "pciebase_i_eidleinfersel3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1292): object "pciebase_i_eidleinfersel4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1293): object "pciebase_i_eidleinfersel5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1294): object "pciebase_i_eidleinfersel6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1295): object "pciebase_i_eidleinfersel7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1296): object "pciebase_i_powerdown0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1297): object "pciebase_i_powerdown1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1298): object "pciebase_i_powerdown2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1299): object "pciebase_i_powerdown3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1300): object "pciebase_i_powerdown4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1301): object "pciebase_i_powerdown5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1302): object "pciebase_i_powerdown6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1303): object "pciebase_i_powerdown7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1304): object "pciebase_i_rxpolarity0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1305): object "pciebase_i_rxpolarity1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1306): object "pciebase_i_rxpolarity2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1307): object "pciebase_i_rxpolarity3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1308): object "pciebase_i_rxpolarity4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1309): object "pciebase_i_rxpolarity5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1310): object "pciebase_i_rxpolarity6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1311): object "pciebase_i_rxpolarity7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1312): object "pciebase_i_txcompl0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1313): object "pciebase_i_txcompl1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1314): object "pciebase_i_txcompl2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1315): object "pciebase_i_txcompl3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1316): object "pciebase_i_txcompl4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1317): object "pciebase_i_txcompl5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1318): object "pciebase_i_txcompl6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1319): object "pciebase_i_txcompl7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1320): object "pciebase_i_txdata0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1321): object "pciebase_i_txdata1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1322): object "pciebase_i_txdata2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1323): object "pciebase_i_txdata3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1324): object "pciebase_i_txdata4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1325): object "pciebase_i_txdata5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1326): object "pciebase_i_txdata6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1327): object "pciebase_i_txdata7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1328): object "pciebase_i_txdatak0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1329): object "pciebase_i_txdatak1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1330): object "pciebase_i_txdatak2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1331): object "pciebase_i_txdatak3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1332): object "pciebase_i_txdatak4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1333): object "pciebase_i_txdatak5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1334): object "pciebase_i_txdatak6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1335): object "pciebase_i_txdatak7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1336): object "pciebase_i_txdetectrx0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1337): object "pciebase_i_txdetectrx1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1338): object "pciebase_i_txdetectrx2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1339): object "pciebase_i_txdetectrx3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1340): object "pciebase_i_txdetectrx4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1341): object "pciebase_i_txdetectrx5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1342): object "pciebase_i_txdetectrx6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1343): object "pciebase_i_txdetectrx7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1344): object "pciebase_i_txelecidle0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1345): object "pciebase_i_txelecidle1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1346): object "pciebase_i_txelecidle2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1347): object "pciebase_i_txelecidle3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1348): object "pciebase_i_txelecidle4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1349): object "pciebase_i_txelecidle5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1350): object "pciebase_i_txelecidle6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1351): object "pciebase_i_txelecidle7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1352): object "pciebase_i_txdeemph0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1353): object "pciebase_i_txdeemph1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1354): object "pciebase_i_txdeemph2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1355): object "pciebase_i_txdeemph3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1356): object "pciebase_i_txdeemph4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1357): object "pciebase_i_txdeemph5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1358): object "pciebase_i_txdeemph6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1359): object "pciebase_i_txdeemph7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1360): object "pciebase_i_txswing0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1361): object "pciebase_i_txswing1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1362): object "pciebase_i_txswing2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1363): object "pciebase_i_txswing3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1364): object "pciebase_i_txswing4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1365): object "pciebase_i_txswing5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1366): object "pciebase_i_txswing6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1367): object "pciebase_i_txswing7" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1368): object "pciebase_i_txmargin0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1369): object "pciebase_i_txmargin1" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1370): object "pciebase_i_txmargin2" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1371): object "pciebase_i_txmargin3" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1372): object "pciebase_i_txmargin4" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1373): object "pciebase_i_txmargin5" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1374): object "pciebase_i_txmargin6" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4MAIAPeripheryTop.vhdl(1375): object "pciebase_i_txmargin7" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "MAX4FPGATop" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(956): object "wrapper_pcie_pcie_control_sfh_done" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(958): object "wrapper_pcie_pcie_control_sth_stall" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1029): object "max4pcieslaveinterface_i_flush" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1031): object "max4pcieslaveinterface_i_soft_reset" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1032): object "max4pcieslaveinterface_i_throttle_limit" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1059): object "max4pcieslaveinterface_i_maxring_s_fh" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1060): object "max4pcieslaveinterface_i_maxring_s_set_highz_n" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1061): object "max4pcieslaveinterface_i_maxring_id_fh" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1062): object "max4pcieslaveinterface_i_maxring_id_set_highz_n" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1076): object "max4pcieslaveinterface_i_compl_fifo_flags" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1079): object "max4pcieslaveinterface_i_compute_reset_n" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1086): object "max4pcieslaveinterface_i_local_ifpga_session_key" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1194): object "ftb_archange_mappedelementsswitchpcieea_out_push_done" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1197): object "ftb_mappedelementsswitchpcieea_full" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4FPGATop.vhdl(1199): object "ftb_mappedelementsswitchpcieea_wr_data_count" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "FPGAWrapperEntity_Manager_Spmv" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1008): object "inst_ln11_synchroniser_level_dst" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1009): object "inst_ln11_synchroniser1_level_dst" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1010): object "inst_ln11_synchroniser2_level_dst" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1022): object "inst_ln32_mappedclockcontrol_clkbuf_clksel0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1085): object "signalforwardingadapter_i_port_out_sysmon_reset" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1086): object "signalforwardingadapter_i_port_out_pcc_switch_regs" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1087): object "signalforwardingadapter_i_port_out_pcc_start" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1088): object "signalforwardingadapter_i_port_out_pcc_reset" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1123): object "inst_ln11_synchroniser5_level_dst" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1187): object "inst_ln11_synchroniser10_level_dst" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1188): object "inst_ln11_synchroniser11_level_dst" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at FPGAWrapperEntity_Manager_Spmv.vhdl(1265): object "memctrlpro_maia_sodimms_eos" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "basic_synchroniser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser" -Thu 15:00: INFO : Info (12128): Elaborating entity "basic_synchroniser_prim" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src" -Thu 15:00: INFO : Info (12128): Elaborating entity "dff_ce_asyncsr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src|dff_ce_asyncsr:\g_slice_packing:0:i_sync0" -Thu 15:00: INFO : Info (12128): Elaborating entity "LPM_FF" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src|dff_ce_asyncsr:\g_slice_packing:0:i_sync0|LPM_FF:dff" -Thu 15:00: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src|dff_ce_asyncsr:\g_slice_packing:0:i_sync0|LPM_FF:dff" -Thu 15:00: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|basic_synchroniser:inst_ln11_synchroniser|basic_synchroniser_prim:\g_wide:0:g_width1:sync_level_src|dff_ce_asyncsr:\g_slice_packing:0:i_sync0|LPM_FF:dff" with the following parameter: -Thu 15:00: INFO : Info (12134): Parameter "LPM_WIDTH" = "1" -Thu 15:00: INFO : Info (12134): Parameter "LPM_AVALUE" = "UNUSED" -Thu 15:00: INFO : Info (12134): Parameter "LPM_SVALUE" = "UNUSED" -Thu 15:00: INFO : Info (12134): Parameter "LPM_PVALUE" = "UNUSED" -Thu 15:00: INFO : Info (12134): Parameter "LPM_FFTYPE" = "DFF" -Thu 15:00: INFO : Info (12134): Parameter "LPM_TYPE" = "DFF" -Thu 15:00: INFO : Info (12134): Parameter "LPM_HINT" = "UNUSED" -Thu 15:00: INFO : Info (12128): Elaborating entity "SanityBlock_cclk_STREAM_mem_clk0_clk_pcie" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SanityBlock_cclk_STREAM_mem_clk0_clk_pcie:SanityBlock_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SanityBlock_cclk_STREAM_mem_clk0_clk_pcie:SanityBlock_i|MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e:MappedRegBlock_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SanityBlock_cclk_STREAM_mem_clk0_clk_pcie:SanityBlock_i|MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e:MappedRegBlock_i|mapped_register_readable:inst_ln484_mappedregblock" -Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SanityBlock_cclk_STREAM_mem_clk0_clk_pcie:SanityBlock_i|MappedRegBlock_2fa608c2931a0f176aef067a3e2bea8e:MappedRegBlock_i|mapped_register_readable:inst_ln484_mappedregblock4" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedClockControl_id_3e" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedClockControl_id_3e:inst_ln32_mappedclockcontrol" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedClockControl_id_3e.vhdl(145): object "inst_ln200_mappedclockcontrol_cc_reg_pll_ce" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "stream_clkprim_lock_count_32" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedClockControl_id_3e:inst_ln32_mappedclockcontrol|stream_clkprim_lock_count_32:inst_ln16_plllockinstrumentation" -Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_clock_control" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedClockControl_id_3e:inst_ln32_mappedclockcontrol|mapped_clock_control:inst_ln200_mappedclockcontrol" -Thu 15:00: INFO : Info (12128): Elaborating entity "reset_control" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|reset_control:inst_ln21_resetcontrol" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe:MappedElementSwitch_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_element_switch" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe:MappedElementSwitch_i|mapped_element_switch:MappedElementSwitchExternal_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "mec_switch_arbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe:MappedElementSwitch_i|mapped_element_switch:MappedElementSwitchExternal_i|mec_switch_arbiter:request_source_arbiter" -Thu 15:00: INFO : Info (12128): Elaborating entity "src_to_dst_control" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementSwitch_MappedRegisters_MappedMemories_SignalForwarding_PCIe:MappedElementSwitch_i|mapped_element_switch:MappedElementSwitchExternal_i|src_to_dst_control:request_source_control" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegistersController_306" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedRegistersController_306.vhdl(168): object "mappedregistersea_i_reserved_0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedRegistersController_306.vhdl(170): object "mappedregistersea_i_is_response_header" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedRegistersController_306.vhdl(172): object "mappedregistersea_i_reserved_1" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegistersEA" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|MappedRegistersEA:MappedRegistersEA_i" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedRegistersEA.vhdl(148): object "commonpacketparser_i_ea_manual_rdy" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "CommonPacketParser_MappedRegisters" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|MappedRegistersEA:MappedRegistersEA_i|CommonPacketParser_MappedRegisters:CommonPacketParser_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "common_packet_parser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|MappedRegistersEA:MappedRegistersEA_i|CommonPacketParser_MappedRegisters:CommonPacketParser_i|common_packet_parser:CommonPacketParserExternal_MappedRegisters" -Thu 15:00: INFO : Info (12128): Elaborating entity "ControlMux" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|MappedRegistersEA:MappedRegistersEA_i|CommonPacketParser_MappedRegisters:CommonPacketParser_i|ControlMux:control_mux" -Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_registers_controller" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedRegistersController_306:MappedRegistersController_i|mapped_registers_controller:MappedRegistersControllerExternal_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1.vhdl(261): object "mappedmemoriesea_i_reserved_0" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1.vhdl(264): object "mappedmemoriesea_i_is_response_header" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_memories_controller_core" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|mapped_memories_controller_core:MappedMemoriesControllerCoreExternal_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedMemoriesEA" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|MappedMemoriesEA:MappedmemoriesEA_i" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at MappedMemoriesEA.vhdl(150): object "commonpacketparser_i_ea_manual_rdy" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "CommonPacketParser_MappedMemories" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|MappedMemoriesEA:MappedmemoriesEA_i|CommonPacketParser_MappedMemories:CommonPacketParser_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_memories_adapter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|mapped_memories_adapter:mapped_memories_domain_adapter_drp" -Thu 15:00: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_71_512_71_dualclock_aclr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp" -Thu 15:00: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo" -Thu 15:00: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo" -Thu 15:00: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:00: INFO : Info (12134): Parameter "lpm_width" = "71" -Thu 15:00: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:00: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:00: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:00: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:00: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:00: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:00: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:00: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:00: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:00: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:00: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:00: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:00: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:00: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:00: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_cu42.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: dcfifo_cu42 -Thu 15:00: INFO : Info (12128): Elaborating entity "dcfifo_cu42" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_p07.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: a_graycounter_p07 -Thu 15:00: INFO : Info (12128): Elaborating entity "a_graycounter_p07" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|a_graycounter_p07:rdptr_g1p" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_lec.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: a_graycounter_lec -Thu 15:00: INFO : Info (12128): Elaborating entity "a_graycounter_lec" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|a_graycounter_lec:wrptr_g1p" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_88e1.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: altsyncram_88e1 -Thu 15:00: INFO : Info (12128): Elaborating entity "altsyncram_88e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_qld.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: alt_synch_pipe_qld -Thu 15:00: INFO : Info (12128): Elaborating entity "alt_synch_pipe_qld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|alt_synch_pipe_qld:rs_dgwp" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_pe9.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: dffpipe_pe9 -Thu 15:00: INFO : Info (12128): Elaborating entity "dffpipe_pe9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|alt_synch_pipe_qld:rs_dgwp|dffpipe_pe9:dffpipe12" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_rld.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: alt_synch_pipe_rld -Thu 15:00: INFO : Info (12128): Elaborating entity "alt_synch_pipe_rld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|alt_synch_pipe_rld:ws_dgrp" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_qe9.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: dffpipe_qe9 -Thu 15:00: INFO : Info (12128): Elaborating entity "dffpipe_qe9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|alt_synch_pipe_rld:ws_dgrp|dffpipe_qe9:dffpipe15" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_b16.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: cmpr_b16 -Thu 15:00: INFO : Info (12128): Elaborating entity "cmpr_b16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|cmpr_b16:rdempty_eq_comp" -Thu 15:00: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_36_512_36_dualclock_aclr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp" -Thu 15:00: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo" -Thu 15:00: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo" -Thu 15:00: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:00: INFO : Info (12134): Parameter "lpm_width" = "36" -Thu 15:00: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:00: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:00: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:00: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:00: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:00: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:00: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:00: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:00: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:00: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:00: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:00: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:00: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:00: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:00: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_eu42.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: dcfifo_eu42 -Thu 15:00: INFO : Info (12128): Elaborating entity "dcfifo_eu42" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_a8e1.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: altsyncram_a8e1 -Thu 15:00: INFO : Info (12128): Elaborating entity "altsyncram_a8e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|altsyncram_a8e1:fifo_ram" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_sld.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: alt_synch_pipe_sld -Thu 15:00: INFO : Info (12128): Elaborating entity "alt_synch_pipe_sld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|alt_synch_pipe_sld:rs_dgwp" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_re9.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: dffpipe_re9 -Thu 15:00: INFO : Info (12128): Elaborating entity "dffpipe_re9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|alt_synch_pipe_sld:rs_dgwp|dffpipe_re9:dffpipe6" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_tld.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: alt_synch_pipe_tld -Thu 15:00: INFO : Info (12128): Elaborating entity "alt_synch_pipe_tld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|alt_synch_pipe_tld:ws_dgrp" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_se9.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: dffpipe_se9 -Thu 15:00: INFO : Info (12128): Elaborating entity "dffpipe_se9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_36_512_36_dualclock_aclr:response_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_eu42:auto_generated|alt_synch_pipe_tld:ws_dgrp|dffpipe_se9:dffpipe9" -Thu 15:00: INFO : Info (12128): Elaborating entity "SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0.vhdl(194): object "signalforwardingea_i_is_response_header" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "SignalForwardingEA" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|SignalForwardingEA:SignalForwardingEA_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "CommonPacketParser_SignalForwarding" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|SignalForwardingEA:SignalForwardingEA_i|CommonPacketParser_SignalForwarding:CommonPacketParser_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "common_packet_parser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|SignalForwardingEA:SignalForwardingEA_i|CommonPacketParser_SignalForwarding:CommonPacketParser_i|common_packet_parser:CommonPacketParserExternal_SignalForwarding" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock" -Thu 15:00: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock|mapped_register:inst_ln504_mappedregblock" -Thu 15:00: INFO : Info (12128): Elaborating entity "signal_forwarding_adapter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|signal_forwarding_adapter:SignalForwardingAdapterExternal_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedDRP_Addr_3c0000_ChecksumMappedDRP" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp" -Thu 15:00: INFO : Info (12128): Elaborating entity "ChecksumMappedDRP_RAM" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i" -Thu 15:00: INFO : Info (12128): Elaborating entity "SRLDelay_1x2_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|SRLDelay_1x2_reg1:rd_delay" -Thu 15:00: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|SRLDelay_1x2_reg1:rd_delay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:00: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|altsyncram:checksum_mem" -Thu 15:00: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|altsyncram:checksum_mem" -Thu 15:00: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|altsyncram:checksum_mem" with the following parameter: -Thu 15:00: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:00: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:00: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:00: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:00: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:00: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:00: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:00: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:00: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:00: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:00: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:00: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" -Thu 15:00: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:00: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:00: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:00: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:00: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:00: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:00: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:00: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:00: INFO : Info (12134): Parameter "init_file" = "32x512_ROM_SINGLE_PORT_ireg_checksum.mif" -Thu 15:00: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:00: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:00: INFO : Info (12134): Parameter "numwords_a" = "512" -Thu 15:00: INFO : Info (12134): Parameter "numwords_b" = "0" -Thu 15:00: INFO : Info (12134): Parameter "operation_mode" = "ROM" -Thu 15:00: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:00: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:00: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" -Thu 15:00: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:00: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:00: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:00: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:00: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:00: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:00: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:00: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:00: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:00: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:00: INFO : Info (12134): Parameter "width_b" = "1" -Thu 15:00: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:00: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:00: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:00: INFO : Info (12134): Parameter "widthad_a" = "9" -Thu 15:00: INFO : Info (12134): Parameter "widthad_b" = "1" -Thu 15:00: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:00: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:00: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:00: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:00: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:00: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_8754.tdf -Thu 15:00: INFO : Info (12023): Found entity 1: altsyncram_8754 -Thu 15:00: INFO : Info (12128): Elaborating entity "altsyncram_8754" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedDRP_Addr_3c0000_ChecksumMappedDRP:checksum_mem_drp|ChecksumMappedDRP_RAM:mappeddrp_addr_3c0000_checksummappeddrp_i|altsyncram:checksum_mem|altsyncram_8754:auto_generated" -Thu 15:00: INFO : Info (12128): Elaborating entity "Manager_Spmv" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv.vhdl(1148): object "indptr_indptr_almost_empty" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_csrDecoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_csrDecoder:csrDecoder" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegBlock_d913f77b396d0027f51d31cc753659b2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_csrDecoder:csrDecoder|MappedRegBlock_d913f77b396d0027f51d31cc753659b2:inst_ln130_mappedregblock" -Thu 15:00: INFO : Info (12128): Elaborating entity "ManagerStateMachine_csrDecoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_csrDecoder:csrDecoder|ManagerStateMachine_csrDecoder:inst_ln165_statemachineentitycore" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at ManagerStateMachine_csrDecoder.vhdl(267): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at ManagerStateMachine_csrDecoder.vhdl(268): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "WrapperNodeIO_colptr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_colptr:colptr" -Thu 15:00: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_readControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_readControl:readControl" -Thu 15:00: INFO : Info (12128): Elaborating entity "MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_readControl:readControl|MappedRegBlock_09d71e390cc207e142a16e8f6c38ebfc:inst_ln130_mappedregblock" -Thu 15:00: INFO : Info (12128): Elaborating entity "ManagerStateMachine_readControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_readControl:readControl|ManagerStateMachine_readControl:inst_ln165_statemachineentitycore" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at ManagerStateMachine_readControl.vhdl(324): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at ManagerStateMachine_readControl.vhdl(325): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:00: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel" -Thu 15:00: INFO : Info (12128): Elaborating entity "SpmvCacheKernel_streamwrapper" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock" -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(332): object "spmvcachekernel_core_loadenabled_out_output_control" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(338): object "spmvcachekernel_core_matrixvalues_output_control" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(343): object "spmvcachekernel_core_vectorvalues_output_control" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(362): object "control_sm_pcc_finished" assigned a value but never read -Thu 15:00: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_streamwrapper.vhdl(374): object "control_sm_next_flush_level" assigned a value but never read -Thu 15:02: INFO : Info (12128): Elaborating entity "SpmvCacheKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core" -Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(1013): object "node_id478_nodedivmod_quotient" assigned a value but never read -Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(6855): object "node_id4_nodecounterv1_wrap" assigned a value but never read -Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(6972): object "node_id8177_nodedivmod_quotient" assigned a value but never read -Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(13130): object "node_id16178_nodecounterv1_wrap" assigned a value but never read -Thu 15:02: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel.vhdl(13137): object "node_id16184_nodecounterv1_wrap" assigned a value but never read -Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonBitwiseNot_1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonBitwiseNot_1:node_id15916_nodenot" -Thu 15:02: INFO : Info (12128): Elaborating entity "dff_ce_syncsr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|dff_ce_syncsr:node_id2_nodeinput_ce_pipereg_inst_0" -Thu 15:02: INFO : Info (12128): Elaborating entity "LPM_FF" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|dff_ce_syncsr:node_id2_nodeinput_ce_pipereg_inst_0|LPM_FF:dff" -Thu 15:02: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|dff_ce_syncsr:node_id2_nodeinput_ce_pipereg_inst_0|LPM_FF:dff" -Thu 15:02: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|dff_ce_syncsr:node_id2_nodeinput_ce_pipereg_inst_0|LPM_FF:dff" with the following parameter: -Thu 15:02: INFO : Info (12134): Parameter "LPM_WIDTH" = "1" -Thu 15:02: INFO : Info (12134): Parameter "LPM_AVALUE" = "UNUSED" -Thu 15:02: INFO : Info (12134): Parameter "LPM_SVALUE" = "UNUSED" -Thu 15:02: INFO : Info (12134): Parameter "LPM_PVALUE" = "UNUSED" -Thu 15:02: INFO : Info (12134): Parameter "LPM_FFTYPE" = "DFF" -Thu 15:02: INFO : Info (12134): Parameter "LPM_TYPE" = "LPM_FF" -Thu 15:02: INFO : Info (12134): Parameter "LPM_HINT" = "UNUSED" -Thu 15:02: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_1:node_id2_nodeinput_loadenabled_inloadenabled_in_data0_reg" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x1:node_id17896_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x1:node_id17896_nodefifo|SRLDelay_1x1_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x5:node_id19579_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x5_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x5:node_id19579_nodefifo|SRLDelay_1x5_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x5:node_id19579_nodefifo|SRLDelay_1x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonBitwiseOp_1_Andnopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonBitwiseOp_1_Andnopipe:node_id15925_nodeand" -Thu 15:02: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_48:node_id70_nodeinput_readmaskreadmask_data0_reg" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixedCast_1_0_UNSIGNED_6_0_UNSIGNED_TONEAR_pipe:node_id282_nodecast" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe:node_id16189_nodetriadd" -Thu 15:02: INFO : Info (12128): Elaborating entity "TriAdd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCTriAdd_6_0_UNSIGNED_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe:node_id16189_nodetriadd|TriAdd:inst_ln20_triadd" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x2:node_id16217_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x3" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x3:node_id16219_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x3_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x3:node_id16219_nodefifo|SRLDelay_1x3_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x3:node_id16219_nodefifo|SRLDelay_1x3_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x4" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x4:node_id16221_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x4_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x4:node_id16221_nodefifo|SRLDelay_1x4_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x4:node_id16221_nodefifo|SRLDelay_1x4_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x6" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x6:node_id16225_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x6_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x6:node_id16225_nodefifo|SRLDelay_1x6_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x6:node_id16225_nodefifo|SRLDelay_1x6_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x7:node_id16227_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x7_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x7:node_id16227_nodefifo|SRLDelay_1x7_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x7:node_id16227_nodefifo|SRLDelay_1x7_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x8:node_id16229_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x8_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x8:node_id16229_nodefifo|SRLDelay_1x8_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x8:node_id16229_nodefifo|SRLDelay_1x8_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x9:node_id16231_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x9_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x9:node_id16231_nodefifo|SRLDelay_1x9_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x9:node_id16231_nodefifo|SRLDelay_1x9_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x10" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x10:node_id16233_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x10_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x10:node_id16233_nodefifo|SRLDelay_1x10_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x10:node_id16233_nodefifo|SRLDelay_1x10_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x11" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x11:node_id16235_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x11_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x11:node_id16235_nodefifo|SRLDelay_1x11_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x11:node_id16235_nodefifo|SRLDelay_1x11_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x12" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x12:node_id16237_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x12_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x12:node_id16237_nodefifo|SRLDelay_1x12_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x12:node_id16237_nodefifo|SRLDelay_1x12_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x13" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x13:node_id16239_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x13_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x13:node_id16239_nodefifo|SRLDelay_1x13_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x13:node_id16239_nodefifo|SRLDelay_1x13_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x14" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x14:node_id16241_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x14_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x14:node_id16241_nodefifo|SRLDelay_1x14_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x14:node_id16241_nodefifo|SRLDelay_1x14_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x15" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x15:node_id16243_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x15_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x15:node_id16243_nodefifo|SRLDelay_1x15_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x15:node_id16243_nodefifo|SRLDelay_1x15_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x16:node_id16245_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x16_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x16:node_id16245_nodefifo|SRLDelay_1x16_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x16:node_id16245_nodefifo|SRLDelay_1x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x17" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x17:node_id16247_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x17_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x17:node_id16247_nodefifo|SRLDelay_1x17_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x17:node_id16247_nodefifo|SRLDelay_1x17_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x18" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x18:node_id16249_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x18_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x18:node_id16249_nodefifo|SRLDelay_1x18_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x18:node_id16249_nodefifo|SRLDelay_1x18_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x19" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x19:node_id16251_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x19_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x19:node_id16251_nodefifo|SRLDelay_1x19_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x19:node_id16251_nodefifo|SRLDelay_1x19_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x20" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x20:node_id16253_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x20_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x20:node_id16253_nodefifo|SRLDelay_1x20_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x20:node_id16253_nodefifo|SRLDelay_1x20_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x21" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x21:node_id16255_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x21_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x21:node_id16255_nodefifo|SRLDelay_1x21_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x21:node_id16255_nodefifo|SRLDelay_1x21_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x22" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x22:node_id16257_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x22_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x22:node_id16257_nodefifo|SRLDelay_1x22_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x22:node_id16257_nodefifo|SRLDelay_1x22_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x23" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x23:node_id16259_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_1x23_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x23:node_id16259_nodefifo|SRLDelay_1x23_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_1x23:node_id16259_nodefifo|SRLDelay_1x23_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_ADD_6_0_UNSIGNED_6_0_UNSIGNED_nogrowbits_pipe1:node_id16212_nodeadd" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_LT_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1:node_id575_nodelt" -Thu 15:02: INFO : Info (12128): Elaborating entity "Pulse_cycles1_initT" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Pulse_cycles1_initT:node_id470_nodepulse" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixedCast_6_0_UNSIGNED_7_0_UNSIGNED_TONEAR_nopipe:node_id474_nodecast" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_6x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_6x1:node_id16260_nodefifo" -Thu 15:02: INFO : Info (12128): Elaborating entity "SRLDelay_6x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_6x1:node_id16260_nodefifo|SRLDelay_6x1_reg1:SRLDelay" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_ADD_7_0_UNSIGNED_7_0_UNSIGNED_nogrowbits_nopipe:node_id476_nodeadd" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000:node_id478_nodedivmod" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000:node_id478_nodedivmod|MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000:inst_ln49_maxdcintegerdiv" -Thu 15:02: INFO : Info (12128): Elaborating entity "ConditionalAddSubtract" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000:node_id478_nodedivmod|MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000:inst_ln49_maxdcintegerdiv|ConditionalAddSubtract:inst_ln20_condaddsub" -Thu 15:02: INFO : Info (12128): Elaborating entity "ConditionalAddSubtract" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCDivMod_A7_B6_R7_Pipe1_Squash3ff0000000000000:node_id478_nodedivmod|MaxDCIntegerDiv_Num7_Denom6_Skip0_Frac0_Rem_Pipe1_Squash3ff0000000000000:inst_ln49_maxdcintegerdiv|ConditionalAddSubtract:inst_ln20_condaddsub6" -Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_6_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonMUX_1_2_6_nopipe:node_id473_nodemux" -Thu 15:02: INFO : Info (12128): Elaborating entity "WordLevelShifter_Left_Circular_1_48_6" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|WordLevelShifter_Left_Circular_1_48_6:node_id576_nodewordlevelshift" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|WordLevelShifter_Left_Circular_1_48_6:node_id576_nodewordlevelshift|MaxDCSingleLUTConstDiv_n6_d3_quotient_remainder_lat0:inst_ln23_maxdcsinglelutconstdiv" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|WordLevelShifter_Left_Circular_1_48_6:node_id576_nodewordlevelshift|MaxDCSingleLUTConstDiv_n5_d3_quotient_remainder_lat0:inst_ln23_maxdcsinglelutconstdiv1" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|WordLevelShifter_Left_Circular_1_48_6:node_id576_nodewordlevelshift|MaxDCSingleLUTConstDiv_n4_d3_quotient_remainder_lat0:inst_ln23_maxdcsinglelutconstdiv2" -Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonBitwiseOp_1_Andpipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonBitwiseOp_1_Andpipe:node_id64_nodeand" -Thu 15:02: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_3_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonMUX_1_2_3_nopipe:node_id1343_nodemux" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_SUB_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe:node_id1348_nodesub" -Thu 15:02: INFO : Info (12128): Elaborating entity "MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_ADD_3_0_UNSIGNED_3_0_UNSIGNED_nogrowbits_nopipe:node_id1345_nodeadd" -Thu 15:02: INFO : Info (12128): Elaborating entity "MultiStageDelay_3x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_3x1:node_id16262_nodefifo" -Thu 15:03: INFO : Info (12128): Elaborating entity "SRLDelay_3x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_3x1:node_id16262_nodefifo|SRLDelay_3x1_reg1:SRLDelay" -Thu 15:03: INFO : Info (12128): Elaborating entity "MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_EQ_3_0_UNSIGNED_3_0_UNSIGNED_growbits_nopipe:node_id8031_nodeeq" -Thu 15:03: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_3072" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_3072:node_id77_nodeinput_valuesvalues_data0_reg" -Thu 15:03: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_64_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonMUX_1_2_64_nopipe:node_id8047_nodemux" -Thu 15:03: INFO : Info (12128): Elaborating entity "MultiStageDelay_64x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_64x1:node_id16287_nodefifo" -Thu 15:03: INFO : Info (12128): Elaborating entity "SRLDelay_64x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_64x1:node_id16287_nodefifo|SRLDelay_64x1_reg1:SRLDelay" -Thu 15:03: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32:node_id4_nodecounterv1" -Thu 15:03: INFO : Info (12128): Elaborating entity "SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|StateMachineEntity_SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32:node_id4_nodecounterv1|SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32:inst_ln165_statemachineentitycore" -Thu 15:03: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:03: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_32.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:03: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixedCast_32_0_UNSIGNED_11_0_UNSIGNED_TONEAR_pipe:node_id59_nodecast" -Thu 15:03: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_64" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_64:node_id11_nodeinput_vromloadvromload_data0_reg" -Thu 15:03: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_1536" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|InputRegisterEntity2013_1536:node_id180_nodeinput_indptrindptr_data0_reg" -Thu 15:03: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_32_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|PhotonMUX_1_2_32_nopipe:node_id15746_nodemux" -Thu 15:03: INFO : Info (12128): Elaborating entity "MultiStageDelay_32x1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_32x1:node_id17924_nodefifo" -Thu 15:03: INFO : Info (12128): Elaborating entity "SRLDelay_32x1_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MultiStageDelay_32x1:node_id17924_nodefifo|SRLDelay_32x1_reg1:SRLDelay" -Thu 15:03: INFO : Info (12128): Elaborating entity "Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam" -Thu 15:03: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0" -Thu 15:03: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0|altsyncram:inst_ln61_mwblockmem" -Thu 15:03: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0|altsyncram:inst_ln61_mwblockmem" -Thu 15:03: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0|altsyncram:inst_ln61_mwblockmem" with the following parameter: -Thu 15:03: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:03: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:03: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:03: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:03: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:03: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:03: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:03: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:03: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:03: INFO : Info (12134): Parameter "clock_enable_input_a" = "NORMAL" -Thu 15:03: INFO : Info (12134): Parameter "clock_enable_input_b" = "NORMAL" -Thu 15:03: INFO : Info (12134): Parameter "clock_enable_output_a" = "NORMAL" -Thu 15:03: INFO : Info (12134): Parameter "clock_enable_output_b" = "NORMAL" -Thu 15:03: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:03: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:03: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:03: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:03: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:03: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:03: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:03: INFO : Info (12134): Parameter "init_file" = "UNUSED" -Thu 15:03: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:03: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:03: INFO : Info (12134): Parameter "numwords_a" = "2048" -Thu 15:03: INFO : Info (12134): Parameter "numwords_b" = "2048" -Thu 15:03: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:03: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:03: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:03: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" -Thu 15:03: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" -Thu 15:03: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:03: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:03: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:03: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:03: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA" -Thu 15:03: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:03: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:03: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:03: INFO : Info (12134): Parameter "width_a" = "64" -Thu 15:03: INFO : Info (12134): Parameter "width_b" = "64" -Thu 15:03: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:03: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:03: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:03: INFO : Info (12134): Parameter "widthad_a" = "11" -Thu 15:03: INFO : Info (12134): Parameter "widthad_b" = "11" -Thu 15:03: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:03: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:03: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:03: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:03: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:03: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_rn24.tdf -Thu 15:03: INFO : Info (12023): Found entity 1: altsyncram_rn24 -Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram_rn24" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|Photon_11_64_AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:node_id16175_noderam|AlteraBlockMem_RAM_TWO_PORT_64x2048_RAM_TWO_PORT_da_64_ireg_oreg_en_readfirst:cg_bram0|altsyncram:inst_ln61_mwblockmem|altsyncram_rn24:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id16178_nodecounterv1" -Thu 15:04: INFO : Info (12128): Elaborating entity "SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|StateMachineEntity_SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id16178_nodecounterv1|SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:inst_ln165_statemachineentitycore" -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvCacheKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:04: INFO : Info (12128): Elaborating entity "OutputRegisterEntity_48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|OutputRegisterEntity_48:node_id16181current_run_cycle_count_reg" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|SpmvCacheKernel:SpmvCacheKernel_core|MaxDCFixed_EQ_48_0_UNSIGNED_48_0_UNSIGNED_growbits_pipe1:node_id16187_nodeeq" -Thu 15:04: INFO : Info (12128): Elaborating entity "MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block" -Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock" -Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock7" -Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock10" -Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register_readable:inst_ln484_mappedregblock1" -Thu 15:04: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register_readable:inst_ln484_mappedregblock14" -Thu 15:04: INFO : Info (12128): Elaborating entity "dff_ce_syncsr_ne" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|dff_ce_syncsr_ne:inst_ln44_alteraflipflops" -Thu 15:04: INFO : Info (12128): Elaborating entity "PhotonDesignControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|PhotonDesignControl:control_sm" -Thu 15:04: INFO : Info (12128): Elaborating entity "FillLevelCounter_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_0:ce_fill_0_0_pdc0" -Thu 15:04: INFO : Info (12128): Elaborating entity "FillLevelCounter_1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_1:ce_fill_0_1_pdc0" -Thu 15:04: INFO : Info (12128): Elaborating entity "FlushLevelCounter_2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_2:ce_flush_0_2_pdc0" -Thu 15:04: INFO : Info (12128): Elaborating entity "level_synchroniser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|level_synchroniser:inst_ln11_synchroniser" -Thu 15:04: INFO : Info (12128): Elaborating entity "level_synchroniser_prim" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|level_synchroniser:inst_ln11_synchroniser|level_synchroniser_prim:\g_wide:0:g_width1:sync_level_src" -Thu 15:04: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_SpmvKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel" -Thu 15:04: INFO : Info (12128): Elaborating entity "SpmvKernel_streamwrapper" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock" -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_streamwrapper.vhdl(457): object "spmvkernel_core_output_output_control" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_streamwrapper.vhdl(474): object "control_sm_pcc_finished" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_streamwrapper.vhdl(486): object "control_sm_next_flush_level" assigned a value but never read -Thu 15:04: INFO : Info (12128): Elaborating entity "SpmvKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core" -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(508): object "node_id538_nodecounterv1_wrap" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(549): object "node_id320_nodedivmod_quotient" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(656): object "node_id474_nodecounterv1_wrap" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(675): object "node_id410_nodecounterv1_wrap" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(694): object "node_id346_nodecounterv1_wrap" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(981): object "node_id614_nodecounterv1_wrap" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel.vhdl(988): object "node_id620_nodecounterv1_wrap" assigned a value but never read -Thu 15:04: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x80" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0" -Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:04: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_input_a" = "NORMAL" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_input_b" = "NORMAL" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_output_a" = "NORMAL" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_output_b" = "NORMAL" -Thu 15:04: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:04: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:04: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:04: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:04: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "init_file" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:04: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:04: INFO : Info (12134): Parameter "numwords_a" = "128" -Thu 15:04: INFO : Info (12134): Parameter "numwords_b" = "128" -Thu 15:04: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:04: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:04: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:04: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA" -Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:04: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:04: INFO : Info (12134): Parameter "width_a" = "1" -Thu 15:04: INFO : Info (12134): Parameter "width_b" = "1" -Thu 15:04: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:04: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:04: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:04: INFO : Info (12134): Parameter "widthad_a" = "7" -Thu 15:04: INFO : Info (12134): Parameter "widthad_b" = "7" -Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_de24.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: altsyncram_de24 -Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram_de24" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x80:node_id626_nodefifo|MWBlockRAMDelay_1x78_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0|altsyncram_de24:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "MultiStageDelay_1x40" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0" -Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:04: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_input_a" = "NORMAL" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_input_b" = "NORMAL" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_output_a" = "NORMAL" -Thu 15:04: INFO : Info (12134): Parameter "clock_enable_output_b" = "NORMAL" -Thu 15:04: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:04: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:04: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:04: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:04: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "init_file" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:04: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:04: INFO : Info (12134): Parameter "numwords_a" = "64" -Thu 15:04: INFO : Info (12134): Parameter "numwords_b" = "64" -Thu 15:04: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:04: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:04: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:04: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA" -Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:04: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:04: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:04: INFO : Info (12134): Parameter "width_a" = "1" -Thu 15:04: INFO : Info (12134): Parameter "width_b" = "1" -Thu 15:04: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:04: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:04: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:04: INFO : Info (12134): Parameter "widthad_a" = "6" -Thu 15:04: INFO : Info (12134): Parameter "widthad_b" = "6" -Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:04: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_9b24.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: altsyncram_9b24 -Thu 15:04: INFO : Info (12128): Elaborating entity "altsyncram_9b24" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_1x40:node_id694_nodefifo|MWBlockRAMDelay_1x38_maxWidth288_fixed_0regs_IN_BRAM_ONLY:BRAMDelay0|altsyncram:mw_bm0|altsyncram_9b24:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id538_nodecounterv1" -Thu 15:04: INFO : Info (12128): Elaborating entity "SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|StateMachineEntity_SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id538_nodecounterv1|SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:inst_ln165_statemachineentitycore" -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_EQ_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id547_nodeeq" -Thu 15:04: INFO : Info (12128): Elaborating entity "Pulse_cycles1_initF" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|Pulse_cycles1_initF:node_id540_nodepulse" -Thu 15:04: INFO : Info (12128): Elaborating entity "InputRegisterEntity2013_32" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|InputRegisterEntity2013_32:node_id314_nodeinput_cyclecountercyclecounter_data0_reg" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_ADD_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1:node_id318_nodeadd" -Thu 15:04: INFO : Info (12128): Elaborating entity "MultiStageDelay_32x16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo" -Thu 15:04: INFO : Info (12128): Elaborating entity "SRLDelay_32x16_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay" -Thu 15:04: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedCast_6_0_UNSIGNED_32_0_UNSIGNED_TONEAR_pipe:node_id321_nodecast" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_SUB_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_pipe1:node_id322_nodesub" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv" -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18.vhdl(88): object "inst_ln37_maxdcunsigneddiv_round_bit" assigned a value but never read -Thu 15:04: INFO : Warning (10036): Verilog HDL or VHDL warning at MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18.vhdl(89): object "inst_ln37_maxdcunsigneddiv_sticky_bit" assigned a value but never read -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv" -Thu 15:04: INFO : Info (12128): Elaborating entity "ConditionalAddSubtract" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|ConditionalAddSubtract:inst_ln20_condaddsub" -Thu 15:04: INFO : Info (12128): Elaborating entity "ConditionalAddSubtract" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|ConditionalAddSubtract:inst_ln20_condaddsub1" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_EQ_6_0_UNSIGNED_6_0_UNSIGNED_growbits_pipe1:node_id326_nodeeq" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe:node_id624_nodecondadd" -Thu 15:04: INFO : Info (12128): Elaborating entity "ConditionalAdd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCCondAdd_32_0_UNSIGNED_32_0_UNSIGNED_nogrowbits_condBi_pipe:node_id624_nodecondadd|ConditionalAdd:inst_ln19_condadd" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_GT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id338_nodegt" -Thu 15:04: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_32_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|PhotonMUX_1_2_32_pipe:node_id342_nodemux" -Thu 15:04: INFO : Info (12128): Elaborating entity "MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_GTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id343_nodegte" -Thu 15:04: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_1_nopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|PhotonMUX_1_2_1_nopipe:node_id402_nodemux" -Thu 15:04: INFO : Info (12128): Elaborating entity "PhotonBitwiseOp_1_Ornopipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|PhotonBitwiseOp_1_Ornopipe:node_id359_nodeor" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_add_adder" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_add_adder" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_add_adder" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_esi.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_esi -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_esi" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_add_adder|add_sub_esi:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_adj_adder" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_adj_adder" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_adj_adder" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "13" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_9vg.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_9vg -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_9vg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_adj_adder|add_sub_9vg:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_bias_subtr" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_bias_subtr" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_bias_subtr" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "SUB" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "UNSIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "13" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_neg.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_neg -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_neg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:exp_bias_subtr|add_sub_neg:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:man_round_adder" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:man_round_adder" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:man_round_adder" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "54" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_kkg.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_kkg -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_kkg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_add_sub:man_round_adder|add_sub_kkg:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_mult" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_mult:man_product2_mult" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_mult:man_product2_mult" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_mult:man_product2_mult" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "5" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "UNSIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTHA" = "53" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTHB" = "53" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTHP" = "106" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTHS" = "1" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "DEDICATED_MULTIPLIER_CIRCUITRY=YES" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_mult" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/mult_o0t.v -Thu 15:04: INFO : Info (12023): Found entity 1: mult_o0t -Thu 15:04: INFO : Info (12128): Elaborating entity "mult_o0t" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|lpm_mult:man_product2_mult|mult_o0t:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "MultiStageDelay_64x10" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x10:node_id676_nodefifo" -Thu 15:04: INFO : Info (12128): Elaborating entity "SRLDelay_64x10_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x10:node_id676_nodefifo|SRLDelay_64x10_reg1:SRLDelay" -Thu 15:04: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x10:node_id676_nodefifo|SRLDelay_64x10_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_qud" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_qud:lbarrel_shift" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_ffb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altbarrel_shift_ffb:rbarrel_shift" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8:altpriority_encoder11" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8:altpriority_encoder11|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8:altpriority_encoder13" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3e8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_be8:altpriority_encoder11|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6e8:altpriority_encoder13|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3e8:altpriority_encoder15" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08:altpriority_encoder9" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7:altpriority_encoder19" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3v7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_6v7:altpriority_encoder19|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_3v7:altpriority_encoder21" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_te9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_te9:altpriority_encoder8" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8:altpriority_encoder31" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_nh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_ej8:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_qh8:altpriority_encoder31|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_nh8:altpriority_encoder33" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48:altpriority_encoder36" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28:altpriority_encoder38" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28:altpriority_encoder38|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28:altpriority_encoder40" -Thu 15:04: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_n28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_k48:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_e48:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_v28:altpriority_encoder38|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_q28:altpriority_encoder40|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altpriority_encoder_n28:altpriority_encoder42" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub1" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub1" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub1" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "SUB" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_p4i.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_p4i -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_p4i" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub1|add_sub_p4i:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub2" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub2" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub2" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "SUB" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub3" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub3" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub3" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "SUB" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "7" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_76g.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_76g -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_76g" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub3|add_sub_76g:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub4" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub4" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub4" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_i6g.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_i6g -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_i6g" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub4|add_sub_i6g:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub5" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub5" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub5" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_o3i.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_o3i -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_o3i" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub5|add_sub_o3i:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub6" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub6" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:add_sub6" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "12" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_lower" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_lower" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_lower" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "29" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_33k.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_33k -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_33k" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_lower|add_sub_33k:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper0" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper0" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper0" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_7kj.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_7kj -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_7kj" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper0|add_sub_7kj:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper1" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper1" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_2comp_res_upper1" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper0" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper0" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper0" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper1" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper1" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_add_sub_upper1" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "DEFAULT" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "1" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_lower" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_lower" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_lower" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "28" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_klg.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_klg -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_klg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_lower|add_sub_klg:auto_generated" -Thu 15:04: INFO : Info (12128): Elaborating entity "lpm_add_sub" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_upper1" -Thu 15:04: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_upper1" -Thu 15:04: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_upper1" with the following parameter: -Thu 15:04: INFO : Info (12134): Parameter "LPM_DIRECTION" = "ADD" -Thu 15:04: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:04: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:04: INFO : Info (12134): Parameter "LPM_WIDTH" = "27" -Thu 15:04: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:04: INFO : Info (12134): Parameter "lpm_type" = "lpm_add_sub" -Thu 15:04: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/add_sub_stg.tdf -Thu 15:04: INFO : Info (12023): Found entity 1: add_sub_stg -Thu 15:04: INFO : Info (12128): Elaborating entity "add_sub_stg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_add_sub:man_res_rounding_add_sub_upper1|add_sub_stg:auto_generated" -Thu 15:06: INFO : Info (12128): Elaborating entity "lpm_compare" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_compare:trailing_zeros_limit_comparator" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_compare:trailing_zeros_limit_comparator" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_compare:trailing_zeros_limit_comparator" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "LPM_PIPELINE" = "0" -Thu 15:06: INFO : Info (12134): Parameter "LPM_REPRESENTATION" = "SIGNED" -Thu 15:06: INFO : Info (12134): Parameter "LPM_WIDTH" = "7" -Thu 15:06: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "lpm_compare" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_skh.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: cmpr_skh -Thu 15:06: INFO : Info (12128): Elaborating entity "cmpr_skh" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|lpm_compare:trailing_zeros_limit_comparator|cmpr_skh:auto_generated" -Thu 15:06: INFO : Info (12128): Elaborating entity "MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixed_LT_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id332_nodelt" -Thu 15:06: INFO : Info (12128): Elaborating entity "MultiStageDelay_64x5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo" -Thu 15:06: INFO : Info (12128): Elaborating entity "SRLDelay_64x5_reg1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay" -Thu 15:06: INFO : Info (12128): Elaborating entity "SimpleSR" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay" -Thu 15:06: INFO : Info (12128): Elaborating entity "PhotonMUX_1_2_64_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|PhotonMUX_1_2_64_pipe:node_id334_nodemux" -Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id614_nodecounterv1" -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|StateMachineEntity_SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id614_nodecounterv1|SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:inst_ln165_statemachineentitycore" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d:mapped_reg_block" -Thu 15:06: INFO : Info (12128): Elaborating entity "PhotonDesignControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|PhotonDesignControl:control_sm" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_3" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_3:ce_fill_0_0_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_4" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_4:ce_fill_0_1_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_5:ce_fill_0_2_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_6" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_6:ce_fill_0_3_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_7:ce_fill_0_4_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_8:ce_fill_0_5_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_9:ce_fill_0_6_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_10" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_10:ce_fill_0_7_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_11" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_11:ce_flush_0_8_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_12" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_12:ce_flush_0_9_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_13" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_13:ce_flush_0_10_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_14" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_14:ce_flush_0_11_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_15" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_15:ce_flush_0_12_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem.vhdl(102): object "inst_ln31_streamingblock_clk_ctl" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Linear1DAddressGen_1_addrgen_cmd_cpu2lmem" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Linear1DAddressGen_1_addrgen_cmd_cpu2lmem.vhdl(133): object "inst_ln191_linear1daddressgen_pcc_finished" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock|MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613:mapped_registers" -Thu 15:06: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock|MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613:mapped_registers|mapped_register:inst_ln504_mappedregblock" -Thu 15:06: INFO : Info (12128): Elaborating entity "mapped_register" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock|MappedRegBlock_dceee9e4b3fe0ccb63a4047a6ec7e613:mapped_registers|mapped_register:inst_ln504_mappedregblock2" -Thu 15:06: INFO : Info (12128): Elaborating entity "Linear1DAddressGen" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_cpu2lmem:addrgen_cmd_cpu2lmem|Linear1DAddressGen_1_addrgen_cmd_cpu2lmem:inst_ln31_streamingblock|Linear1DAddressGen:inst_ln191_linear1daddressgen" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_cmd_cpu2lmem_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_cmd_cpu2lmem_0:cmd_cpu2lmem_0" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_cpu2lmem" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_cpu2lmem:cpu2lmem" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_fromcpu" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_fromcpu:fromcpu" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr:addrgen_cmd_indptr" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr.vhdl(102): object "inst_ln31_streamingblock_clk_ctl" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Linear1DAddressGen_1_addrgen_cmd_indptr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr:addrgen_cmd_indptr|Linear1DAddressGen_1_addrgen_cmd_indptr:inst_ln31_streamingblock" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Linear1DAddressGen_1_addrgen_cmd_indptr.vhdl(133): object "inst_ln191_linear1daddressgen_pcc_finished" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_indptr:addrgen_cmd_indptr|Linear1DAddressGen_1_addrgen_cmd_indptr:inst_ln31_streamingblock|MappedRegBlock_51702aa263d2fc8ddf256052c3a1b510:mapped_registers" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_cmd_indptr_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_cmd_indptr_0:cmd_indptr_0" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_indptr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_indptr:indptr" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values:addrgen_cmd_values" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values.vhdl(102): object "inst_ln31_streamingblock_clk_ctl" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Linear1DAddressGen_1_addrgen_cmd_values" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values:addrgen_cmd_values|Linear1DAddressGen_1_addrgen_cmd_values:inst_ln31_streamingblock" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Linear1DAddressGen_1_addrgen_cmd_values.vhdl(133): object "inst_ln191_linear1daddressgen_pcc_finished" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_62befbd42223e4c6f7557ca75e01e116" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_addrgen_cmd_values:addrgen_cmd_values|Linear1DAddressGen_1_addrgen_cmd_values:inst_ln31_streamingblock|MappedRegBlock_62befbd42223e4c6f7557ca75e01e116:mapped_registers" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_cmd_values_0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_cmd_values_0:cmd_values_0" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_values" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_values:values" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_vromLoad" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_vromLoad:vromLoad" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel" -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel_streamwrapper" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_streamwrapper.vhdl(258): object "spmvreductionkernel_core_reductionout_output_control" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_streamwrapper.vhdl(271): object "control_sm_pcc_finished" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_streamwrapper.vhdl(283): object "control_sm_next_flush_level" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel.vhdl(258): object "node_id7_nodecounterv1_wrap" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel.vhdl(288): object "node_id28_nodecounterv1_wrap" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel.vhdl(295): object "node_id34_nodecounterv1_wrap" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id7_nodecounterv1" -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id7_nodecounterv1|SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:inst_ln165_statemachineentitycore" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MaxDCFixed_LTE_32_0_UNSIGNED_32_0_UNSIGNED_growbits_pipe1:node_id18_nodelte" -Thu 15:06: INFO : Info (12128): Elaborating entity "MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MaxDCFixedCast_32_0_UNSIGNED_32_0_TWOSCOMPLEMENT_TONEAR_pipe:node_id12_nodecast" -Thu 15:06: INFO : Info (12128): Elaborating entity "MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MaxDCFixed_NEG_32_0_TWOSCOMPLEMENT_nogrowbits_pipe1:node_id13_nodeneg" -Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvReductionKernel_dynamic_offset16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at StateMachineEntity_SpmvReductionKernel_dynamic_offset16.vhdl(109): object "inst_ln165_statemachineentitycore_ram0_data_in1" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at StateMachineEntity_SpmvReductionKernel_dynamic_offset16.vhdl(111): object "inst_ln165_statemachineentitycore_ram0_write_enable1" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel_dynamic_offset16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|SpmvReductionKernel_dynamic_offset16:inst_ln165_statemachineentitycore" -Thu 15:06: INFO : Warning (10541): VHDL Signal Declaration warning at SpmvReductionKernel_dynamic_offset16.vhdl(15): used implicit default value for signal "ram0_data_in1" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. -Thu 15:06: INFO : Warning (10541): VHDL Signal Declaration warning at SpmvReductionKernel_dynamic_offset16.vhdl(17): used implicit default value for signal "ram0_write_enable1" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations. -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_dynamic_offset16.vhdl(259): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_dynamic_offset16.vhdl(260): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem" -Thu 15:06: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0" -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:06: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:06: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:06: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:06: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:06: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:06: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:06: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:06: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:06: INFO : Info (12134): Parameter "clock_enable_input_a" = "NORMAL" -Thu 15:06: INFO : Info (12134): Parameter "clock_enable_input_b" = "NORMAL" -Thu 15:06: INFO : Info (12134): Parameter "clock_enable_output_a" = "NORMAL" -Thu 15:06: INFO : Info (12134): Parameter "clock_enable_output_b" = "NORMAL" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:06: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:06: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:06: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:06: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:06: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:06: INFO : Info (12134): Parameter "init_file" = "UNUSED" -Thu 15:06: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:06: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:06: INFO : Info (12134): Parameter "numwords_a" = "32768" -Thu 15:06: INFO : Info (12134): Parameter "numwords_b" = "32768" -Thu 15:06: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:06: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:06: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:06: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" -Thu 15:06: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" -Thu 15:06: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:06: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:06: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:06: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:06: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:06: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:06: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:06: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "width_a" = "64" -Thu 15:06: INFO : Info (12134): Parameter "width_b" = "64" -Thu 15:06: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:06: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:06: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:06: INFO : Info (12134): Parameter "widthad_a" = "15" -Thu 15:06: INFO : Info (12134): Parameter "widthad_b" = "15" -Thu 15:06: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:06: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:06: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:06: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_iv24.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_iv24 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_iv24" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem|altsyncram_iv24:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/decode_7ma.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: decode_7ma -Thu 15:06: INFO : Info (12128): Elaborating entity "decode_7ma" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem|altsyncram_iv24:auto_generated|decode_7ma:decode2" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/mux_9ib.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: mux_9ib -Thu 15:06: INFO : Info (12128): Elaborating entity "mux_9ib" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_dynamic_offset16:node_id16_nodedynamicstreamoffset|Photon_15_64_AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:inst_ln14_photonblockmem|AlteraBlockMem_RAM_TWO_PORT_64x32768_RAM_TWO_PORT_da_64_ireg_oreg_en:cg_bram0|altsyncram:inst_ln61_mwblockmem|altsyncram_iv24:auto_generated|mux_9ib:mux3" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_qud" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_qud:lbarrel_shift" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_02g" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altbarrel_shift_02g:rbarrel_shift" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8:altpriority_encoder11" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8:altpriority_encoder11|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8:altpriority_encoder13" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3e8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_rf8:altpriority_encoder10|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_be8:altpriority_encoder11|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6e8:altpriority_encoder13|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3e8:altpriority_encoder15" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08:altpriority_encoder9" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7:altpriority_encoder19" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3v7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_tv8:altpriority_encoder7|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_r08:altpriority_encoder9|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_bv7:altpriority_encoder17|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_6v7:altpriority_encoder19|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_3v7:altpriority_encoder21" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_te9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_uu8:leading_zeroes_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_te9:altpriority_encoder8" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8:altpriority_encoder31" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_nh8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_hi9:altpriority_encoder25|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_fj8:altpriority_encoder27|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_vh8:altpriority_encoder29|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_qh8:altpriority_encoder31|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_nh8:altpriority_encoder33" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48:altpriority_encoder36" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28:altpriority_encoder38" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28:altpriority_encoder38|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28:altpriority_encoder40" -Thu 15:06: INFO : Info (12128): Elaborating entity "MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_n28" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_ina:trailing_zeros_cnt|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_h39:altpriority_encoder26|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_f48:altpriority_encoder36|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_v28:altpriority_encoder38|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_q28:altpriority_encoder40|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altpriority_encoder_n28:altpriority_encoder42" -Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id28_nodecounterv1" -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|StateMachineEntity_SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id28_nodecounterv1|SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:inst_ln165_statemachineentitycore" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvReductionKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_ee38d306568098454952bd3e86e61f39" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_ee38d306568098454952bd3e86e61f39:mapped_reg_block" -Thu 15:06: INFO : Info (12128): Elaborating entity "PhotonDesignControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|PhotonDesignControl:control_sm" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_16" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_16:ce_fill_0_0_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_17" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_17:ce_flush_0_1_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel" -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvPaddingKernel_streamwrapper" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_streamwrapper.vhdl(269): object "spmvpaddingkernel_core_paddingout_output_control" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_streamwrapper.vhdl(281): object "control_sm_pcc_finished" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_streamwrapper.vhdl(293): object "control_sm_next_flush_level" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvPaddingKernel" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel.vhdl(206): object "node_id3_nodecounterv1_wrap" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel.vhdl(226): object "node_id25_nodecounterv1_wrap" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel.vhdl(233): object "node_id31_nodecounterv1_wrap" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core|StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id3_nodecounterv1" -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core|StateMachineEntity_SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:node_id3_nodecounterv1|SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33:inst_ln165_statemachineentitycore" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_Counter_32_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_33.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core|StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id25_nodecounterv1" -Thu 15:06: INFO : Info (12128): Elaborating entity "SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|SpmvPaddingKernel:SpmvPaddingKernel_core|StateMachineEntity_SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:node_id25_nodecounterv1|SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49:inst_ln165_statemachineentitycore" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(258): object "dummy_sensitivity_signal_output_function" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at SpmvPaddingKernel_Counter_48_NUMERIC_INCREMENTING_1_0_0_false_COUNT_LT_MAX_THEN_WRAP_49.vhdl(259): object "dummy_sensitivity_signal_nextstate_function" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_b1a4b0dc8ecec6f6934a424e531b3bde:mapped_reg_block" -Thu 15:06: INFO : Info (12128): Elaborating entity "PhotonDesignControl" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|PhotonDesignControl:control_sm" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_18" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_18:ce_fill_0_0_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FillLevelCounter_19" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|FillLevelCounter_19:ce_fill_0_1_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "FlushLevelCounter_20" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvPaddingKernel:SpmvPaddingKernel|SpmvPaddingKernel_streamwrapper:inst_ln31_streamingblock|FlushLevelCounter_20:ce_flush_0_2_pdc0" -Thu 15:06: INFO : Info (12128): Elaborating entity "WrapperNodeIO_output" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|WrapperNodeIO_output:output" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1" -Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectMux_128_32_COUNTER_PIPELINED" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1|DualAspectMux_128_32_COUNTER_PIPELINED:inst_ln31_streamingblock" -Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectCounterPipelined_32_128" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1|DualAspectMux_128_32_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_32_128:inst_ln31_dualaspectcounterpipelined" -Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_counter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1|DualAspectMux_128_32_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_32_128:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_counter:inst_ln228_dualaspectcounterpipelined" -Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_mux4" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_1:Stream_1|DualAspectMux_128_32_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_32_128:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_mux4:inst_ln196_dualaspectcounterpipelined" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_14" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_14:Stream_14" -Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectReg_128_3072" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_14:Stream_14|DualAspectReg_128_3072:inst_ln31_streamingblock" -Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectreg_int" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_14:Stream_14|DualAspectReg_128_3072:inst_ln31_streamingblock|dualaspectreg_int:inst_ln126_dualaspectreg" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_31" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31" -Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectMux_128_64_COUNTER_PIPELINED" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31|DualAspectMux_128_64_COUNTER_PIPELINED:inst_ln31_streamingblock" -Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectCounterPipelined_64_128" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31|DualAspectMux_128_64_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_64_128:inst_ln31_dualaspectcounterpipelined" -Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_counter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31|DualAspectMux_128_64_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_64_128:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_counter:inst_ln228_dualaspectcounterpipelined" -Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_mux2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_31:Stream_31|DualAspectMux_128_64_COUNTER_PIPELINED:inst_ln31_streamingblock|DualAspectCounterPipelined_64_128:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_mux2:inst_ln196_dualaspectcounterpipelined" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_17" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_17:Stream_17" -Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_17:Stream_17|DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED:inst_ln31_streamingblock" -Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectCounterPipelined_1536_3072" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_17:Stream_17|DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED:inst_ln31_streamingblock|DualAspectCounterPipelined_1536_3072:inst_ln31_dualaspectcounterpipelined" -Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectmuxpipe_mux2" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_17:Stream_17|DualAspectMux_3072_1536_COUNTER_PIPELINED_LIMITED:inst_ln31_streamingblock|DualAspectCounterPipelined_1536_3072:inst_ln31_dualaspectcounterpipelined|dualaspectmuxpipe_mux2:inst_ln196_dualaspectcounterpipelined" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_61" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_61:Stream_61" -Thu 15:06: INFO : Info (12128): Elaborating entity "DualAspectReg_64_128" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_61:Stream_61|DualAspectReg_64_128:inst_ln31_streamingblock" -Thu 15:06: INFO : Info (12128): Elaborating entity "dualaspectreg_int" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_61:Stream_61|DualAspectReg_64_128:inst_ln31_streamingblock|dualaspectreg_int:inst_ln126_dualaspectreg" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_70" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_70:Stream_70" -Thu 15:06: INFO : Info (12128): Elaborating entity "StreamPullPushAdapter3072" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_70:Stream_70|StreamPullPushAdapter3072:inst_ln31_streamingblock" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_64" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_64.vhdl(115): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "128" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "478" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_nvd1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_nvd1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_nvd1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_6hb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_6hb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_6hb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_s7f.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_fefifo_s7f -Thu 15:06: INFO : Info (12128): Elaborating entity "a_fefifo_s7f" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|a_fefifo_s7f:fifo_state" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_4i7.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: cntr_4i7 -Thu 15:06: INFO : Info (12128): Elaborating entity "cntr_4i7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|a_fefifo_s7f:fifo_state|cntr_4i7:count_usedw" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_4ob1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dpram_4ob1 -Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_4ob1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|dpram_4ob1:FIFOram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_muu1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_muu1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_muu1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|dpram_4ob1:FIFOram|altsyncram_muu1:altsyncram1" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ohb.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: cntr_ohb -Thu 15:06: INFO : Info (12128): Elaborating entity "cntr_ohb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_64:Stream_64|scfifo:mw_fifo|scfifo_nvd1:auto_generated|a_dpfifo_6hb1:dpfifo|cntr_ohb:rd_ptr_count" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_68" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_68.vhdl(122): object "mw_fifo_wrfull" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "128" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:06: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:06: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:06: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:06: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_7552.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dcfifo_7552 -Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo_7552" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_qbb.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_gray2bin_qbb -Thu 15:06: INFO : Info (12128): Elaborating entity "a_gray2bin_qbb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|a_gray2bin_qbb:wrptr_g_gray2bin" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ebe1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_ebe1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_ebe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|altsyncram_ebe1:fifo_ram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_uld.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_uld -Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_uld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|alt_synch_pipe_uld:rs_dgwp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_te9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_te9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_te9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|alt_synch_pipe_uld:rs_dgwp|dffpipe_te9:dffpipe6" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_oe9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_oe9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_oe9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|dffpipe_oe9:ws_brp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_vld.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_vld -Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_vld" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|alt_synch_pipe_vld:ws_dgrp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ue9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_ue9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_ue9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_68:Stream_68|dcfifo:mw_fifo|dcfifo_7552:auto_generated|alt_synch_pipe_vld:ws_dgrp|dffpipe_ue9:dffpipe10" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_72" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_72:Stream_72" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_72.vhdl(115): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_66" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_66.vhdl(124): object "mw_fifo_wrfull" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "32" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:06: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:06: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:06: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:06: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_pq52.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dcfifo_pq52 -Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo_pq52" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_28e1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_28e1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_28e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|altsyncram_28e1:fifo_ram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_0md.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_0md -Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_0md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|alt_synch_pipe_0md:rs_dgwp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ve9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_ve9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_ve9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|alt_synch_pipe_0md:rs_dgwp|dffpipe_ve9:dffpipe6" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_1md.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_1md -Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_1md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|alt_synch_pipe_1md:ws_dgrp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_0f9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_0f9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_0f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_66:Stream_66|dcfifo:mw_fifo|dcfifo_pq52:auto_generated|alt_synch_pipe_1md:ws_dgrp|dffpipe_0f9:dffpipe9" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_5.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "32" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "479" -Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "3" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_a9h1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_a9h1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_a9h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo|scfifo_a9h1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_gfb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_gfb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_gfb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo|scfifo_a9h1:auto_generated|a_dpfifo_gfb1:dpfifo" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_emb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dpram_emb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_emb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo|scfifo_a9h1:auto_generated|a_dpfifo_gfb1:dpfifo|dpram_emb1:FIFOram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_4ou1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_4ou1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_4ou1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_5:Stream_5|scfifo:mw_fifo|scfifo_a9h1:auto_generated|a_dpfifo_gfb1:dpfifo|dpram_emb1:FIFOram|altsyncram_4ou1:altsyncram1" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_38" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_38.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "2" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "479" -Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_o7h1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_o7h1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_o7h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_tdb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_tdb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_tdb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_rkb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dpram_rkb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_rkb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_oku1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_oku1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_oku1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_74" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_74.vhdl(124): object "mw_fifo_wrfull" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "64" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:06: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:06: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:06: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:06: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_3r52.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dcfifo_3r52 -Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo_3r52" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_c8e1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_c8e1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_c8e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|altsyncram_c8e1:fifo_ram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_2md.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_2md -Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_2md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|alt_synch_pipe_2md:rs_dgwp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_1f9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_1f9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_1f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|alt_synch_pipe_2md:rs_dgwp|dffpipe_1f9:dffpipe6" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_3md.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_3md -Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_3md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|alt_synch_pipe_3md:ws_dgrp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_2f9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_2f9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_2f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_74:Stream_74|dcfifo:mw_fifo|dcfifo_3r52:auto_generated|alt_synch_pipe_3md:ws_dgrp|dffpipe_2f9:dffpipe9" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_34" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_34:Stream_34" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_34.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_36" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_36.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "48" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "479" -Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_i9h1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_i9h1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_i9h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo|scfifo_i9h1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_nfb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_nfb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_nfb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo|scfifo_i9h1:auto_generated|a_dpfifo_nfb1:dpfifo" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_lmb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dpram_lmb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_lmb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo|scfifo_i9h1:auto_generated|a_dpfifo_nfb1:dpfifo|dpram_lmb1:FIFOram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_mou1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_mou1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_mou1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_36:Stream_36|scfifo:mw_fifo|scfifo_i9h1:auto_generated|a_dpfifo_nfb1:dpfifo|dpram_lmb1:FIFOram|altsyncram_mou1:altsyncram1" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_78" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_78.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "1536" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "478" -Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_kch1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_kch1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_kch1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_qib1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_qib1 -Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_qib1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_opb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dpram_opb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_opb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_85v1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_85v1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_85v1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_40" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_40.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "2" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "475" -Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_k7h1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_k7h1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_k7h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo|scfifo_k7h1:auto_generated" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_44" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_44.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "3072" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "475" -Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_ech1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_ech1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_ech1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo|scfifo_ech1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_nib1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_nib1 -Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_nib1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo|scfifo_ech1:auto_generated|a_dpfifo_nib1:dpfifo" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_lpb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dpram_lpb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_lpb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo|scfifo_ech1:auto_generated|a_dpfifo_nib1:dpfifo|dpram_lpb1:FIFOram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_95v1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_95v1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_95v1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_44:Stream_44|scfifo:mw_fifo|scfifo_ech1:auto_generated|a_dpfifo_nib1:dpfifo|dpram_lpb1:FIFOram|altsyncram_95v1:altsyncram1" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_42" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_42:Stream_42" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_42.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_48" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_48:Stream_48" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_48.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_46" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_46.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "32" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "479" -Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_b9h1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_b9h1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_b9h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_46:Stream_46|scfifo:mw_fifo|scfifo_b9h1:auto_generated" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_50" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_50:Stream_50" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_50.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_52" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_52:Stream_52" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_52.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_55" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_55.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "64" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "475" -Thu 15:06: INFO : Info (12134): Parameter "almost_empty_value" = "4" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_c9h1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_c9h1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_c9h1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo|scfifo_c9h1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_lfb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_lfb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_lfb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo|scfifo_c9h1:auto_generated|a_dpfifo_lfb1:dpfifo" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_jmb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dpram_jmb1 -Thu 15:06: INFO : Info (12128): Elaborating entity "dpram_jmb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo|scfifo_c9h1:auto_generated|a_dpfifo_lfb1:dpfifo|dpram_jmb1:FIFOram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_nou1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_nou1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_nou1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_55:Stream_55|scfifo:mw_fifo|scfifo_c9h1:auto_generated|a_dpfifo_lfb1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1" -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_58" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_58:Stream_58" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_58.vhdl(118): object "mw_fifo_full" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "Manager_Spmv_WrapperNodeEntity_Stream_80" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at Manager_Spmv_WrapperNodeEntity_Stream_80.vhdl(122): object "mw_fifo_wrfull" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "64" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:06: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:06: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:06: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:06: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_5252.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dcfifo_5252 -Thu 15:06: INFO : Info (12128): Elaborating entity "dcfifo_5252" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_4md.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_4md -Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_4md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated|alt_synch_pipe_4md:rs_dgwp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_3f9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_3f9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_3f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated|alt_synch_pipe_4md:rs_dgwp|dffpipe_3f9:dffpipe5" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_5md.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: alt_synch_pipe_5md -Thu 15:06: INFO : Info (12128): Elaborating entity "alt_synch_pipe_5md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated|alt_synch_pipe_5md:ws_dgrp" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_4f9.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: dffpipe_4f9 -Thu 15:06: INFO : Info (12128): Elaborating entity "dffpipe_4f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_80:Stream_80|dcfifo:mw_fifo|dcfifo_5252:auto_generated|alt_synch_pipe_5md:ws_dgrp|dffpipe_4f9:dffpipe8" -Thu 15:06: INFO : Info (12128): Elaborating entity "PCIeStreaming_2_4" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(493): object "requestencoder_i_read_done" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(494): object "requestencoder_i_dma_read_req" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(495): object "requestencoder_i_dma_read_addr" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(496): object "requestencoder_i_dma_read_len" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(497): object "requestencoder_i_dma_read_be" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(498): object "requestencoder_i_dma_read_tag" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(499): object "requestencoder_i_dma_read_wide_addr" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(508): object "requestencoder_i_interrupt_ctl_valid" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(509): object "requestencoder_i_interrupt_ctl_enable_id" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(564): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_valid" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(565): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_addr" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(566): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_data" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(567): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_config_valid" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(568): object "slavestreamingbarparser_i_sth1_bufinfo_ring_info_config_invalid" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(569): object "slavestreamingbarparser_i_sth1_ring_info_stop" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(585): object "slavestreamingcreditsbarparser_i_sth1_host_cred_index" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(586): object "slavestreamingcreditsbarparser_i_sth1_host_cred_update" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(587): object "slavestreamingcreditsbarparser_i_sth1_host_cred_wrap" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeStreaming_2_4.vhdl(634): object "pcieslavestreamtohost0_compl_be" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MappedRegBlock_921618fecb8cf8badc2cf71cbe32b185:inst_ln130_mappedregblock" -Thu 15:06: INFO : Info (12128): Elaborating entity "ReadComplRequestArbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|ReadComplRequestArbiter:ReadComplRequestArbiter_i" -Thu 15:06: INFO : Info (12128): Elaborating entity "FastRequestArbiter_req1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|ReadComplRequestArbiter:ReadComplRequestArbiter_i|FastRequestArbiter_req1:internal_arbiter_i" -Thu 15:06: INFO : Info (12128): Elaborating entity "priority_encoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|ReadComplRequestArbiter:ReadComplRequestArbiter_i|FastRequestArbiter_req1:internal_arbiter_i|priority_encoder:pencoder" -Thu 15:06: INFO : Info (12128): Elaborating entity "fast_request_arbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|ReadComplRequestArbiter:ReadComplRequestArbiter_i|FastRequestArbiter_req1:internal_arbiter_i|fast_request_arbiter:fast_request_arbiter_i" -Thu 15:06: INFO : Info (12128): Elaborating entity "RequestEncoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i" -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at RequestEncoder.vhdl(167): object "wr_req_buffer_i_full" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at RequestEncoder.vhdl(170): object "wr_req_data_buffer_i_full" assigned a value but never read -Thu 15:06: INFO : Warning (10036): Verilog HDL or VHDL warning at RequestEncoder.vhdl(171): object "wr_req_data_buffer_i_empty" assigned a value but never read -Thu 15:06: INFO : Info (12128): Elaborating entity "write_request_encoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|write_request_encoder:inst_ln9_writerequestencoderexternal" -Thu 15:06: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_115_512_115_aclr_fwft" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i" -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "115" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_84b1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_84b1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_84b1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_fab1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_fab1 -Thu 15:06: INFO : Info (12128): Elaborating entity "a_dpfifo_fab1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_n8j1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: altsyncram_n8j1 -Thu 15:06: INFO : Info (12128): Elaborating entity "altsyncram_n8j1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_am8.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: cmpr_am8 -Thu 15:06: INFO : Info (12128): Elaborating entity "cmpr_am8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|cmpr_am8:almost_full_comparer" -Thu 15:06: INFO : Info (12128): Elaborating entity "cmpr_am8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|cmpr_am8:three_comparison" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_nhb.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: cntr_nhb -Thu 15:06: INFO : Info (12128): Elaborating entity "cntr_nhb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|cntr_nhb:rd_ptr_msb" -Thu 15:06: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_128_512_128_aclr_afv448" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i" -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo" -Thu 15:06: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo" -Thu 15:06: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:06: INFO : Info (12134): Parameter "lpm_width" = "128" -Thu 15:06: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:06: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:06: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:06: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:06: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:06: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:06: INFO : Info (12134): Parameter "almost_full_value" = "448" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_7ee1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: scfifo_7ee1 -Thu 15:06: INFO : Info (12128): Elaborating entity "scfifo_7ee1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_7ee1:auto_generated" -Thu 15:06: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_pvb1.tdf -Thu 15:06: INFO : Info (12023): Found entity 1: a_dpfifo_pvb1 -Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_pvb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_128_512_128_aclr_afv448:wr_req_data_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_7ee1:auto_generated|a_dpfifo_pvb1:dpfifo" -Thu 15:07: INFO : Info (12128): Elaborating entity "TagGenerator" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|TagGenerator:TagGenerator_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "MemWriteRequestArbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MemWriteRequestArbiter:MemWriteRequestArbiter_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "FastRequestArbiter_req5" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MemWriteRequestArbiter:MemWriteRequestArbiter_i|FastRequestArbiter_req5:internal_arbiter_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "priority_encoder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MemWriteRequestArbiter:MemWriteRequestArbiter_i|FastRequestArbiter_req5:internal_arbiter_i|priority_encoder:pencoder" -Thu 15:07: INFO : Info (12128): Elaborating entity "fast_request_arbiter" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|MemWriteRequestArbiter:MemWriteRequestArbiter_i|FastRequestArbiter_req5:internal_arbiter_i|fast_request_arbiter:fast_request_arbiter_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "SlaveStreamingRingConfigBarParser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|SlaveStreamingRingConfigBarParser:SlaveStreamingBarParser_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "SlaveStreamingCreditsBarParser" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|SlaveStreamingCreditsBarParser:SlaveStreamingCreditsBarParser_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "PCIeSlaveStreamFromHost" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0" -Thu 15:07: INFO : Info (12128): Elaborating entity "pcie_slave_streaming_sfh_ring" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring" -Thu 15:07: INFO : Info (12128): Elaborating entity "rg_buffer_info" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg" -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:07: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "init_file" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:07: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:07: INFO : Info (12134): Parameter "numwords_a" = "4" -Thu 15:07: INFO : Info (12134): Parameter "numwords_b" = "4" -Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" -Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:07: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:07: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "width_a" = "7" -Thu 15:07: INFO : Info (12134): Parameter "width_b" = "7" -Thu 15:07: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:07: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:07: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:07: INFO : Info (12134): Parameter "widthad_a" = "2" -Thu 15:07: INFO : Info (12134): Parameter "widthad_b" = "2" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_n034.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_n034 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_n034" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_info:rg_info|AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_7x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_n034:auto_generated" -Thu 15:07: INFO : Info (12128): Elaborating entity "rg_buffer_sfh" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg" -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:07: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "init_file" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:07: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:07: INFO : Info (12134): Parameter "numwords_a" = "512" -Thu 15:07: INFO : Info (12134): Parameter "numwords_b" = "512" -Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" -Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:07: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:07: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:07: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:07: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:07: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:07: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:07: INFO : Info (12134): Parameter "widthad_a" = "9" -Thu 15:07: INFO : Info (12134): Parameter "widthad_b" = "9" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_9a34.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_9a34 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_9a34" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated" -Thu 15:07: INFO : Info (12128): Elaborating entity "pcie_posted_credits_writer" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer" -Thu 15:07: INFO : Info (12128): Elaborating entity "posted_credits_fifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_3_16_3_aclr_fwft" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft" -Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "3" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "4" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "16" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_eva1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: scfifo_eva1 -Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo_eva1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_l5b1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_dpfifo_l5b1 -Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_l5b1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_3vi1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_3vi1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_3vi1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|altsyncram_3vi1:FIFOram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_5m8.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cmpr_5m8 -Thu 15:07: INFO : Info (12128): Elaborating entity "cmpr_5m8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cmpr_5m8:almost_full_comparer" -Thu 15:07: INFO : Info (12128): Elaborating entity "cmpr_5m8" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cmpr_5m8:three_comparison" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ihb.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cntr_ihb -Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_ihb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cntr_ihb:rd_ptr_msb" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_vh7.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cntr_vh7 -Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_vh7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cntr_vh7:usedw_counter" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_jhb.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cntr_jhb -Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_jhb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost0|pcie_posted_credits_writer:posted_credits_writer|posted_credits_fifo:posted_c_fifo|AlteraFifoEntity_3_16_3_aclr_fwft:wrapped_AlteraFifoEntity_3_16_3_aclr_fwft|scfifo:inst_ln38_mwfifo|scfifo_eva1:auto_generated|a_dpfifo_l5b1:dpfifo|cntr_jhb:wr_ptr" -Thu 15:07: INFO : Info (12128): Elaborating entity "PCIeSlaveStreamToHost" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeSlaveStreamToHost.vhdl(207): object "stream_ring_compl_fifo_underflow" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "pcie_slave_streaming_sth_ring" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring" -Thu 15:07: INFO : Info (12128): Elaborating entity "sth_compl_fifo_debug" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of" -Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "60" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "4" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "16" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "almost_full_value" = "14" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_36e1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: scfifo_36e1 -Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo_36e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_gpb1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_dpfifo_gpb1 -Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_gpb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_92j1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_92j1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_92j1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram" -Thu 15:07: INFO : Info (12128): Elaborating entity "rg_buffer_sth" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg" -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg|altsyncram:inst_ln100_mwblockmem" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg|altsyncram:inst_ln100_mwblockmem" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg|altsyncram:inst_ln100_mwblockmem" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:07: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "init_file" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:07: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:07: INFO : Info (12134): Parameter "numwords_a" = "128" -Thu 15:07: INFO : Info (12134): Parameter "numwords_b" = "128" -Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_a" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:07: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "width_a" = "128" -Thu 15:07: INFO : Info (12134): Parameter "width_b" = "128" -Thu 15:07: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:07: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:07: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:07: INFO : Info (12134): Parameter "widthad_a" = "7" -Thu 15:07: INFO : Info (12134): Parameter "widthad_b" = "7" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_d024.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_d024 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_d024" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_sth:\gen_buffers:0:buf_gen|AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg:wrapped_AlteraBlockMem_RAM_TWO_PORT_128x128_RAM_TWO_PORT_ireg_oreg|altsyncram:inst_ln100_mwblockmem|altsyncram_d024:auto_generated" -Thu 15:07: INFO : Info (12128): Elaborating entity "rg_buffer_info_sth" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg" -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "address_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "byteena_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK1" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "stratixv" -Thu 15:07: INFO : Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "enable_ecc" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "implement_in_les" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "indata_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "init_file" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "init_file_layout" = "PORT_A" -Thu 15:07: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:07: INFO : Info (12134): Parameter "numwords_a" = "4" -Thu 15:07: INFO : Info (12134): Parameter "numwords_b" = "4" -Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" -Thu 15:07: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:07: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:07: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:07: INFO : Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "width_a" = "8" -Thu 15:07: INFO : Info (12134): Parameter "width_b" = "8" -Thu 15:07: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:07: INFO : Info (12134): Parameter "width_byteena_b" = "1" -Thu 15:07: INFO : Info (12134): Parameter "width_eccstatus" = "3" -Thu 15:07: INFO : Info (12134): Parameter "widthad_a" = "2" -Thu 15:07: INFO : Info (12134): Parameter "widthad_b" = "2" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_aclr_b" = "NONE" -Thu 15:07: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_p034.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_p034 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_p034" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|rg_buffer_info_sth:g_info|AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_8x4_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_p034:auto_generated" -Thu 15:07: INFO : Info (12128): Elaborating entity "MappedElementAdapterForwarder" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedElementAdapterForwarder:MappedElementAdapterForwarder_pcie_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(487): object "inst_ln1948_memorycontrollerpro_memcmd_qempty" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(488): object "inst_ln1948_memorycontrollerpro_memcmd_tagcmd_working" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(500): object "inst_ln1948_memorycontrollerpro_rdstream_fifo_wrdata" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(514): object "inst_ln1948_memorycontrollerpro_debug_fifos" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(515): object "inst_ln1948_memorycontrollerpro_debug_q_fifos" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(516): object "inst_ln1948_memorycontrollerpro_debug_rd_cmds" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(517): object "inst_ln1948_memorycontrollerpro_debug_wr_cmds" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(518): object "inst_ln1948_memorycontrollerpro_debug_rd_data" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(519): object "inst_ln1948_memorycontrollerpro_debug_wr_data" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(525): object "inst_ln1948_memorycontrollerpro_perror_wr" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(526): object "inst_ln1948_memorycontrollerpro_perror_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(527): object "inst_ln1948_memorycontrollerpro_perror_data" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(528): object "inst_ln1948_memorycontrollerpro_perror_addr" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(529): object "inst_ln1948_memorycontrollerpro_perror_burstpos" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(530): object "inst_ln1948_memorycontrollerpro_perror_burstsize" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(531): object "inst_ln1948_memorycontrollerpro_perror_addr_word" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(532): object "inst_ln1948_memorycontrollerpro_perror_stream" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(533): object "inst_ln1948_memorycontrollerpro_perror_errors" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(534): object "inst_ln1948_memorycontrollerpro_debug_flagregister" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(535): object "inst_ln1948_memorycontrollerpro_debug_qhead" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(536): object "inst_ln1948_memorycontrollerpro_debug_nondatacmdcounters" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(537): object "inst_ln1948_memorycontrollerpro_debug_unknowncmdcounters" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(538): object "inst_ln1948_memorycontrollerpro_avl_debug_rddata" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(539): object "inst_ln1948_memorycontrollerpro_avl_debug_rdcmds" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(540): object "inst_ln1948_memorycontrollerpro_avl_debug_wrdata" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(541): object "inst_ln1948_memorycontrollerpro_avl_debug_wrcmds" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(556): object "wrtoram_wfifo_cmd_cmd_cpu2lmem_0_cpu2lmem_empty" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(557): object "wrtoram_wfifo_cmd_cmd_cpu2lmem_0_cpu2lmem_almost_empty" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(562): object "rdfromram_wfifo_cmd_cmd_indptr_0_indptr_stall" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72.vhdl(571): object "rdfromram_wfifo_cmd_cmd_values_0_values_stall" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae:mapped_registers" -Thu 15:07: INFO : Info (12128): Elaborating entity "mapped_register_readable" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MappedRegBlock_a37f5c8eafd24b6efc7299706c1278ae:mapped_registers|mapped_register_readable:inst_ln484_mappedregblock6" -Thu 15:07: INFO : Info (12128): Elaborating entity "MemCtrlPro_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro" -Thu 15:07: INFO : Info (12128): Elaborating entity "Async_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO" -Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" -Thu 15:07: INFO : Info (12128): Elaborating entity "Async_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:0:MIGCMD_FIFO" -Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:0:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" -Thu 15:07: INFO : Info (12128): Elaborating entity "Async_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:0:MIGDataRd_FIFO" -Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:0:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" -Thu 15:07: INFO : Info (12128): Elaborating entity "Sync_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO" -Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" -Thu 15:07: INFO : Info (12128): Elaborating entity "Sync_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO" -Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" -Thu 15:07: INFO : Info (12128): Elaborating entity "Async_FIFO_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:0:MIGDataWr_FIFO" -Thu 15:07: INFO : Info (12128): Elaborating entity "DualPortRAM_SyncRd_Altera" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:0:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM" -Thu 15:07: INFO : Info (12128): Elaborating entity "DDRAddressBitSwap8GBOpt" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|DDRAddressBitSwap8GBOpt:BitSwapClass" -Thu 15:07: INFO : Info (12128): Elaborating entity "WideFifoWithLevel_3072_512_16_16_false_792_FROM" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(117): object "fifo_0_full" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(119): object "fifo_0_wr_data_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(123): object "fifo_1_full" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(125): object "fifo_1_wr_data_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(127): object "fifo_1_rd_data_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(129): object "fifo_2_full" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(131): object "fifo_2_wr_data_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(133): object "fifo_2_rd_data_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(135): object "fifo_3_full" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(137): object "fifo_3_wr_data_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3072_512_16_16_false_792_FROM.vhdl(139): object "fifo_3_rd_data_count" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0" -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "792" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_fk62.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_fk62 -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_fk62" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_sbe1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_sbe1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_sbe1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_6md.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_6md -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_6md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|alt_synch_pipe_6md:rs_dgwp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_5f9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_5f9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_5f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|alt_synch_pipe_6md:rs_dgwp|dffpipe_5f9:dffpipe6" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_7md.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_7md -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_7md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|alt_synch_pipe_7md:ws_dgrp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_6f9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_6f9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_6f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|alt_synch_pipe_7md:ws_dgrp|dffpipe_6f9:dffpipe9" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3" -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "696" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_lk62.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_lk62 -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_lk62" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_2ce1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_2ce1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_2ce1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|altsyncram_2ce1:fifo_ram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_8md.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_8md -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_8md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|alt_synch_pipe_8md:rs_dgwp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_7f9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_7f9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_7f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|alt_synch_pipe_8md:rs_dgwp|dffpipe_7f9:dffpipe6" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_9md.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_9md -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_9md" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|alt_synch_pipe_9md:ws_dgrp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_8f9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_8f9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_8f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3072_512_16_16_false_792_FROM:WrToRAM_WFifo_cmd_cmd_cpu2lmem_0_cpu2lmem|AlteraFifoEntity_696_512_696_dualclock_aclr_rdusedw_wrusedw_pfv490:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_lk62:auto_generated|alt_synch_pipe_9md:ws_dgrp|dffpipe_8f9:dffpipe9" -Thu 15:07: INFO : Info (12128): Elaborating entity "WideFifoWithLevel_3073_512_16_16_false_792_TO" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(117): object "fifo_0_full" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(123): object "fifo_1_full" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(125): object "fifo_1_wr_data_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(129): object "fifo_2_full" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(131): object "fifo_2_wr_data_count" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(135): object "fifo_3_full" assigned a value but never read -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at WideFifoWithLevel_3073_512_16_16_false_792_TO.vhdl(137): object "fifo_3_wr_data_count" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3" -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "697" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_nk62.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_nk62 -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_nk62" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_4ce1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_4ce1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_4ce1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_amd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_amd -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_amd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|alt_synch_pipe_amd:rs_dgwp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_9f9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_9f9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_9f9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|alt_synch_pipe_amd:rs_dgwp|dffpipe_9f9:dffpipe6" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_bmd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_bmd -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_bmd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|alt_synch_pipe_bmd:ws_dgrp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_af9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_af9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_af9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|alt_synch_pipe_bmd:ws_dgrp|dffpipe_af9:dffpipe9" -Thu 15:07: INFO : Info (12128): Elaborating entity "DoneGen" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|DoneGen:DoneGen_cmd_cmd_indptr_0_indptr" -Thu 15:07: INFO : Info (12128): Elaborating entity "PerfMonitor" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PerfMonitor:PerformanceMonitor_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "perf_monitor" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PerfMonitor:PerformanceMonitor_i|perf_monitor:inst_ln11_perfmonitorext" -Thu 15:07: INFO : Info (12128): Elaborating entity "start_of_day_reset" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|start_of_day_reset:inst_ln9_startofdayreset" -Thu 15:07: INFO : Info (12128): Elaborating entity "MAX4PCIeSlaveInterface" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "max_SV_pcie_slave" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp" -Thu 15:07: INFO : Info (12128): Elaborating entity "compl_fifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo" -Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "45" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "5" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "32" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "almost_full_value" = "20" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_09e1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: scfifo_09e1 -Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo_09e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_gsb1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_dpfifo_gsb1 -Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_gsb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_56f.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_fefifo_56f -Thu 15:07: INFO : Info (12128): Elaborating entity "a_fefifo_56f" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|a_fefifo_56f:fifo_state" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_0i7.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cntr_0i7 -Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_0i7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|a_fefifo_56f:fifo_state|cntr_0i7:count_usedw" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_fmb1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dpram_fmb1 -Thu 15:07: INFO : Info (12128): Elaborating entity "dpram_fmb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|dpram_fmb1:FIFOram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_8ou1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_8ou1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_8ou1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|dpram_fmb1:FIFOram|altsyncram_8ou1:altsyncram1" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_khb.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cntr_khb -Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_khb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|cntr_khb:rd_ptr_count" -Thu 15:07: INFO : Info (12128): Elaborating entity "max_pcie_slave_req_dispatcher" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_pcie_slave_req_dispatcher:PCIeSlaveReqDispatcher_imp" -Thu 15:07: INFO : Info (12128): Elaborating entity "StratixPCIeInterface" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "max_SV_pcie_tx" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "pcie_tx_fifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "132" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "6" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "64" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "SCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "almost_full_value" = "48" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_tae1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: scfifo_tae1 -Thu 15:07: INFO : Info (12128): Elaborating entity "scfifo_tae1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_3ub1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_dpfifo_3ub1 -Thu 15:07: INFO : Info (12128): Elaborating entity "a_dpfifo_3ub1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_b6f.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_fefifo_b6f -Thu 15:07: INFO : Info (12128): Elaborating entity "a_fefifo_b6f" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|a_fefifo_b6f:fifo_state" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_1i7.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cntr_1i7 -Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_1i7" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|a_fefifo_b6f:fifo_state|cntr_1i7:count_usedw" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_snb1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dpram_snb1 -Thu 15:07: INFO : Info (12128): Elaborating entity "dpram_snb1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|dpram_snb1:FIFOram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_8uu1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_8uu1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_8uu1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|dpram_snb1:FIFOram|altsyncram_8uu1:altsyncram1" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_lhb.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cntr_lhb -Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_lhb" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_tx:StratixVPCIeTX_i|pcie_tx_fifo:pcie_tx_fifo_i|scfifo:wrapped_scfifo|scfifo_tae1:auto_generated|a_dpfifo_3ub1:dpfifo|cntr_lhb:rd_ptr_count" -Thu 15:07: INFO : Info (12128): Elaborating entity "max_SV_pcie_rx" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|StratixPCIeInterface:StratixPCIeInterface_i|max_SV_pcie_rx:StratixVPCIeRX_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "PCIeEA" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at PCIeEA.vhdl(148): object "slave_from_host_fifo_full" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_34_512_34_dualclock_aclr" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host" -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "34" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_au42.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_au42 -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_au42" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_68e1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_68e1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_68e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|altsyncram_68e1:fifo_ram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_cmd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_cmd -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_cmd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|alt_synch_pipe_cmd:rs_dgwp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_bf9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_bf9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_bf9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|alt_synch_pipe_cmd:rs_dgwp|dffpipe_bf9:dffpipe6" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_dmd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_dmd -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_dmd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|alt_synch_pipe_dmd:ws_dgrp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_cf9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_cf9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_cf9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr:fifo_to_host|dcfifo:inst_ln38_mwfifo|dcfifo_au42:auto_generated|alt_synch_pipe_dmd:ws_dgrp|dffpipe_cf9:dffpipe9" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo" -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "34" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_tk52.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_tk52 -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_tk52" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_t0c1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_t0c1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_t0c1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|altsyncram_t0c1:fifo_ram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_emd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_emd -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_emd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|alt_synch_pipe_emd:rs_dgwp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_df9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_df9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_df9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|alt_synch_pipe_emd:rs_dgwp|dffpipe_df9:dffpipe6" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_fmd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_fmd -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_fmd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|alt_synch_pipe_fmd:ws_dgrp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ef9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_ef9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_ef9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|PCIeEA:PCIeEA_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv384:slave_from_host_fifo|dcfifo:inst_ln38_mwfifo|dcfifo_tk52:auto_generated|alt_synch_pipe_fmd:ws_dgrp|dffpipe_ef9:dffpipe9" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraStreamFifo_128_64_128_afv_95_pushin_pushout" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at AlteraStreamFifo_128_64_128_afv_95_pushin_pushout.vhdl(120): object "inst_ln56_mwfifo_wrfull" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_mixed_widths" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "128" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu" = "7" -Thu 15:07: INFO : Info (12134): Parameter "lpm_numwords" = "128" -Thu 15:07: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "DCFIFO" -Thu 15:07: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "delay_rdusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "delay_wrusedw" = "1" -Thu 15:07: INFO : Info (12134): Parameter "add_usedw_msb_bit" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "rdsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "wrsync_delaypipe" = "4" -Thu 15:07: INFO : Info (12134): Parameter "write_aclr_synch" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "clocks_are_synchronized" = "FALSE" -Thu 15:07: INFO : Info (12134): Parameter "lpm_width_r" = "64" -Thu 15:07: INFO : Info (12134): Parameter "lpm_widthu_r" = "8" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_m352.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dcfifo_m352 -Thu 15:07: INFO : Info (12128): Elaborating entity "dcfifo_m352" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_hab.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_gray2bin_hab -Thu 15:07: INFO : Info (12128): Elaborating entity "a_gray2bin_hab" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|a_gray2bin_hab:wrptr_g_gray2bin" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_fv6.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_graycounter_fv6 -Thu 15:07: INFO : Info (12128): Elaborating entity "a_graycounter_fv6" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|a_graycounter_fv6:rdptr_g1p" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_cdc.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: a_graycounter_cdc -Thu 15:07: INFO : Info (12128): Elaborating entity "a_graycounter_cdc" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|a_graycounter_cdc:wrptr_g1p" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_q9e1.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: altsyncram_q9e1 -Thu 15:07: INFO : Info (12128): Elaborating entity "altsyncram_q9e1" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_hkd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_hkd -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_hkd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|alt_synch_pipe_hkd:rs_dgwp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_gd9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_gd9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_gd9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|alt_synch_pipe_hkd:rs_dgwp|dffpipe_gd9:dffpipe12" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_fd9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_fd9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_fd9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|dffpipe_fd9:ws_brp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_ikd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: alt_synch_pipe_ikd -Thu 15:07: INFO : Info (12128): Elaborating entity "alt_synch_pipe_ikd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|alt_synch_pipe_ikd:ws_dgrp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_hd9.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: dffpipe_hd9 -Thu 15:07: INFO : Info (12128): Elaborating entity "dffpipe_hd9" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|alt_synch_pipe_ikd:ws_dgrp|dffpipe_hd9:dffpipe16" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_206.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cmpr_206 -Thu 15:07: INFO : Info (12128): Elaborating entity "cmpr_206" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|cmpr_206:rdempty_eq_comp" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ptd.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: cntr_ptd -Thu 15:07: INFO : Info (12128): Elaborating entity "cntr_ptd" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|cntr_ptd:cntr_b" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496" for hierarchy "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraFifoEntity_34_512_34_dualclock_aclr_wrusedw_fwft_pfv496:ftb_MappedElementsSwitchPCIeEA" -Thu 15:07: INFO : Info (12128): Elaborating entity "AlteraClockGenerator_250_100_STREAM" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "StratixVClockManager_in250_out_f100p0dc50_f100p180dc50" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVClockManager_in250_out_f100p0dc50_f100p180dc50.vhdl(295): object "altera_pll_i_fboutclk" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "altera_pll" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll:altera_pll_i" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll:altera_pll_i" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll:altera_pll_i" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "fractional_vco_multiplier" = "false" -Thu 15:07: INFO : Info (12134): Parameter "reference_clock_frequency" = "250.0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "operation_mode" = "normal" -Thu 15:07: INFO : Info (12134): Parameter "number_of_clocks" = "2" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency0" = "100.0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift0" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle0" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency1" = "100.0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift1" = "5000 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle1" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency2" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift2" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle2" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency3" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift3" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle3" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency4" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift4" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle4" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency5" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift5" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle5" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency6" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift6" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle6" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency7" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift7" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle7" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency8" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift8" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle8" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency9" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift9" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle9" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency10" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift10" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle10" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency11" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift11" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle11" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency12" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift12" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle12" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency13" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift13" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle13" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency14" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift14" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle14" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency15" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift15" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle15" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency16" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift16" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle16" = "50" -Thu 15:07: INFO : Info (12134): Parameter "output_clock_frequency17" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "phase_shift17" = "0 ps" -Thu 15:07: INFO : Info (12134): Parameter "duty_cycle17" = "50" -Thu 15:07: INFO : Info (12134): Parameter "pll_type" = "General" -Thu 15:07: INFO : Info (12134): Parameter "m_cnt_hi_div" = "1" -Thu 15:07: INFO : Info (12134): Parameter "m_cnt_lo_div" = "1" -Thu 15:07: INFO : Info (12134): Parameter "n_cnt_hi_div" = "1" -Thu 15:07: INFO : Info (12134): Parameter "n_cnt_lo_div" = "1" -Thu 15:07: INFO : Info (12134): Parameter "m_cnt_bypass_en" = "true" -Thu 15:07: INFO : Info (12134): Parameter "n_cnt_bypass_en" = "true" -Thu 15:07: INFO : Info (12134): Parameter "m_cnt_odd_div_duty_en" = "false" -Thu 15:07: INFO : Info (12134): Parameter "n_cnt_odd_div_duty_en" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div0" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div0" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst0" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst0" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en0" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en0" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div1" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div1" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst1" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst1" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en1" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en1" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div2" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div2" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst2" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst2" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en2" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en2" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div3" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div3" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst3" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst3" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en3" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en3" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div4" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div4" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst4" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst4" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en4" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en4" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div5" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div5" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst5" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst5" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en5" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en5" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div6" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div6" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst6" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst6" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en6" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en6" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div7" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div7" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst7" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst7" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en7" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en7" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div8" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div8" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst8" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst8" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en8" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en8" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div9" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div9" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst9" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst9" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en9" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en9" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div10" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div10" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst10" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst10" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en10" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en10" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div11" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div11" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst11" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst11" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en11" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en11" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div12" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div12" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst12" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst12" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en12" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en12" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div13" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div13" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst13" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst13" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en13" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en13" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div14" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div14" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst14" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst14" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en14" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en14" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div15" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div15" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst15" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst15" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en15" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en15" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div16" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div16" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst16" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst16" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en16" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en16" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_hi_div17" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_lo_div17" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_prst17" = "1" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_ph_mux_prst17" = "0" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_bypass_en17" = "false" -Thu 15:07: INFO : Info (12134): Parameter "c_cnt_odd_div_duty_en17" = "false" -Thu 15:07: INFO : Info (12134): Parameter "pll_output_clk_frequency" = "0 MHz" -Thu 15:07: INFO : Info (12134): Parameter "pll_vco_div" = "1" -Thu 15:07: INFO : Info (12134): Parameter "pll_cp_current" = "5" -Thu 15:07: INFO : Info (12134): Parameter "pll_bwctrl" = "18000" -Thu 15:07: INFO : Info (12134): Parameter "pll_fractional_division" = "1" -Thu 15:07: INFO : Info (12128): Elaborating entity "altera_pll_reconfig_top" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "dyn_phase_shift" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst" -Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_0" -Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_1" -Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_2" -Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_3" -Thu 15:07: INFO : Info (12128): Elaborating entity "generic_lcell_comb" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|generic_lcell_comb:lcell_cnt_sel_4" -Thu 15:07: INFO : Info (12128): Elaborating entity "self_reset" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|self_reset:self_reset_inst" -Thu 15:07: INFO : Info (12128): Elaborating entity "dprio_mux" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dprio_mux:dprio_mux_inst" -Thu 15:07: INFO : Info (12128): Elaborating entity "fpll_dprio_init" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|fpll_dprio_init:fpll_dprio_init_inst" -Thu 15:07: INFO : Info (12128): Elaborating entity "MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena:clockgen_altclkctrl_i" -Thu 15:07: INFO : Info (12128): Elaborating entity "MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg" for hierarchy "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena:clockgen_altclkctrl_i|MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg:MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena_altclkctrl_tmg_component" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at MWAltClkCtrl_quartusv13_0_0_AUTO_numclk_1_ena.vhd(58): object "clkselect" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_1_controller" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core" -Thu 15:07: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_1_controller.vhdl(181): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_wrap" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_0002" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_memphy" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_reset" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_reset:ureset" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_reset:ureset|ddr3_72_800_sl_u_q_p0_reset_sync:ureset_afi_clk" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_reset:ureset|ddr3_72_800_sl_u_q_p0_reset_sync:ureset_ctl_reset_clk" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_reset:ureset|ddr3_72_800_sl_u_q_p0_reset_sync:ureset_addr_cmd_clk" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_datapath" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_address" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_bank" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_cke" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_cs_n" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_ras_n" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_write_datapath" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_extender" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_extender:oct_ena_source_extender" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:afi_dqs_en_shifter" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:afi_wdata_shifter" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:afi_dm_shifter" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].dq_shifter" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].wrdata_mask_shifter" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_sl_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].wrdata_en_shifter" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_read_datapath" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_read_valid_selector" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector" -Thu 15:07: INFO : Info (12128): Elaborating entity "lpm_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "lpm_decodes" = "16" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "LPM_DECODE" -Thu 15:07: INFO : Info (12134): Parameter "lpm_width" = "4" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/decode_i6f.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: decode_i6f -Thu 15:07: INFO : Info (12128): Elaborating entity "decode_i6f" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select|decode_i6f:auto_generated" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_read_fifo_hard" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_read_fifo_hard:read_buffering[0].uread_read_fifo_hard" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_new_io_pads" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:hr_to_fr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:hr_to_fr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:hr_to_fr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:hr_to_fr" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:fr_ddio_out" -Thu 15:07: INFO : Info (12128): Elaborating entity "altddio_out" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" -Thu 15:07: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" -Thu 15:07: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" with the following parameter: -Thu 15:07: INFO : Info (12134): Parameter "extend_oe_disable" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:07: INFO : Info (12134): Parameter "invert_output" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "lpm_type" = "altddio_out" -Thu 15:07: INFO : Info (12134): Parameter "oe_reg" = "UNUSED" -Thu 15:07: INFO : Info (12134): Parameter "power_up_high" = "OFF" -Thu 15:07: INFO : Info (12134): Parameter "width" = "1" -Thu 15:07: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/ddio_out_0se.tdf -Thu 15:07: INFO : Info (12023): Found entity 1: ddio_out_0se -Thu 15:07: INFO : Info (12128): Elaborating entity "ddio_out_0se" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad|ddio_out_0se:auto_generated" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_clock_pair_generator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_clock_pair_generator:clock_gen[0].uclk_generator" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_core_shadow_registers" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_core_shadow_registers:dq_ddio[0].t11_manager_inst" -Thu 15:07: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_p0_altdqdqs" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs" -Thu 15:08: INFO : Info (12128): Elaborating entity "altdq_dqs2_stratixv_use_shadow_regs" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs|altdq_dqs2_stratixv_use_shadow_regs:altdq_dqs2_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "afi_mux_ddr3_ddrx_use_shadow_regs" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|afi_mux_ddr3_ddrx_use_shadow_regs:m0" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench:the_altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "5" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "5" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "STRATIXV" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_e9n1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_e9n1 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_e9n1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram|altsyncram_e9n1:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_mgr" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_reg_file" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altdpram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "indata_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "indata_reg" = "INCLOCK" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altdpram" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "rdaddress_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "rdaddress_reg" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "width" = "42" -Thu 15:08: INFO : Info (12134): Parameter "widthad" = "6" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena" = "1" -Thu 15:08: INFO : Info (12134): Parameter "wraddress_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "wraddress_reg" = "INCLOCK" -Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_reg" = "INCLOCK" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_8h02.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: dpram_8h02 -Thu 15:08: INFO : Info (12128): Elaborating entity "dpram_8h02" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component|dpram_8h02:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_sv_wrapper" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_sv_wrapper:sequencer_scc_family_wrapper" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_sv_phase_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_sv_wrapper:sequencer_scc_family_wrapper|sequencer_scc_sv_phase_decode:sequencer_scc_phase_decode_dqe_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_reg_file" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "CLEAR0" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "16" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "16" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "4" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "4" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "4" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_b" = "4" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_4n32.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_4n32 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_4n32" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component|altsyncram_4n32:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_phy_mgr" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_data_mgr" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_data_mgr:sequencer_data_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_ddr3" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_generic" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_core" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_inst_ROM_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_sl_u_q_s0_inst_ROM.hex" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "128" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "128" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "ROM" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "7" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "7" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "20" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "20" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_9j12.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_9j12 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_9j12" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_9j12:auto_generated" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/decode_7la.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: decode_7la -Thu 15:08: INFO : Info (12128): Elaborating entity "decode_7la" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_9j12:auto_generated|decode_7la:wr_decode" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/mux_1hb.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: mux_1hb -Thu 15:08: INFO : Info (12128): Elaborating entity "mux_1hb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_9j12:auto_generated|mux_1hb:rd_mux" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_ac_ROM_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_sl_u_q_s0_AC_ROM.hex" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "40" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "40" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ac32.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_ac32 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_ac32" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component|altsyncram_ac32:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_di_buffer_wrap" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_di_buffer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "4" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "4" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "2" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "2" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "64" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "64" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_q202.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_q202 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_q202" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component|altsyncram_q202:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_datamux" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_datamux:rw_manager_datamux_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_write_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_data_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_data_decoder:DO_decoder" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_dm_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_dm_decoder:DM_decoder_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_lfsr72" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_lfsr72:do_lfsr_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_lfsr12" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_lfsr12:dm_lfsr_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_read_datapath" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_bitcheck" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_bitcheck:bitcheck_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_pattern_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "5" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "5" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "9" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "9" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_0302.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_0302 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_0302" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component|altsyncram_0302:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_data_broadcast" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_data_broadcast:data_broadcast_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_jumplogic" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_jumplogic:jumplogic_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_datamux" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_datamux:mux_iter[0].datamux_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_mem_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "maximum_depth" = "4096" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "4096" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "4" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "12" -Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_sl_u_q_s0_sequencer_mem.hex" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "SINGLE_PORT" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_1io1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_1io1 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_1io1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram|altsyncram_1io1:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_master_translator:cpu_inst_data_master_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_master_translator:cpu_inst_instruction_master_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_translator:sequencer_phy_mgr_inst_avl_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_translator:sequencer_mem_s1_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_translator:sequencer_reg_file_inst_avl_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_master_agent:cpu_inst_data_master_translator_avalon_universal_master_0_agent" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_master_agent:cpu_inst_instruction_master_translator_avalon_universal_master_0_agent" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_agent" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_agent:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_burst_uncompressor" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_merlin_slave_agent:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent|altera_merlin_burst_uncompressor:uncompressor" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_avalon_sc_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_avalon_sc_fifo:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent_rsp_fifo" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_addr_router" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_addr_router:addr_router" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_addr_router_default_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_addr_router:addr_router|ddr3_72_800_sl_u_q_s0_addr_router_default_decode:the_default_decode" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_addr_router_001" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_addr_router_001:addr_router_001" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_addr_router_001_default_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_addr_router_001:addr_router_001|ddr3_72_800_sl_u_q_s0_addr_router_001_default_decode:the_default_decode" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_id_router" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_id_router:id_router" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_id_router_default_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_id_router:id_router|ddr3_72_800_sl_u_q_s0_id_router_default_decode:the_default_decode" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_id_router_003" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_id_router_003:id_router_003" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_id_router_003_default_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_id_router_003:id_router_003|ddr3_72_800_sl_u_q_s0_id_router_003_default_decode:the_default_decode" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_reset_controller" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_reset_controller:rst_controller" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_reset_synchronizer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_cmd_xbar_demux" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_demux:cmd_xbar_demux" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_cmd_xbar_demux_001" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_demux_001:cmd_xbar_demux_001" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003|altera_merlin_arbitrator:arb" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_rsp_xbar_demux_003" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_rsp_xbar_demux_003:rsp_xbar_demux_003" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_rsp_xbar_mux" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_rsp_xbar_mux:rsp_xbar_mux" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_s0_irq_mapper" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|ddr3_72_800_sl_u_q_s0_irq_mapper:irq_mapper" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_sl_u_q_c0" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_if_nextgen_ddr3_controller_core" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_controller_st_top" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_controller" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_input_if" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_input_if:input_if_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_cmd_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_cmd_gen:cmd_gen_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_tbp" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_arbiter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_arbiter:arbiter_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_burst_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_burst_gen:burst_gen_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_addr_cmd_wrap" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_addr_cmd" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_addr_cmd:gen_bg_afi_signal_decode[0].alt_mem_ddrx_addr_cmd_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_odt_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ddr2_odt_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst|alt_mem_ddrx_ddr2_odt_gen:ddr2_odt_gen[0].alt_mem_ddrx_ddr2_odt_gen_inst" -Thu 15:08: INFO : Warning (12158): Entity "alt_mem_ddrx_ddr2_odt_gen" contains only dangling pins -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ddr3_odt_gen" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst|alt_mem_ddrx_ddr3_odt_gen:ddr3_odt_gen[0].alt_mem_ddrx_ddr3_odt_gen_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rdwr_data_tmg" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdwr_data_tmg:rdwr_data_tmg_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_wdata_path" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_list:wdatap_list_freeid_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_list:wdatap_list_allocated_id_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_burst_tracking" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_burst_tracking:wdatap_burst_tracking_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_dataid_manager" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_dataid_manager:wdatap_dataid_manager_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_dataid_manager:wdatap_dataid_manager_inst|alt_mem_ddrx_list:burstcount_list" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_buffer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "indata_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "64" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "64" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "72" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "72" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ba02.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_ba02 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_ba02" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component|altsyncram_ba02:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_buffer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "indata_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "64" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "64" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "9" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "9" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_b702.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_b702 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_b702" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component|altsyncram_b702:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "2" -Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" -Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "648" -Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "1" -Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_2ue1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: scfifo_2ue1 -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo_2ue1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_b9e1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: a_dpfifo_b9e1 -Thu 15:08: INFO : Info (12128): Elaborating entity "a_dpfifo_b9e1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_5jo1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_5jo1 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_5jo1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo|altsyncram_5jo1:FIFOram" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_2m8.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: cmpr_2m8 -Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_2m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo|cmpr_2m8:almost_full_comparer" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_sh7.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: cntr_sh7 -Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_sh7" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo|cntr_sh7:usedw_counter" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ghb.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: cntr_ghb -Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_ghb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_2ue1:auto_generated|a_dpfifo_b9e1:dpfifo|cntr_ghb:wr_ptr" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rdata_path" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo" -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "16" -Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" -Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "46" -Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "4" -Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_3ue1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: scfifo_3ue1 -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo_3ue1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_c9e1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: a_dpfifo_c9e1 -Thu 15:08: INFO : Info (12128): Elaborating entity "a_dpfifo_c9e1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_6jo1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_6jo1 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_6jo1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|altsyncram_6jo1:FIFOram" -Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_5m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cmpr_5m8:almost_full_comparer" -Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_5m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cmpr_5m8:three_comparison" -Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_ihb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cntr_ihb:rd_ptr_msb" -Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_vh7" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cntr_vh7:usedw_counter" -Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_jhb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component|scfifo_3ue1:auto_generated|a_dpfifo_c9e1:dpfifo|cntr_jhb:wr_ptr" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "8" -Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" -Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "40" -Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "3" -Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_cse1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: scfifo_cse1 -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo_cse1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_l7e1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: a_dpfifo_l7e1 -Thu 15:08: INFO : Info (12128): Elaborating entity "a_dpfifo_l7e1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_pfo1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_pfo1 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_pfo1" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|altsyncram_pfo1:FIFOram" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_4m8.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: cmpr_4m8 -Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_4m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|cmpr_4m8:almost_full_comparer" -Thu 15:08: INFO : Info (12128): Elaborating entity "cmpr_4m8" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|cmpr_4m8:three_comparison" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_hhb.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: cntr_hhb -Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_hhb" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|cntr_hhb:rd_ptr_msb" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_uh7.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: cntr_uh7 -Thu 15:08: INFO : Info (12128): Elaborating entity "cntr_uh7" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component|scfifo_cse1:auto_generated|a_dpfifo_l7e1:dpfifo|cntr_uh7:usedw_counter" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_decoder_wrapper" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_64" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst|alt_mem_ddrx_ecc_encoder_64:encoder_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_64_altecc_encoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst|alt_mem_ddrx_ecc_encoder_64:encoder_inst|alt_mem_ddrx_ecc_encoder_64_altecc_encoder:alt_mem_ddrx_ecc_encoder_64_altecc_encoder_component" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64_altecc_decoder" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst|alt_mem_ddrx_ecc_decoder_64_altecc_decoder:alt_mem_ddrx_ecc_decoder_64_altecc_decoder_component" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64_decode" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst|alt_mem_ddrx_ecc_decoder_64_altecc_decoder:alt_mem_ddrx_ecc_decoder_64_altecc_decoder_component|alt_mem_ddrx_ecc_decoder_64_decode:error_bit_decoder" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_sideband" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_sideband:sideband_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rank_timer" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rank_timer:rank_timer_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_timing_param" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_timing_param:timing_param_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_mm_st_converter" for hierarchy "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_ddrx_mm_st_converter:a0" -Thu 15:08: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_2_controller" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core" -Thu 15:08: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_2_controller.vhdl(212): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_wrap" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_0002" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_pll0" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_pll0:pll0" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_memphy" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_reset" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_reset:ureset" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_reset:ureset|ddr3_72_800_m_u_q_p0_reset_sync:ureset_afi_clk" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_reset:ureset|ddr3_72_800_m_u_q_p0_reset_sync:ureset_ctl_reset_clk" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_reset_sync" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_reset:ureset|ddr3_72_800_m_u_q_p0_reset_sync:ureset_addr_cmd_clk" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_datapath" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_address" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_bank" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_cke" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_cs_n" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_addr_cmd_datapath:uaddr_cmd_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:uaddr_cmd_shift_ras_n" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_write_datapath" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_extender" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_extender:oct_ena_source_extender" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:afi_dqs_en_shifter" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:afi_wdata_shifter" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:afi_dm_shifter" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].dq_shifter" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].wrdata_mask_shifter" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_fr_cycle_shifter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_write_datapath:uwrite_datapath|ddr3_72_800_m_u_q_p0_fr_cycle_shifter:bs_wr_grp[0].wrdata_en_shifter" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_read_datapath" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_read_valid_selector" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector" -Thu 15:08: INFO : Info (12128): Elaborating entity "lpm_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_valid_selector:read_buffering[0].rd_valid_lfifo_sel[0].uread_valid_selector|lpm_decode:uvalid_select" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "lpm_decodes" = "16" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "LPM_DECODE" -Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "4" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_read_fifo_hard" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_read_fifo_hard:read_buffering[0].uread_read_fifo_hard" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_new_io_pads" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:hr_to_fr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:hr_to_fr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:hr_to_fr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:hr_to_fr" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_simple_ddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:fr_ddio_out" -Thu 15:08: INFO : Info (12128): Elaborating entity "altddio_out" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|altddio_out:clock_gen[0].umem_ck_pad" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "extend_oe_disable" = "UNUSED" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:08: INFO : Info (12134): Parameter "invert_output" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altddio_out" -Thu 15:08: INFO : Info (12134): Parameter "oe_reg" = "UNUSED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_high" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "width" = "1" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_clock_pair_generator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_clock_pair_generator:clock_gen[0].uclk_generator" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_core_shadow_registers" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_core_shadow_registers:dq_ddio[0].t11_manager_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_p0_altdqdqs" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs" -Thu 15:08: INFO : Info (12128): Elaborating entity "altdq_dqs2_stratixv_use_shadow_regs" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs|altdq_dqs2_stratixv_use_shadow_regs:altdq_dqs2_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "afi_mux_ddr3_ddrx_use_shadow_regs" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|afi_mux_ddr3_ddrx_use_shadow_regs:m0" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench:the_altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_test_bench" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_a|altsyncram:the_altsyncram" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "5" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "5" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "STRATIXV" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst:cpu_inst|altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b_module:altera_mem_if_sequencer_cpu_no_ifdef_params_synth_cpu_inst_register_bank_b" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_mgr" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_reg_file" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altdpram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_reg_file:sequencer_scc_reg_file_inst|altdpram:altdpram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "indata_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "indata_reg" = "INCLOCK" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altdpram" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "rdaddress_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "rdaddress_reg" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "width" = "42" -Thu 15:08: INFO : Info (12134): Parameter "widthad" = "6" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena" = "1" -Thu 15:08: INFO : Info (12134): Parameter "wraddress_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "wraddress_reg" = "INCLOCK" -Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_reg" = "INCLOCK" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_sv_wrapper" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_sv_wrapper:sequencer_scc_family_wrapper" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_scc_sv_phase_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_scc_mgr:sequencer_scc_mgr_inst|sequencer_scc_sv_wrapper:sequencer_scc_family_wrapper|sequencer_scc_sv_phase_decode:sequencer_scc_phase_decode_dqe_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_reg_file" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_reg_file:sequencer_reg_file_inst|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "CLEAR0" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "16" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "16" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "4" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "4" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "4" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_b" = "4" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_phy_mgr" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "sequencer_data_mgr" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_data_mgr:sequencer_data_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_ddr3" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_generic" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_core" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_inst_ROM_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_m_u_q_s0_inst_ROM.hex" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "128" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "128" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "ROM" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "7" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "7" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "20" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "20" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_nf12.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_nf12 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_nf12" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_nf12:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_ac_ROM_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_m_u_q_s0_AC_ROM.hex" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "40" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "40" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_o832.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_o832 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_o832" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_ac_ROM_no_ifdef_params:ac_ROM_i|altsyncram:altsyncram_component|altsyncram_o832:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_di_buffer_wrap" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_di_buffer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_di_buffer:rw_manager_di_buffer_i|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix III" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "4" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "4" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "2" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "2" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "64" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "64" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_datamux" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_di_buffer_wrap:di_buffer_wrap_i|rw_manager_datamux:rw_manager_datamux_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_write_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_data_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_data_decoder:DO_decoder" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_dm_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_dm_decoder:DM_decoder_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_lfsr72" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_lfsr72:do_lfsr_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_lfsr12" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_write_decoder:write_decoder_i|rw_manager_lfsr12:dm_lfsr_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_read_datapath" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_bitcheck" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_bitcheck:bitcheck_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_pattern_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_read_datapath:read_datapath_i|rw_manager_pattern_fifo:pattern_fifo_i|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "32" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "MLAB" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "5" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "5" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "9" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "9" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_data_broadcast" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_data_broadcast:data_broadcast_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_jumplogic" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_jumplogic:jumplogic_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "rw_manager_datamux" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|rw_manager_ddr3:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_datamux:mux_iter[0].datamux_i" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_sequencer_mem_no_ifdef_params" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "maximum_depth" = "4096" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "4096" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "4" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "12" -Thu 15:08: INFO : Info (12134): Parameter "init_file" = "ddr3_72_800_m_u_q_s0_sequencer_mem.hex" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "SINGLE_PORT" -Thu 15:08: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_feo1.tdf -Thu 15:08: INFO : Info (12023): Found entity 1: altsyncram_feo1 -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram_feo1" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_mem_if_sequencer_mem_no_ifdef_params:sequencer_mem|altsyncram:the_altsyncram|altsyncram_feo1:auto_generated" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_master_translator:cpu_inst_data_master_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_master_translator:cpu_inst_instruction_master_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_translator:sequencer_phy_mgr_inst_avl_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_translator:sequencer_mem_s1_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_translator:sequencer_reg_file_inst_avl_translator" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_master_agent:cpu_inst_data_master_translator_avalon_universal_master_0_agent" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_master_agent:cpu_inst_instruction_master_translator_avalon_universal_master_0_agent" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_slave_agent" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_agent:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_burst_uncompressor" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_merlin_slave_agent:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent|altera_merlin_burst_uncompressor:uncompressor" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_avalon_sc_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_avalon_sc_fifo:sequencer_phy_mgr_inst_avl_translator_avalon_universal_slave_0_agent_rsp_fifo" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_addr_router" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_addr_router:addr_router" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_addr_router_default_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_addr_router:addr_router|ddr3_72_800_m_u_q_s0_addr_router_default_decode:the_default_decode" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_addr_router_001" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_addr_router_001:addr_router_001" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_addr_router_001_default_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_addr_router_001:addr_router_001|ddr3_72_800_m_u_q_s0_addr_router_001_default_decode:the_default_decode" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_id_router" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_id_router:id_router" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_id_router_default_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_id_router:id_router|ddr3_72_800_m_u_q_s0_id_router_default_decode:the_default_decode" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_id_router_003" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_id_router_003:id_router_003" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_id_router_003_default_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_id_router_003:id_router_003|ddr3_72_800_m_u_q_s0_id_router_003_default_decode:the_default_decode" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_reset_controller" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_reset_controller:rst_controller" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_reset_synchronizer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_cmd_xbar_demux" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_demux:cmd_xbar_demux" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_cmd_xbar_demux_001" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_demux_001:cmd_xbar_demux_001" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003|altera_merlin_arbitrator:arb" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_cmd_xbar_mux_003:cmd_xbar_mux_003|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_rsp_xbar_demux_003" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_rsp_xbar_demux_003:rsp_xbar_demux_003" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_rsp_xbar_mux" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_rsp_xbar_mux:rsp_xbar_mux" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_s0_irq_mapper" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|ddr3_72_800_m_u_q_s0_irq_mapper:irq_mapper" -Thu 15:08: INFO : Info (12128): Elaborating entity "ddr3_72_800_m_u_q_c0" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_if_nextgen_ddr3_controller_core" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_controller_st_top" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_controller" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_input_if" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_input_if:input_if_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_cmd_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_cmd_gen:cmd_gen_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_tbp" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_arbiter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_arbiter:arbiter_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_burst_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_burst_gen:burst_gen_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_addr_cmd_wrap" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_addr_cmd" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_addr_cmd:gen_bg_afi_signal_decode[0].alt_mem_ddrx_addr_cmd_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_odt_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ddr2_odt_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst|alt_mem_ddrx_ddr2_odt_gen:ddr2_odt_gen[0].alt_mem_ddrx_ddr2_odt_gen_inst" -Thu 15:08: INFO : Warning (12158): Entity "alt_mem_ddrx_ddr2_odt_gen" contains only dangling pins -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ddr3_odt_gen" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_addr_cmd_wrap:addr_cmd_wrap_inst|alt_mem_ddrx_odt_gen:gen_bg_afi_signal_decode[0].odt_gen_inst|alt_mem_ddrx_ddr3_odt_gen:ddr3_odt_gen[0].alt_mem_ddrx_ddr3_odt_gen_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rdwr_data_tmg" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdwr_data_tmg:rdwr_data_tmg_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_wdata_path" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_list:wdatap_list_freeid_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_list:wdatap_list_allocated_id_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_burst_tracking" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_burst_tracking:wdatap_burst_tracking_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_dataid_manager" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_dataid_manager:wdatap_dataid_manager_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_list" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_dataid_manager:wdatap_dataid_manager_inst|alt_mem_ddrx_list:burstcount_list" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_buffer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_data_inst|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "indata_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "64" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "64" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "72" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "72" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_buffer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_buffer:wdata_buffer_per_dwidth_ratio[0].wdata_buffer_per_dqs_group[0].wdatap_buffer_be_inst|altsyncram:altsyncram_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:08: INFO : Info (12134): Parameter "indata_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:08: INFO : Info (12134): Parameter "numwords_a" = "64" -Thu 15:08: INFO : Info (12134): Parameter "numwords_b" = "64" -Thu 15:08: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:08: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:08: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:08: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:08: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:08: INFO : Info (12134): Parameter "widthad_a" = "6" -Thu 15:08: INFO : Info (12134): Parameter "widthad_b" = "6" -Thu 15:08: INFO : Info (12134): Parameter "width_a" = "9" -Thu 15:08: INFO : Info (12134): Parameter "width_b" = "9" -Thu 15:08: INFO : Info (12134): Parameter "width_byteena_a" = "1" -Thu 15:08: INFO : Info (12134): Parameter "wrcontrol_aclr_a" = "NONE" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_wdata_path:wdata_path_inst|alt_mem_ddrx_fifo:rmw_data_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "2" -Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" -Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "648" -Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "1" -Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rdata_path" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo" -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:pending_rd_fifo|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "16" -Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" -Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "46" -Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "4" -Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_fifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12130): Elaborated megafunction instantiation "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" -Thu 15:08: INFO : Info (12133): Instantiated megafunction "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rdata_path:rdata_path_inst|alt_mem_ddrx_fifo:errcmd_fifo_inst|scfifo:gen_fifo_instance.scfifo_component" with the following parameter: -Thu 15:08: INFO : Info (12134): Parameter "add_ram_output_register" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "intended_device_family" = "Stratix IV" -Thu 15:08: INFO : Info (12134): Parameter "lpm_numwords" = "8" -Thu 15:08: INFO : Info (12134): Parameter "lpm_showahead" = "ON" -Thu 15:08: INFO : Info (12134): Parameter "lpm_type" = "scfifo" -Thu 15:08: INFO : Info (12134): Parameter "lpm_width" = "40" -Thu 15:08: INFO : Info (12134): Parameter "lpm_widthu" = "3" -Thu 15:08: INFO : Info (12134): Parameter "overflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "underflow_checking" = "OFF" -Thu 15:08: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_decoder_wrapper" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_64" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst|alt_mem_ddrx_ecc_encoder_64:encoder_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_encoder_64_altecc_encoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_encoder:encoder_inst_per_drate[0].encoder_inst|alt_mem_ddrx_ecc_encoder_64:encoder_inst|alt_mem_ddrx_ecc_encoder_64_altecc_encoder:alt_mem_ddrx_ecc_encoder_64_altecc_encoder_component" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64_altecc_decoder" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst|alt_mem_ddrx_ecc_decoder_64_altecc_decoder:alt_mem_ddrx_ecc_decoder_64_altecc_decoder_component" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_ecc_decoder_64_decode" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_ecc_encoder_decoder_wrapper:ecc_encoder_decoder_wrapper_inst|alt_mem_ddrx_ecc_decoder:decoder_inst_per_drate[0].decoder_inst|alt_mem_ddrx_ecc_decoder_64:decoder_inst|alt_mem_ddrx_ecc_decoder_64_altecc_decoder:alt_mem_ddrx_ecc_decoder_64_altecc_decoder_component|alt_mem_ddrx_ecc_decoder_64_decode:error_bit_decoder" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_sideband" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_sideband:sideband_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_rank_timer" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_rank_timer:rank_timer_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_timing_param" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_timing_param:timing_param_inst" -Thu 15:08: INFO : Info (12128): Elaborating entity "alt_mem_ddrx_mm_st_converter" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_ddrx_mm_st_converter:a0" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_oct_stratixv" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|altera_mem_if_oct_stratixv:oct0" -Thu 15:08: INFO : Info (12128): Elaborating entity "altera_mem_if_dll_stratixv" for hierarchy "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|altera_mem_if_dll_stratixv:dll0" -Thu 15:08: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_3_controller" for hierarchy "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core" -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_3_controller.vhdl(181): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read -Thu 15:09: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_4_controller" for hierarchy "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core" -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_4_controller.vhdl(212): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read -Thu 15:09: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_5_controller" for hierarchy "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core" -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_5_controller.vhdl(181): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read -Thu 15:09: INFO : Info (12128): Elaborating entity "StratixVDDR3_sodimm_6_controller" for hierarchy "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core" -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVDDR3_sodimm_6_controller.vhdl(181): object "inst_stratixvddr3_core_local_cal_fail" assigned a value but never read -Thu 15:09: INFO : Info (12128): Elaborating entity "StratixPCIeBase" for hierarchy "StratixPCIeBase:PCIeBase_i" -Thu 15:09: INFO : Info (12128): Elaborating entity "StratixVHardIPPCIe" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i" -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(514): object "pcie_sv_hard_ip_i_lmi_ack" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(515): object "pcie_sv_hard_ip_i_lmi_dout" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(518): object "pcie_sv_hard_ip_i_tl_cfg_sts" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(519): object "pcie_sv_hard_ip_i_pme_to_sr" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(520): object "pcie_sv_hard_ip_i_currentspeed" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(521): object "pcie_sv_hard_ip_i_derr_cor_ext_rcv" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(522): object "pcie_sv_hard_ip_i_derr_cor_ext_rpl" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(523): object "pcie_sv_hard_ip_i_derr_rpl" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(524): object "pcie_sv_hard_ip_i_dlup" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(525): object "pcie_sv_hard_ip_i_dlup_exit" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(526): object "pcie_sv_hard_ip_i_ev128ns" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(527): object "pcie_sv_hard_ip_i_ev1us" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(528): object "pcie_sv_hard_ip_i_hotrst_exit" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(529): object "pcie_sv_hard_ip_i_int_status" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(530): object "pcie_sv_hard_ip_i_l2_exit" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(531): object "pcie_sv_hard_ip_i_lane_act" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(533): object "pcie_sv_hard_ip_i_rx_par_err" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(534): object "pcie_sv_hard_ip_i_tx_par_err" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(535): object "pcie_sv_hard_ip_i_cfg_par_err" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(536): object "pcie_sv_hard_ip_i_ko_cpl_spc_header" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(537): object "pcie_sv_hard_ip_i_ko_cpl_spc_data" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(546): object "pcie_sv_hard_ip_i_tx_cred_datafccp" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(547): object "pcie_sv_hard_ip_i_tx_cred_datafcnp" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(548): object "pcie_sv_hard_ip_i_tx_cred_datafcp" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(549): object "pcie_sv_hard_ip_i_tx_cred_fchipcons" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(550): object "pcie_sv_hard_ip_i_tx_cred_fcinfinite" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(551): object "pcie_sv_hard_ip_i_tx_cred_hdrfccp" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(552): object "pcie_sv_hard_ip_i_tx_cred_hdrfcnp" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(553): object "pcie_sv_hard_ip_i_tx_cred_hdrfcp" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(557): object "pcie_sv_hard_ip_i_pld_clk_inuse" assigned a value but never read -Thu 15:09: INFO : Warning (10036): Verilog HDL or VHDL warning at StratixVHardIPPCIe.vhdl(558): object "pcie_sv_hard_ip_i_testin_zero" assigned a value but never read -Thu 15:09: INFO : Info (12128): Elaborating entity "pcie_SV_hard_ip" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i" -Thu 15:09: INFO : Info (12128): Elaborating entity "altpcie_sv_hip_ast_hwtcl" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst" -Thu 15:09: INFO : Info (12128): Elaborating entity "altpcie_hip_256_pipen1b" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b" -Thu 15:09: INFO : Info (12128): Elaborating entity "altpcie_rs_hip" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|altpcie_rs_hip:g_soft_reset.altpcie_rs_hip" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_xcvr_pipe_native" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_xcvr_emsip_adapter" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_emsip_adapter:sv_xcvr_emsip_adapter_inst" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_xcvr_plls" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_plls:sv_xcvr_tx_plls_inst" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_xcvr_native" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pma" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_rx_pma" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma|sv_rx_pma:rx_pma.sv_rx_pma_inst" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_tx_pma" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma|sv_tx_pma:tx_pma.sv_tx_pma_inst" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_tx_pma_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma|sv_tx_pma:tx_pma.sv_tx_pma_inst|sv_tx_pma_ch:tx_pma_insts[0].sv_tx_pma_ch_inst" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_tx_pma_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pma:inst_sv_pma|sv_tx_pma:tx_pma.sv_tx_pma_inst|sv_tx_pma_ch:tx_pma_insts[4].sv_tx_pma_ch_inst" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen1_2_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_pipe_gen1_2_rbc:inst_sv_hssi_pipe_gen1_2" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_common_pcs_pma_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_common_pcs_pma_interface_rbc:inst_sv_hssi_common_pcs_pma_interface" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen3_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_pipe_gen3_rbc:inst_sv_hssi_pipe_gen3" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_tx_pcs_pma_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_tx_pcs_pma_interface_rbc:inst_sv_hssi_tx_pcs_pma_interface" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_tx_pld_pcs_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_tx_pld_pcs_interface_rbc:inst_sv_hssi_tx_pld_pcs_interface" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_common_pld_pcs_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_common_pld_pcs_interface_rbc:inst_sv_hssi_common_pld_pcs_interface" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_rx_pld_pcs_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_rx_pld_pcs_interface_rbc:inst_sv_hssi_rx_pld_pcs_interface" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_rx_pcs_pma_interface_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[0].inst_sv_pcs_ch|sv_hssi_rx_pcs_pma_interface_rbc:inst_sv_hssi_rx_pcs_pma_interface" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[1].inst_sv_pcs_ch" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[1].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[1].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[2].inst_sv_pcs_ch" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[2].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[2].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[3].inst_sv_pcs_ch" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[3].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[3].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch" -Thu 15:09: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen1_2_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch|sv_hssi_pipe_gen1_2_rbc:inst_sv_hssi_pipe_gen1_2" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen3_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch|sv_hssi_pipe_gen3_rbc:inst_sv_hssi_pipe_gen3" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[4].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen1_2_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch|sv_hssi_pipe_gen1_2_rbc:inst_sv_hssi_pipe_gen1_2" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_pipe_gen3_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch|sv_hssi_pipe_gen3_rbc:inst_sv_hssi_pipe_gen3" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[5].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[6].inst_sv_pcs_ch" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[6].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[6].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[7].inst_sv_pcs_ch" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[7].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[7].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_pcs_ch" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[8].inst_sv_pcs_ch" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_rx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[8].inst_sv_pcs_ch|sv_hssi_8g_rx_pcs_rbc:inst_sv_hssi_8g_rx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_hssi_8g_tx_pcs_rbc" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_pcs:inst_sv_pcs|sv_pcs_ch:ch[8].inst_sv_pcs_ch|sv_hssi_8g_tx_pcs_rbc:inst_sv_hssi_8g_tx_pcs" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xcvr_avmm" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_xcvr_avmm:inst_sv_xcvr_avmm" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_reconfig_bundle_to_xcvr" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_xcvr_avmm:inst_sv_xcvr_avmm|sv_reconfig_bundle_to_xcvr:avmm_interface_insts[0].sv_reconfig_bundle_to_xcvr_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xcvr_avmm_csr" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_xcvr_avmm:inst_sv_xcvr_avmm|sv_xcvr_avmm_csr:avmm_interface_insts[0].sv_xcvr_avmm_csr_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_resync" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|sv_xcvr_pipe_native:g_xcvr.sv_xcvr_pipe_native|sv_xcvr_native:inst_sv_xcvr_native|sv_xcvr_avmm:inst_sv_xcvr_avmm|sv_xcvr_avmm_csr:avmm_interface_insts[0].sv_xcvr_avmm_csr_inst|alt_xcvr_resync:gen_status_reg_tx.alt_xcvr_resync_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1:pcie_altclkctrl_i" -Thu 15:10: INFO : Info (12128): Elaborating entity "MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh" for hierarchy "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1:pcie_altclkctrl_i|MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh:MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1_altclkctrl_blh_component" -Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MWAltClkCtrl_quartusv13_0_0_GCLK_numclk_1.vhd(58): object "clkselect" assigned a value but never read -Thu 15:10: INFO : Info (12128): Elaborating entity "TransceiverReconfig" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i" -Thu 15:10: INFO : Info (12128): Elaborating entity "pcie_xcvr_reconfig_SV" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0" -Thu 15:10: INFO : Info (12128): Elaborating entity "pcie_reconfig_SV" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_resync" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_resync:inst_reconfig_reset_sync" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_arbiter" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_arbiter:arbiter" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_direct" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_direct:direct.sc_direct" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_arbiter_acq" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_direct:direct.sc_direct|alt_arbiter_acq:mutex_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_soc" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_reconfig_cpu" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench:the_alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a" -Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a|altsyncram:the_altsyncram" -Thu 15:10: INFO : Info (12130): Elaborated megafunction instantiation "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a|altsyncram:the_altsyncram" -Thu 15:10: INFO : Info (12133): Instantiated megafunction "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a|altsyncram:the_altsyncram" with the following parameter: -Thu 15:10: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:10: INFO : Info (12134): Parameter "init_file" = "alt_xcvr_reconfig_cpu_reconfig_cpu_rf_ram_a.mif" -Thu 15:10: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:10: INFO : Info (12134): Parameter "numwords_a" = "32" -Thu 15:10: INFO : Info (12134): Parameter "numwords_b" = "32" -Thu 15:10: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:10: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:10: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:10: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" -Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:10: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:10: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:10: INFO : Info (12134): Parameter "widthad_a" = "5" -Thu 15:10: INFO : Info (12134): Parameter "widthad_b" = "5" -Thu 15:10: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_b5t1.tdf -Thu 15:10: INFO : Info (12023): Found entity 1: altsyncram_b5t1 -Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram_b5t1" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_a|altsyncram:the_altsyncram|altsyncram_b5t1:auto_generated" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b" -Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b|altsyncram:the_altsyncram" -Thu 15:10: INFO : Info (12130): Elaborated megafunction instantiation "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b|altsyncram:the_altsyncram" -Thu 15:10: INFO : Info (12133): Instantiated megafunction "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b|altsyncram:the_altsyncram" with the following parameter: -Thu 15:10: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:10: INFO : Info (12134): Parameter "init_file" = "alt_xcvr_reconfig_cpu_reconfig_cpu_rf_ram_b.mif" -Thu 15:10: INFO : Info (12134): Parameter "maximum_depth" = "0" -Thu 15:10: INFO : Info (12134): Parameter "numwords_a" = "32" -Thu 15:10: INFO : Info (12134): Parameter "numwords_b" = "32" -Thu 15:10: INFO : Info (12134): Parameter "operation_mode" = "DUAL_PORT" -Thu 15:10: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:10: INFO : Info (12134): Parameter "ram_block_type" = "AUTO" -Thu 15:10: INFO : Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK0" -Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE" -Thu 15:10: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:10: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:10: INFO : Info (12134): Parameter "widthad_a" = "5" -Thu 15:10: INFO : Info (12134): Parameter "widthad_b" = "5" -Thu 15:10: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_c5t1.tdf -Thu 15:10: INFO : Info (12023): Found entity 1: altsyncram_c5t1 -Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram_c5t1" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_reconfig_cpu:reconfig_cpu|alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b_module:alt_xcvr_reconfig_cpu_reconfig_cpu_register_bank_b|altsyncram:the_altsyncram|altsyncram_c5t1:auto_generated" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_master_translator:reconfig_cpu_data_master_translator" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_master_translator:reconfig_cpu_instruction_master_translator" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_slave_translator:reconfig_mem_mem_translator" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_slave_translator:reconfig_ctrl_ctrl_translator" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_master_agent:reconfig_cpu_data_master_translator_avalon_universal_master_0_agent" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_master_agent" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_master_agent:reconfig_cpu_instruction_master_translator_avalon_universal_master_0_agent" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_slave_agent" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_slave_agent:reconfig_mem_mem_translator_avalon_universal_slave_0_agent" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_burst_uncompressor" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_merlin_slave_agent:reconfig_mem_mem_translator_avalon_universal_slave_0_agent|altera_merlin_burst_uncompressor:uncompressor" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_avalon_sc_fifo" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_avalon_sc_fifo:reconfig_mem_mem_translator_avalon_universal_slave_0_agent_rsp_fifo" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_addr_router" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_addr_router:addr_router" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_addr_router_default_decode" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_addr_router:addr_router|alt_xcvr_reconfig_cpu_addr_router_default_decode:the_default_decode" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_addr_router_001" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_addr_router_001:addr_router_001" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_addr_router_001_default_decode" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_addr_router_001:addr_router_001|alt_xcvr_reconfig_cpu_addr_router_001_default_decode:the_default_decode" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_id_router" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_id_router:id_router" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_id_router_default_decode" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_id_router:id_router|alt_xcvr_reconfig_cpu_id_router_default_decode:the_default_decode" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_id_router_001" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_id_router_001:id_router_001" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_id_router_001_default_decode" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_id_router_001:id_router_001|alt_xcvr_reconfig_cpu_id_router_001_default_decode:the_default_decode" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_reset_controller" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_reset_controller:rst_controller" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_reset_synchronizer" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_cmd_xbar_demux" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_demux:cmd_xbar_demux" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_cmd_xbar_demux_001" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_demux_001:cmd_xbar_demux_001" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_cmd_xbar_mux" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_mux:cmd_xbar_mux" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_mux:cmd_xbar_mux|altera_merlin_arbitrator:arb" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_arb_adder" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_cmd_xbar_mux:cmd_xbar_mux|altera_merlin_arbitrator:arb|altera_merlin_arb_adder:adder" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_rsp_xbar_mux" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_rsp_xbar_mux:rsp_xbar_mux" -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_merlin_arbitrator" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_rsp_xbar_mux:rsp_xbar_mux|altera_merlin_arbitrator:arb" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_irq_mapper" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu:alt_xcvr_reconfig_cpu_inst|alt_xcvr_reconfig_cpu_irq_mapper:irq_mapper" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cpu_ram" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst|altsyncram:altsyncram_component" -Thu 15:10: INFO : Info (12130): Elaborated megafunction instantiation "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst|altsyncram:altsyncram_component" -Thu 15:10: INFO : Info (12133): Instantiated megafunction "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst|altsyncram:altsyncram_component" with the following parameter: -Thu 15:10: INFO : Info (12134): Parameter "address_reg_b" = "CLOCK0" -Thu 15:10: INFO : Info (12134): Parameter "byteena_reg_b" = "CLOCK0" -Thu 15:10: INFO : Info (12134): Parameter "byte_size" = "8" -Thu 15:10: INFO : Info (12134): Parameter "clock_enable_input_a" = "BYPASS" -Thu 15:10: INFO : Info (12134): Parameter "clock_enable_input_b" = "BYPASS" -Thu 15:10: INFO : Info (12134): Parameter "clock_enable_output_a" = "BYPASS" -Thu 15:10: INFO : Info (12134): Parameter "clock_enable_output_b" = "BYPASS" -Thu 15:10: INFO : Info (12134): Parameter "indata_reg_b" = "CLOCK0" -Thu 15:10: INFO : Info (12134): Parameter "init_file" = "alt_xcvr_reconfig_cpu_ram.hex" -Thu 15:10: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:10: INFO : Info (12134): Parameter "lpm_type" = "altsyncram" -Thu 15:10: INFO : Info (12134): Parameter "numwords_a" = "1024" -Thu 15:10: INFO : Info (12134): Parameter "numwords_b" = "1024" -Thu 15:10: INFO : Info (12134): Parameter "operation_mode" = "BIDIR_DUAL_PORT" -Thu 15:10: INFO : Info (12134): Parameter "outdata_aclr_a" = "NONE" -Thu 15:10: INFO : Info (12134): Parameter "outdata_aclr_b" = "NONE" -Thu 15:10: INFO : Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED" -Thu 15:10: INFO : Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED" -Thu 15:10: INFO : Info (12134): Parameter "power_up_uninitialized" = "FALSE" -Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA" -Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ" -Thu 15:10: INFO : Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ" -Thu 15:10: INFO : Info (12134): Parameter "widthad_a" = "10" -Thu 15:10: INFO : Info (12134): Parameter "widthad_b" = "10" -Thu 15:10: INFO : Info (12134): Parameter "width_a" = "32" -Thu 15:10: INFO : Info (12134): Parameter "width_b" = "32" -Thu 15:10: INFO : Info (12134): Parameter "width_byteena_a" = "4" -Thu 15:10: INFO : Info (12134): Parameter "width_byteena_b" = "4" -Thu 15:10: INFO : Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK0" -Thu 15:10: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_g653.tdf -Thu 15:10: INFO : Info (12023): Found entity 1: altsyncram_g653 -Thu 15:10: INFO : Info (12128): Elaborating entity "altsyncram_g653" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|alt_xcvr_reconfig_cpu_ram:alt_xcvr_reconfig_cpu_ram_inst|altsyncram:altsyncram_component|altsyncram_g653:auto_generated" -Thu 15:10: INFO : Warning (113015): Width of data items in "alt_xcvr_reconfig_cpu_ram.hex" is greater than the memory width. Wrapping data items to subsequent addresses. Found 128 warnings, reporting 10 -Thu 15:10: INFO : Warning (113009): Data at line (2) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (3) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (4) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (5) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (6) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (7) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (8) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (9) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (10) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Warning (113009): Data at line (11) of memory initialization file "alt_xcvr_reconfig_cpu_ram.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. -Thu 15:10: INFO : Info (12128): Elaborating entity "altera_wait_generate" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_soc:soc.sc_soc|altera_wait_generate:altera_wait_generate_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_cal_seq" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_cal_seq:cal_seq" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_reconfig_basic" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xcvr_reconfig_basic" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xrbasic_lif" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xrbasic_lif_csr" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xrbasic_l2p_rom" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_rom:l2pch" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_xrbasic_l2p_addr" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_addr:l2paddr" -Thu 15:10: INFO : Info (12128): Elaborating entity "csr_mux" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|csr_mux:pif_tbus_mux" -Thu 15:10: INFO : Info (12128): Elaborating entity "alt_xcvr_arbiter" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|alt_xcvr_arbiter:pif[0].pif_arb" -Thu 15:10: INFO : Info (12128): Elaborating entity "sv_reconfig_bundle_to_basic" for hierarchy "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_reconfig_bundle_to_basic:bundle" -Thu 15:10: INFO : Info (12128): Elaborating entity "MAX4CPLDInterface" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level" -Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4CPLDInterface.vhdl(255): object "cpld_io_ext_inst_maxring_a_top_sb_fb" assigned a value but never read -Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4CPLDInterface.vhdl(256): object "cpld_io_ext_inst_maxring_a_bottom_sb_fb" assigned a value but never read -Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4CPLDInterface.vhdl(257): object "cpld_io_ext_inst_maxring_b_modtx_sb_fb" assigned a value but never read -Thu 15:10: INFO : Warning (10036): Verilog HDL or VHDL warning at MAX4CPLDInterface.vhdl(258): object "cpld_io_ext_inst_maxring_b_modrx_sb_fb" assigned a value but never read -Thu 15:10: INFO : Info (12128): Elaborating entity "max4_cpld_ioexpand" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_ioexpand:cpld_io_ext_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "MAXEvents" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|MAXEvents:max_events" -Thu 15:10: INFO : Info (12128): Elaborating entity "max_events" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|MAXEvents:max_events|max_events:inst_ln70_maxevents" -Thu 15:10: INFO : Info (12128): Elaborating entity "max4_cpld_flash_if" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst" -Thu 15:10: INFO : Info (12128): Elaborating entity "level_synchroniser" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|level_synchroniser:do_lsync" -Thu 15:10: INFO : Info (12128): Elaborating entity "level_synchroniser_prim" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|level_synchroniser:do_lsync|level_synchroniser_prim:\g_wide:0:g_width2:sync_level_src" -Thu 15:10: INFO : Info (12128): Elaborating entity "strobe_to_strobe" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|strobe_to_strobe:dovld_sts" -Thu 15:10: INFO : Info (12128): Elaborating entity "strobe_to_strobe_prim" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|strobe_to_strobe:dovld_sts|strobe_to_strobe_prim:\g_sync_toggle_wide:0:sync_toggle" -Thu 15:10: INFO : Info (12128): Elaborating entity "scfifo" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo" -Thu 15:10: INFO : Info (12130): Elaborated megafunction instantiation "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo" -Thu 15:12: INFO : Info (12133): Instantiated megafunction "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo" with the following parameter: -Thu 15:12: INFO : Info (12134): Parameter "add_ram_output_register" = "OFF" -Thu 15:12: INFO : Info (12134): Parameter "allow_rwcycle_when_full" = "OFF" -Thu 15:12: INFO : Info (12134): Parameter "almost_empty_value" = "0" -Thu 15:12: INFO : Info (12134): Parameter "almost_full_value" = "0" -Thu 15:12: INFO : Info (12134): Parameter "intended_device_family" = "Stratix V" -Thu 15:12: INFO : Info (12134): Parameter "lpm_numwords" = "512" -Thu 15:12: INFO : Info (12134): Parameter "lpm_showahead" = "OFF" -Thu 15:12: INFO : Info (12134): Parameter "lpm_width" = "64" -Thu 15:12: INFO : Info (12134): Parameter "lpm_widthu" = "9" -Thu 15:12: INFO : Info (12134): Parameter "overflow_checking" = "ON" -Thu 15:12: INFO : Info (12134): Parameter "underflow_checking" = "ON" -Thu 15:12: INFO : Info (12134): Parameter "use_eab" = "ON" -Thu 15:12: INFO : Info (12134): Parameter "lpm_hint" = "UNUSED" -Thu 15:12: INFO : Info (12134): Parameter "lpm_type" = "scfifo" -Thu 15:12: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_cql1.tdf -Thu 15:12: INFO : Info (12023): Found entity 1: scfifo_cql1 -Thu 15:12: INFO : Info (12128): Elaborating entity "scfifo_cql1" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated" -Thu 15:12: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_dbe1.tdf -Thu 15:12: INFO : Info (12023): Found entity 1: a_dpfifo_dbe1 -Thu 15:12: INFO : Info (12128): Elaborating entity "a_dpfifo_dbe1" for hierarchy "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo" -Thu 15:12: INFO : Warning (12010): Port "pma_adaptdone" on the entity instantiation of "inst_sv_xcvr_avmm" is connected to a signal of width 1. The formal width of the signal in the module is 9. The extra bits will be driven by GND. -Thu 15:12: INFO : Warning (12010): Port "pma_hardoccaldone" on the entity instantiation of "inst_sv_xcvr_avmm" is connected to a signal of width 1. The formal width of the signal in the module is 9. The extra bits will be driven by GND. -Thu 15:12: INFO : Warning (12030): Port "rx_cal_busy" on the entity instantiation of "inst_sv_xcvr_native" is connected to a signal of width 8. The formal width of the signal in the module is 9. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "tx_cal_busy" on the entity instantiation of "inst_sv_xcvr_native" is connected to a signal of width 8. The formal width of the signal in the module is 9. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "rx_signaldetect" on the entity instantiation of "sv_xcvr_emsip_adapter_inst" is connected to a signal of width 9. The formal width of the signal in the module is 8. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "sideband_in_refresh" on the entity instantiation of "sideband_inst" is connected to a signal of width 1. The formal width of the signal in the module is 2. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "afi_rdata_en_full" on the entity instantiation of "alt_mem_ddrx_controller_top_inst" is connected to a signal of width 4. The formal width of the signal in the module is 36. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[8].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[7].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[6].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[5].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[4].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[3].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:12: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[2].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:13: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[1].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:13: INFO : Warning (12030): Port "read_data_out" on the entity instantiation of "dq_ddio[0].ubidir_dq_dqs" is connected to a signal of width 16. The formal width of the signal in the module is 32. The extra bits will be left dangling without any fan-out logic. -Thu 15:13: INFO : Info (12206): 2 design partitions require synthesis -Thu 15:13: INFO : Info (12210): Partition "Top" requires synthesis because its netlist type is Source File -Thu 15:13: INFO : Info (12210): Partition "MAX4FPGATop:MAX4MaiaFabricTop_i" requires synthesis because its netlist type is Source File -Thu 15:13: INFO : Info (12209): No design partitions will skip synthesis in the current incremental compilation -Thu 15:13: INFO : Warning (14284): Synthesized away the following node(s): -Thu 15:13: INFO : Warning (14285): Synthesized away the following LCELL buffer node(s): -Thu 15:13: INFO : Warning (14320): Synthesized away node "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dprio_read" -Thu 15:13: INFO : Warning (14320): Synthesized away node "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|phase_done" -Thu 15:13: INFO : Warning (14285): Synthesized away the following RAM node(s): -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[16]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[17]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[18]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[19]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[20]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[21]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[22]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[23]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[24]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[25]" -Thu 15:13: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[26]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[27]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[28]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[29]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[30]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[31]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[58]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[59]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[60]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4CPLDInterface:max4_cpld_top_level|max4_cpld_flash_if:cpld_flash_ext_inst|scfifo:tx_cmd_fifo|scfifo_cql1:auto_generated|a_dpfifo_dbe1:dpfifo|dpram_jmb1:FIFOram|altsyncram_nou1:altsyncram1|q_b[61]" -Thu 15:14: INFO : Warning (14284): Synthesized away the following node(s): -Thu 15:14: INFO : Warning (14285): Synthesized away the following RAM node(s): -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[34]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[35]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[36]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[37]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[38]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[39]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[40]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[41]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[42]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[43]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[44]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[45]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[46]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[47]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[48]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[49]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[50]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[51]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[52]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[53]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[54]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[55]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[56]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[57]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[58]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[59]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[60]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[61]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[62]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|AlteraStreamFifo_128_64_128_afv_95_pushin_pushout:ftb_ARChange_MappedElementsSwitchPCIeEA|dcfifo_mixed_widths:inst_ln56_mwfifo|dcfifo_m352:auto_generated|altsyncram_q9e1:fifo_ram|q_b[63]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|dpram_fmb1:FIFOram|altsyncram_8ou1:altsyncram1|q_b[11]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|compl_fifo:cfifo|scfifo:wrapped_scfifo|scfifo_09e1:auto_generated|a_dpfifo_gsb1:dpfifo|dpram_fmb1:FIFOram|altsyncram_8ou1:altsyncram1|q_b[12]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_values_0_values|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[696]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[696]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[2]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[3]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[4]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[5]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[6]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[7]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[8]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[9]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[10]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[11]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[12]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[13]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[14]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[15]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[16]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[17]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[18]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[19]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[20]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[21]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[22]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[23]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[24]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[25]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[26]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[27]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[28]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[29]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[30]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:3:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[31]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[2]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[3]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[4]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[5]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[6]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[7]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[8]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[9]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[10]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[11]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[12]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[13]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[14]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[15]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[16]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[17]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[18]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[19]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[20]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[21]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[22]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[23]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[24]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[25]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[26]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[27]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[28]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[29]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[30]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamFromHost:PCIeSlaveStreamFromHost3|pcie_slave_streaming_sfh_ring:stream_ring|rg_buffer_sfh:\gen_word_buffers:1:buf_gen|AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg:wrapped_AlteraBlockMem_RAM_TWO_PORT_32x512_RAM_TWO_PORT_ireg|altsyncram:inst_ln100_mwblockmem|altsyncram_9a34:auto_generated|q_b[31]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[0]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[1]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[2]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[3]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[4]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[5]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[6]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|PCIeSlaveStreamToHost:PCIeSlaveStreamToHost0|pcie_slave_streaming_sth_ring:stream_ring|sth_compl_fifo_debug:\g_dbg:cfifo|AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of:wrapped_AlteraFifoEntity_60_16_60_aclr_afv14_fwft_uf_of|scfifo:inst_ln38_mwfifo|scfifo_36e1:auto_generated|a_dpfifo_gpb1:dpfifo|altsyncram_92j1:FIFOram|q_b[7]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[0]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[1]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[72]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[82]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[83]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[84]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[85]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[86]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[87]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[88]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[89]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[90]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[91]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[92]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[93]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[94]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[95]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[96]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[97]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[98]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[99]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[100]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[101]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[102]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[103]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[104]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[105]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[106]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[107]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[108]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[109]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[110]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[111]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[112]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[113]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|PCIeStreaming_2_4:dynpcie|RequestEncoder:RequestEncoder_i|AlteraFifoEntity_115_512_115_aclr_fwft:wr_req_buffer_i|scfifo:inst_ln38_mwfifo|scfifo_84b1:auto_generated|a_dpfifo_fab1:dpfifo|altsyncram_n8j1:FIFOram|q_b[114]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_48:Stream_48|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1|q_b[1]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_40:Stream_40|scfifo:mw_fifo|scfifo_k7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1|q_b[1]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[11]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[12]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[13]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[14]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[15]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[16]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[17]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[18]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[19]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[20]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[21]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[22]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[23]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[24]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[25]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[26]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[27]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[28]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[29]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[30]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[31]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[43]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[44]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[45]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[46]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[47]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[48]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[49]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[50]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[51]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[52]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[53]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[54]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[55]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[56]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[57]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[58]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[59]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[60]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[61]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[62]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[63]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[75]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[76]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[77]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[78]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[79]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[80]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[81]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[82]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[83]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[84]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[85]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[86]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[87]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[88]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[89]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[90]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[91]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[92]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[93]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[94]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[95]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[107]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[108]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[109]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[110]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[111]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[112]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[113]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[114]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[115]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[116]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[117]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[118]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[119]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[120]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[121]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[122]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[123]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[124]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[125]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[126]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[127]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[139]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[140]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[141]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[142]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[143]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[144]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[145]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[146]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[147]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[148]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[149]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[150]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[151]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[152]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[153]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[154]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[155]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[156]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[157]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[158]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[159]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[171]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[172]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[173]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[174]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[175]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[176]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[177]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[178]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[179]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[180]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[181]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[182]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[183]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[184]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[185]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[186]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[187]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[188]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[189]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[190]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[191]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[203]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[204]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[205]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[206]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[207]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[208]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[209]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[210]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[211]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[212]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[213]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[214]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[215]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[216]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[217]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[218]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[219]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[220]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[221]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[222]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[223]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[235]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[236]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[237]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[238]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[239]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[240]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[241]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[242]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[243]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[244]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[245]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[246]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[247]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[248]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[249]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[250]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[251]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[252]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[253]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[254]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[255]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[267]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[268]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[269]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[270]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[271]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[272]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[273]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[274]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[275]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[276]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[277]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[278]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[279]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[280]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[281]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[282]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[283]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[284]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[285]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[286]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[287]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[299]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[300]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[301]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[302]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[303]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[304]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[305]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[306]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[307]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[308]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[309]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[310]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[311]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[312]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[313]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[314]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[315]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[316]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[317]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[318]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[319]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[331]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[332]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[333]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[334]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[335]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[336]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[337]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[338]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[339]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[340]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[341]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[342]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[343]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[344]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[345]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[346]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[347]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[348]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[349]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[350]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[351]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[363]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[364]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[365]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[366]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[367]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[368]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[369]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[370]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[371]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[372]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[373]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[374]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[375]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[376]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[377]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[378]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[379]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[380]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[381]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[382]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[383]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[395]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[396]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[397]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[398]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[399]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[400]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[401]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[402]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[403]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[404]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[405]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[406]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[407]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[408]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[409]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[410]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[411]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[412]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[413]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[414]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[415]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[427]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[428]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[429]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[430]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[431]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[432]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[433]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[434]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[435]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[436]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[437]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[438]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[439]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[440]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[441]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[442]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[443]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[444]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[445]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[446]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[447]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[459]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[460]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[461]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[462]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[463]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[464]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[465]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[466]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[467]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[468]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[469]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[470]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[471]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[472]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[473]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[474]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[475]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[476]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[477]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[478]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[479]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[491]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[492]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[493]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[494]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[495]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[496]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[497]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[498]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[499]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[500]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[501]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[502]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[503]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[504]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[505]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[506]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[507]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[508]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[509]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[510]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[511]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[523]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[524]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[525]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[526]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[527]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[528]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[529]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[530]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[531]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[532]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[533]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[534]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[535]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[536]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[537]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[538]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[539]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[540]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[541]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[542]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[543]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[555]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[556]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[557]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[558]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[559]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[560]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[561]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[562]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[563]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[564]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[565]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[566]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[567]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[568]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[569]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[570]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[571]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[572]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[573]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[574]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[575]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[587]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[588]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[589]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[590]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[591]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[592]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[593]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[594]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[595]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[596]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[597]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[598]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[599]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[600]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[601]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[602]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[603]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[604]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[605]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[606]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[607]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[619]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[620]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[621]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[622]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[623]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[624]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[625]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[626]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[627]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[628]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[629]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[630]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[631]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[632]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[633]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[634]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[635]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[636]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[637]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[638]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[639]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[651]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[652]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[653]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[654]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[655]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[656]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[657]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[658]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[659]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[660]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[661]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[662]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[663]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[664]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[665]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[666]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[667]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[668]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[669]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[670]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[671]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[683]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[684]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[685]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[686]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[687]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[688]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[689]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[690]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[691]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[692]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[693]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[694]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[695]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[696]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[697]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[698]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[699]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[700]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[701]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[702]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[703]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[715]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[716]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[717]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[718]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[719]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[720]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[721]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[722]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[723]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[724]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[725]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[726]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[727]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[728]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[729]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[730]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[731]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[732]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[733]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[734]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[735]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[747]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[748]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[749]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[750]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[751]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[752]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[753]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[754]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[755]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[756]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[757]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[758]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[759]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[760]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[761]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[762]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[763]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[764]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[765]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[766]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[767]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[779]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[780]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[781]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[782]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[783]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[784]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[785]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[786]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[787]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[788]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[789]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[790]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[791]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[792]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[793]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[794]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[795]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[796]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[797]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[798]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[799]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[811]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[812]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[813]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[814]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[815]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[816]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[817]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[818]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[819]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[820]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[821]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[822]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[823]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[824]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[825]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[826]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[827]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[828]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[829]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[830]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[831]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[843]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[844]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[845]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[846]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[847]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[848]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[849]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[850]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[851]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[852]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[853]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[854]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[855]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[856]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[857]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[858]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[859]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[860]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[861]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[862]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[863]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[875]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[876]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[877]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[878]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[879]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[880]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[881]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[882]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[883]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[884]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[885]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[886]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[887]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[888]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[889]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[890]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[891]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[892]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[893]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[894]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[895]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[907]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[908]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[909]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[910]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[911]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[912]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[913]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[914]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[915]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[916]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[917]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[918]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[919]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[920]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[921]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[922]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[923]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[924]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[925]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[926]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[927]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[939]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[940]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[941]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[942]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[943]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[944]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[945]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[946]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[947]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[948]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[949]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[950]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[951]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[952]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[953]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[954]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[955]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[956]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[957]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[958]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[959]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[971]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[972]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[973]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[974]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[975]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[976]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[977]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[978]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[979]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[980]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[981]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[982]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[983]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[984]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[985]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[986]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[987]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[988]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[989]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[990]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[991]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1003]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1004]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1005]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1006]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1007]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1008]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1009]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1010]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1011]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1012]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1013]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1014]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1015]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1016]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1017]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1018]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1019]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1020]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1021]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1022]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1023]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1035]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1036]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1037]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1038]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1039]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1040]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1041]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1042]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1043]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1044]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1045]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1046]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1047]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1048]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1049]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1050]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1051]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1052]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1053]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1054]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1055]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1067]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1068]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1069]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1070]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1071]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1072]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1073]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1074]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1075]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1076]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1077]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1078]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1079]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1080]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1081]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1082]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1083]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1084]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1085]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1086]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1087]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1099]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1100]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1101]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1102]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1103]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1104]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1105]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1106]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1107]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1108]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1109]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1110]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1111]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1112]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1113]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1114]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1115]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1116]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1117]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1118]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1119]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1131]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1132]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1133]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1134]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1135]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1136]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1137]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1138]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1139]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1140]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1141]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1142]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1143]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1144]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1145]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1146]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1147]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1148]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1149]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1150]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1151]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1163]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1164]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1165]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1166]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1167]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1168]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1169]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1170]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1171]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1172]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1173]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1174]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1175]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1176]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1177]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1178]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1179]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1180]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1181]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1182]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1183]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1195]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1196]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1197]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1198]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1199]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1200]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1201]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1202]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1203]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1204]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1205]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1206]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1207]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1208]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1209]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1210]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1211]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1212]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1213]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1214]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1215]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1227]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1228]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1229]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1230]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1231]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1232]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1233]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1234]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1235]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1236]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1237]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1238]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1239]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1240]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1241]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1242]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1243]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1244]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1245]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1246]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1247]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1259]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1260]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1261]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1262]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1263]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1264]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1265]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1266]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1267]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1268]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1269]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1270]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1271]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1272]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1273]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1274]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1275]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1276]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1277]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1278]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1279]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1291]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1292]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1293]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1294]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1295]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1296]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1297]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1298]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1299]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1300]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1301]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1302]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1303]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1304]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1305]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1306]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1307]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1308]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1309]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1310]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1311]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1323]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1324]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1325]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1326]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1327]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1328]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1329]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1330]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1331]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1332]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1333]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1334]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1335]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1336]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1337]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1338]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1339]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1340]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1341]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1342]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1343]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1355]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1356]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1357]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1358]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1359]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1360]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1361]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1362]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1363]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1364]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1365]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1366]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1367]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1368]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1369]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1370]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1371]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1372]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1373]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1374]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1375]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1387]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1388]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1389]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1390]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1391]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1392]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1393]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1394]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1395]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1396]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1397]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1398]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1399]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1400]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1401]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1402]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1403]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1404]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1405]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1406]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1407]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1419]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1420]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1421]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1422]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1423]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1424]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1425]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1426]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1427]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1428]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1429]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1430]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1431]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1432]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1433]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1434]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1435]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1436]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1437]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1438]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1439]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1451]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1452]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1453]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1454]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1455]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1456]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1457]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1458]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1459]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1460]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1461]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1462]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1463]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1464]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1465]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1466]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1467]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1468]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1469]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1470]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1471]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1483]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1484]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1485]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1486]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1487]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1488]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1489]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1490]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1491]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1492]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1493]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1494]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1495]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1496]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1497]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1498]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1499]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1500]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1501]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1502]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1503]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1515]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1516]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1517]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1518]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1519]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1520]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1521]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1522]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1523]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1524]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1525]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1526]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1527]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1528]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1529]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1530]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1531]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1532]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1533]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1534]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_78:Stream_78|scfifo:mw_fifo|scfifo_kch1:auto_generated|a_dpfifo_qib1:dpfifo|dpram_opb1:FIFOram|altsyncram_85v1:altsyncram1|q_b[1535]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_34:Stream_34|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1|q_b[1]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_Stream_38:Stream_38|scfifo:mw_fifo|scfifo_o7h1:auto_generated|a_dpfifo_tdb1:dpfifo|dpram_rkb1:FIFOram|altsyncram_oku1:altsyncram1|q_b[1]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[0]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[2]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[17]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[18]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[35]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[36]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[37]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[38]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[39]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[40]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[41]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[42]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[43]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[44]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[45]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[46]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[47]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[48]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[49]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[50]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[51]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[52]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[53]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[54]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[55]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[56]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[57]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[58]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[59]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[60]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[61]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[62]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[63]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[64]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[65]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[66]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[67]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[68]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[69]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_STREAM|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[70]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[0]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[12]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[13]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[14]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[15]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[16]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[17]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[18]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[67]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[68]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[69]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MappedMemoriesControllerdomain0_drp_domain0domain1_STREAM_domain1:MappedMemoriesController_i|AlteraFifoEntity_71_512_71_dualclock_aclr:request_fifo_drp|dcfifo:inst_ln38_mwfifo|dcfifo_cu42:auto_generated|altsyncram_88e1:fifo_ram|q_b[70]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[3]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[4]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[5]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[6]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[7]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[8]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[9]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[10]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[11]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[12]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[13]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[14]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[15]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[16]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[17]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[18]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[19]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[20]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[21]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[22]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[23]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[35]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[36]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[37]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[38]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[39]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[40]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[41]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[42]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[43]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[44]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[45]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[46]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[47]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[48]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[49]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[50]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[51]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[52]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[53]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[54]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[55]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[67]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[68]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[69]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[70]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[71]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[72]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[73]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[74]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[75]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[76]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[77]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[78]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[79]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[80]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[81]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[82]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[83]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[84]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[85]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[86]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[87]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[99]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[100]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[101]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[102]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[103]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[104]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[105]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[106]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[107]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[108]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[109]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[110]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[111]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[112]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[113]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[114]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[115]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[116]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[117]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[118]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[119]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[131]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[132]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[133]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[134]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[135]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[136]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[137]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[138]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[139]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[140]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[141]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[142]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[143]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[144]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[145]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[146]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[147]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[148]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[149]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[150]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[151]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[163]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[164]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[165]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[166]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[167]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[168]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[169]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[170]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[171]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[172]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[173]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[174]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[175]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[176]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[177]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[178]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[179]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[180]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[181]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[182]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[183]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[195]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[196]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[197]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[198]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[199]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[200]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[201]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[202]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[203]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[204]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[205]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[206]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[207]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[208]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[209]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[210]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[211]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[212]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[213]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[214]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[215]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[227]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[228]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[229]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[230]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[231]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[232]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[233]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[234]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[235]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[236]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[237]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[238]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[239]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[240]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[241]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[242]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[243]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[244]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[245]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[246]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[247]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[259]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[260]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[261]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[262]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[263]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[264]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[265]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[266]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[267]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[268]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[269]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[270]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[271]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[272]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[273]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[274]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[275]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[276]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[277]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[278]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[279]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[291]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[292]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[293]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[294]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[295]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[296]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[297]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[298]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[299]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[300]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[301]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[302]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[303]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[304]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[305]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[306]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[307]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[308]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[309]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[310]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[311]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[323]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[324]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[325]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[326]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[327]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[328]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[329]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[330]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[331]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[332]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[333]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[334]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[335]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[336]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[337]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[338]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[339]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[340]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[341]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[342]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[343]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[355]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[356]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[357]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[358]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[359]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[360]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[361]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[362]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[363]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[364]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[365]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[366]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[367]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[368]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[369]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[370]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[371]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[372]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[373]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[374]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[375]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[387]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[388]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[389]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[390]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[391]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[392]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[393]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[394]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[395]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[396]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[397]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[398]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[399]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[400]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[401]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[402]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[403]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[404]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[405]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[406]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[407]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[419]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[420]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[421]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[422]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[423]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[424]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[425]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[426]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[427]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[428]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[429]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[430]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[431]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[432]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[433]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[434]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[435]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[436]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[437]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[438]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[439]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[451]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[452]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[453]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[454]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[455]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[456]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[457]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[458]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[459]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[460]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[461]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[462]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[463]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[464]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[465]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[466]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[467]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[468]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[469]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[470]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[471]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[483]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[484]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[485]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[486]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[487]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[488]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[489]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[490]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[491]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[492]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[493]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[494]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[495]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[496]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[497]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[498]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[499]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[500]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[501]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[502]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[503]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[515]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[516]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[517]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[518]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[519]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[520]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[521]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[522]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[523]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[524]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[525]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[526]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[527]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[528]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[529]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[530]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[531]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[532]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[533]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[534]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[535]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[547]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[548]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[549]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[550]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[551]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[552]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[553]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[554]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[555]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[556]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[557]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[558]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[559]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[560]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[561]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[562]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[563]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[564]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[565]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[566]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[567]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[579]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[580]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[581]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[582]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[583]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[584]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[585]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[586]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[587]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[588]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[589]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[590]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[591]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[592]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[593]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[594]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[595]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[596]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[597]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[598]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[599]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[611]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[612]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[613]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[614]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[615]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[616]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[617]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[618]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[619]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[620]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[621]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[622]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[623]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[624]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[625]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[626]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[627]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[628]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[629]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[630]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[631]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[643]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[644]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[645]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[646]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[647]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[648]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[649]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[650]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[651]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[652]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[653]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[654]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[655]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[656]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[657]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[658]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[659]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[660]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[661]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[662]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[663]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[675]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[676]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[677]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[678]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[679]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[680]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[681]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[682]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[683]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[684]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[685]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[686]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[687]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[688]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[689]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[690]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[691]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[692]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[693]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[694]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_697_512_697_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_3|dcfifo:inst_ln38_mwfifo|dcfifo_nk62:auto_generated|altsyncram_4ce1:fifo_ram|q_b[695]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[0]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[1]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[2]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[3]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[4]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[5]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[6]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[7]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[8]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[9]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[10]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[11]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[12]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[13]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[14]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[15]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[27]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[28]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[29]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[30]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[31]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[32]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[33]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[34]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[35]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[36]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[37]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[38]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[39]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[40]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[41]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[42]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[43]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[44]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[45]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[46]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[47]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[59]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[60]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[61]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[62]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[63]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[64]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[65]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[66]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[67]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[68]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[69]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[70]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[71]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[72]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[73]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[74]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[75]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[76]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[77]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[78]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[79]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[91]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[92]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[93]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[94]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[95]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[96]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[97]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[98]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[99]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[100]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[101]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[102]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[103]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[104]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[105]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[106]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[107]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[108]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[109]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[110]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[111]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[123]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[124]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[125]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[126]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[127]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[128]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[129]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[130]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[131]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[132]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[133]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[134]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[135]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[136]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[137]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[138]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[139]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[140]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[141]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[142]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[143]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[155]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[156]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[157]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[158]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[159]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[160]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[161]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[162]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[163]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[164]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[165]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[166]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[167]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[168]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[169]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[170]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[171]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[172]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[173]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[174]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[175]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[187]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[188]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[189]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[190]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[191]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[192]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[193]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[194]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[195]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[196]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[197]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[198]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[199]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[200]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[201]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[202]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[203]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[204]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[205]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[206]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[207]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[219]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[220]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[221]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[222]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[223]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[224]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[225]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[226]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[227]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[228]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[229]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[230]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[231]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[232]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[233]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[234]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[235]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[236]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[237]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[238]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[239]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[251]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[252]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[253]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[254]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[255]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[256]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[257]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[258]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[259]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[260]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[261]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[262]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[263]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[264]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[265]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[266]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[267]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[268]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[269]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[270]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[271]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[283]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[284]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[285]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[286]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[287]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[288]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[289]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[290]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[291]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[292]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[293]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[294]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[295]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[296]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[297]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[298]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[299]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[300]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[301]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[302]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[303]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[315]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[316]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[317]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[318]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[319]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[320]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[321]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[322]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[323]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[324]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[325]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[326]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[327]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[328]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[329]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[330]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[331]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[332]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[333]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[334]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[335]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[347]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[348]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[349]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[350]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[351]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[352]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[353]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[354]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[355]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[356]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[357]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[358]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[359]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[360]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[361]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[362]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[363]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[364]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[365]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[366]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[367]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[379]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[380]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[381]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[382]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[383]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[384]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[385]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[386]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[387]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[388]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[389]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[390]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[391]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[392]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[393]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[394]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[395]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[396]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[397]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[398]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[399]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[411]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[412]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[413]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[414]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[415]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[416]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[417]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[418]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[419]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[420]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[421]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[422]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[423]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[424]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[425]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[426]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[427]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[428]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[429]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[430]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[431]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[443]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[444]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[445]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[446]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[447]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[448]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[449]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[450]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[451]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[452]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[453]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[454]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[455]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[456]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[457]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[458]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[459]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[460]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[461]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[462]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[463]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[475]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[476]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[477]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[478]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[479]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[480]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[481]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[482]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[483]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[484]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[485]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[486]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[487]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[488]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[489]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[490]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[491]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[492]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[493]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[494]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[495]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[507]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[508]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[509]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[510]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[511]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[512]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[513]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[514]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[515]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[516]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[517]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[518]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[519]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[520]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[521]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[522]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[523]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[524]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[525]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[526]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[527]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[539]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[540]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[541]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[542]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[543]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[544]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[545]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[546]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[547]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[548]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[549]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[550]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[551]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[552]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[553]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[554]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[555]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[556]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[557]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[558]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[559]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[571]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[572]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[573]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[574]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[575]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[576]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[577]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[578]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[579]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[580]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[581]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[582]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[583]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[584]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[585]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[586]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[587]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[588]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[589]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[590]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[591]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[603]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[604]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[605]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[606]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[607]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[608]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[609]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[610]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[611]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[612]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[613]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[614]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[615]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[616]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[617]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[618]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[619]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[620]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[621]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[622]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[623]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[635]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[636]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[637]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[638]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[639]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[640]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[641]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[642]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[643]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[644]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[645]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[646]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[647]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[648]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[649]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[650]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[651]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[652]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[653]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[654]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[655]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[667]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[668]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[669]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[670]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[671]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[672]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[673]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[674]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[675]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[676]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[677]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[678]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[679]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[680]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[681]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[682]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[683]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[684]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[685]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[686]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[687]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[699]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[700]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[701]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[702]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[703]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[704]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[705]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[706]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[707]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[708]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[709]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[710]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[711]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[712]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[713]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[714]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[715]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[716]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[717]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[718]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[719]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[731]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[732]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[733]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[734]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[735]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[736]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[737]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[738]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[739]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[740]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[741]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[742]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[743]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[744]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[745]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[746]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[747]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[748]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[749]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[750]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[751]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[763]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[764]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[765]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[766]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[767]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[768]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[769]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[770]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[771]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[772]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[773]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[774]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[775]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[776]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[777]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[778]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[779]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[780]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[781]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[782]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_2|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[783]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[0]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[1]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[2]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[3]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[4]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[5]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[6]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[7]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[19]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[20]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[21]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[22]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[23]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[24]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[25]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[26]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[27]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[28]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[29]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[30]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[31]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[32]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[33]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[34]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[35]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[36]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[37]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[38]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[39]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[51]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[52]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[53]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[54]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[55]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[56]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[57]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[58]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[59]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[60]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[61]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[62]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[63]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[64]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[65]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[66]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[67]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[68]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[69]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[70]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[71]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[83]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[84]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[85]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[86]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[87]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[88]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[89]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[90]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[91]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[92]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[93]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[94]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[95]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[96]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[97]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[98]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[99]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[100]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[101]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[102]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[103]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[115]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[116]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[117]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[118]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[119]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[120]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[121]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[122]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[123]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[124]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[125]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[126]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[127]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[128]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[129]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[130]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[131]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[132]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[133]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[134]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[135]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[147]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[148]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[149]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[150]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[151]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[152]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[153]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[154]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[155]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[156]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[157]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[158]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[159]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[160]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[161]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[162]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[163]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[164]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[165]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[166]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[167]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[179]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[180]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[181]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[182]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[183]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[184]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[185]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[186]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[187]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[188]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[189]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[190]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[191]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[192]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[193]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[194]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[195]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[196]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[197]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[198]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[199]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[211]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[212]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[213]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[214]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[215]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[216]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[217]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[218]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[219]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[220]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[221]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[222]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[223]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[224]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[225]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[226]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[227]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[228]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[229]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[230]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[231]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[243]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[244]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[245]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[246]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[247]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[248]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[249]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[250]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[251]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[252]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[253]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[254]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[255]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[256]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[257]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[258]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[259]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[260]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[261]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[262]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[263]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[275]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[276]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[277]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[278]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[279]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[280]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[281]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[282]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[283]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[284]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[285]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[286]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[287]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[288]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[289]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[290]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[291]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[292]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[293]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[294]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[295]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[307]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[308]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[309]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[310]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[311]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[312]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[313]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[314]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[315]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[316]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[317]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[318]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[319]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[320]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[321]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[322]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[323]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[324]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[325]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[326]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[327]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[339]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[340]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[341]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[342]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[343]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[344]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[345]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[346]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[347]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[348]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[349]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[350]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[351]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[352]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[353]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[354]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[355]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[356]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[357]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[358]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[359]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[371]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[372]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[373]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[374]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[375]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[376]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[377]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[378]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[379]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[380]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[381]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[382]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[383]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[384]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[385]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[386]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[387]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[388]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[389]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[390]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[391]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[403]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[404]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[405]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[406]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[407]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[408]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[409]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[410]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[411]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[412]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[413]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[414]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[415]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[416]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[417]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[418]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[419]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[420]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[421]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[422]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[423]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[435]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[436]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[437]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[438]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[439]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[440]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[441]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[442]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[443]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[444]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[445]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[446]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[447]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[448]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[449]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[450]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[451]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[452]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[453]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[454]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[455]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[467]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[468]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[469]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[470]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[471]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[472]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[473]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[474]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[475]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[476]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[477]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[478]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[479]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[480]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[481]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[482]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[483]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[484]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[485]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[486]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[487]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[499]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[500]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[501]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[502]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[503]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[504]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[505]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[506]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[507]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[508]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[509]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[510]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[511]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[512]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[513]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[514]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[515]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[516]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[517]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[518]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[519]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[531]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[532]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[533]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[534]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[535]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[536]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[537]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[538]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[539]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[540]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[541]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[542]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[543]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[544]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[545]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[546]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[547]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[548]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[549]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[550]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[551]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[563]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[564]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[565]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[566]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[567]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[568]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[569]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[570]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[571]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[572]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[573]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[574]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[575]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[576]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[577]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[578]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[579]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[580]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[581]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[582]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[583]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[595]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[596]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[597]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[598]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[599]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[600]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[601]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[602]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[603]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[604]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[605]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[606]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[607]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[608]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[609]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[610]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[611]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[612]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[613]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[614]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[615]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[627]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[628]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[629]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[630]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[631]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[632]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[633]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[634]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[635]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[636]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[637]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[638]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[639]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[640]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[641]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[642]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[643]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[644]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[645]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[646]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[647]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[659]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[660]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[661]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[662]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[663]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[664]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[665]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[666]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[667]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[668]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[669]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[670]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[671]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[672]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[673]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[674]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[675]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[676]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[677]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[678]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[679]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[691]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[692]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[693]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[694]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[695]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[696]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[697]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[698]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[699]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[700]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[701]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[702]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[703]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[704]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[705]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[706]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[707]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[708]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[709]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[710]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[711]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[723]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[724]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[725]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[726]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[727]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[728]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[729]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[730]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[731]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[732]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[733]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[734]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[735]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[736]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[737]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[738]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[739]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[740]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[741]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[742]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[743]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[755]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[756]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[757]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[758]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[759]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[760]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[761]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[762]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[763]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[764]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[765]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[766]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[767]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[768]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[769]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[770]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[771]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[772]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[773]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[774]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[775]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[787]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[788]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[789]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[790]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_1|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[791]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[11]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[12]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[13]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[14]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[15]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[16]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[17]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[18]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[19]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[20]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[21]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[22]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[23]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[24]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[25]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[26]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[27]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[28]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[29]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[30]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[31]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[43]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[44]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[45]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[46]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[47]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[48]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[49]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[50]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[51]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[52]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[53]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[54]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[55]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[56]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[57]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[58]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[59]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[60]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[61]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[62]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[63]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[75]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[76]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[77]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[78]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[79]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[80]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[81]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[82]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[83]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[84]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[85]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[86]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[87]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[88]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[89]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[90]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[91]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[92]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[93]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[94]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[95]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[107]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[108]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[109]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[110]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[111]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[112]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[113]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[114]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[115]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[116]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[117]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[118]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[119]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[120]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[121]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[122]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[123]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[124]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[125]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[126]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[127]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[139]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[140]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[141]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[142]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[143]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[144]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[145]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[146]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[147]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[148]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[149]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[150]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[151]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[152]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[153]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[154]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[155]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[156]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[157]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[158]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[159]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[171]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[172]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[173]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[174]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[175]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[176]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[177]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[178]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[179]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[180]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[181]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[182]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[183]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[184]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[185]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[186]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[187]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[188]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[189]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[190]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[191]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[203]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[204]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[205]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[206]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[207]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[208]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[209]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[210]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[211]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[212]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[213]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[214]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[215]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[216]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[217]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[218]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[219]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[220]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[221]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[222]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[223]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[235]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[236]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[237]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[238]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[239]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[240]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[241]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[242]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[243]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[244]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[245]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[246]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[247]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[248]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[249]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[250]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[251]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[252]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[253]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[254]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[255]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[267]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[268]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[269]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[270]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[271]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[272]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[273]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[274]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[275]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[276]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[277]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[278]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[279]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[280]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[281]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[282]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[283]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[284]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[285]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[286]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[287]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[299]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[300]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[301]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[302]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[303]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[304]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[305]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[306]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[307]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[308]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[309]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[310]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[311]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[312]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[313]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[314]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[315]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[316]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[317]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[318]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[319]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[331]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[332]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[333]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[334]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[335]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[336]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[337]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[338]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[339]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[340]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[341]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[342]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[343]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[344]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[345]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[346]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[347]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[348]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[349]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[350]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[351]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[363]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[364]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[365]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[366]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[367]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[368]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[369]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[370]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[371]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[372]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[373]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[374]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[375]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[376]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[377]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[378]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[379]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[380]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[381]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[382]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[383]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[395]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[396]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[397]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[398]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[399]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[400]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[401]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[402]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[403]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[404]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[405]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[406]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[407]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[408]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[409]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[410]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[411]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[412]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[413]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[414]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[415]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[427]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[428]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[429]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[430]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[431]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[432]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[433]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[434]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[435]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[436]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[437]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[438]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[439]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[440]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[441]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[442]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[443]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[444]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[445]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[446]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[447]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[459]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[460]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[461]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[462]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[463]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[464]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[465]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[466]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[467]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[468]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[469]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[470]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[471]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[472]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[473]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[474]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[475]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[476]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[477]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[478]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[479]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[491]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[492]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[493]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[494]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[495]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[496]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[497]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[498]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[499]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[500]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[501]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[502]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[503]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[504]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[505]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[506]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[507]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[508]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[509]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[510]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[511]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[523]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[524]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[525]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[526]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[527]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[528]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[529]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[530]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[531]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[532]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[533]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[534]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[535]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[536]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[537]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[538]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[539]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[540]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[541]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[542]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[543]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[555]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[556]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[557]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[558]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[559]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[560]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[561]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[562]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[563]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[564]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[565]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[566]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[567]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[568]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[569]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[570]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[571]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[572]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[573]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[574]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[575]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[587]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[588]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[589]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[590]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[591]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[592]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[593]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[594]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[595]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[596]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[597]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[598]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[599]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[600]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[601]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[602]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[603]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[604]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[605]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[606]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[607]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[619]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[620]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[621]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[622]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[623]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[624]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[625]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[626]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[627]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[628]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[629]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[630]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[631]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[632]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[633]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[634]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[635]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[636]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[637]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[638]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[639]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[651]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[652]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[653]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[654]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[655]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[656]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[657]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[658]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[659]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[660]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[661]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[662]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[663]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[664]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[665]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[666]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[667]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[668]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[669]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[670]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[671]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[683]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[684]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[685]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[686]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[687]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[688]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[689]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[690]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[691]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[692]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[693]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[694]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[695]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[696]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[697]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[698]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[699]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[700]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[701]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[702]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[703]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[715]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[716]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[717]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[718]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[719]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[720]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[721]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[722]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[723]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[724]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[725]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[726]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[727]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[728]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[729]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[730]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[731]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[732]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[733]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[734]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[735]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[747]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[748]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[749]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[750]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[751]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[752]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[753]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[754]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[755]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[756]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[757]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[758]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[759]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[760]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[761]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[762]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[763]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[764]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[765]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[766]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[767]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[779]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[780]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[781]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[782]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[783]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[784]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[785]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[786]" -Thu 15:14: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[787]" -Thu 15:19: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[788]" -Thu 15:19: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[789]" -Thu 15:19: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[790]" -Thu 15:19: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|WideFifoWithLevel_3073_512_16_16_false_792_TO:RdFromRAM_WFifo_cmd_cmd_indptr_0_indptr|AlteraFifoEntity_792_512_792_dualclock_aclr_rdusedw_wrusedw_pfv490_pev22:fifo_0|dcfifo:inst_ln38_mwfifo|dcfifo_fk62:auto_generated|altsyncram_sbe1:fifo_ram|q_b[791]" -Thu 15:19: INFO : Info (286031): Timing-Driven Synthesis is running on partition "Top" -Thu 15:19: INFO : Warning (14284): Synthesized away the following node(s): -Thu 15:19: INFO : Warning (14285): Synthesized away the following LCELL buffer node(s): -Thu 15:19: INFO : Warning (14320): Synthesized away node "AlteraClockGenerator_250_100_STREAM:STREAM0_clock_gen_i|StratixVClockManager_in250_out_f100p0dc50_f100p180dc50:inst_ln11_clockmanager|altera_pll_reconfig_top:altera_pll_reconfig_i|dyn_phase_shift:dyn_phase_shift_inst|gnd" -Thu 15:19: INFO : Info (19000): Inferred 1 megafunctions from design logic -Thu 15:19: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_rom:l2pch|rom_l2p_ch_rtl_0" -Thu 15:19: INFO : Info (286033): Parameter OPERATION_MODE set to BIDIR_DUAL_PORT -Thu 15:19: INFO : Info (286033): Parameter WIDTH_A set to 32 -Thu 15:19: INFO : Info (286033): Parameter WIDTH_B set to 32 -Thu 15:19: INFO : Info (286033): Parameter WIDTHAD_A set to 7 -Thu 15:19: INFO : Info (286033): Parameter WIDTHAD_B set to 7 -Thu 15:19: INFO : Info (286033): Parameter NUMWORDS_A set to 128 -Thu 15:19: INFO : Info (286033): Parameter NUMWORDS_B set to 128 -Thu 15:19: INFO : Info (286033): Parameter OUTDATA_REG_A set to UNREGISTERED -Thu 15:19: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:19: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 -Thu 15:19: INFO : Info (286033): Parameter INDATA_REG_B set to CLOCK0 -Thu 15:19: INFO : Info (286033): Parameter WRCONTROL_WRADDRESS_REG_B set to CLOCK0 -Thu 15:19: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:19: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:19: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:19: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:19: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:19: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:19: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_sv_xrbasic_l2p_rom_a2c9d7fe.hdl.mif -Thu 15:23: INFO : Info (12130): Elaborated megafunction instantiation "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_rom:l2pch|altsyncram:rom_l2p_ch_rtl_0" -Thu 15:23: INFO : Info (12133): Instantiated megafunction "StratixPCIeBase:PCIeBase_i|TransceiverReconfig:pcie_xcvr_reconfig_i|pcie_xcvr_reconfig_SV:inst_ln9_tranceiverreconfigext_v13_0|pcie_reconfig_SV:pcie_reconfig_inst|alt_xcvr_reconfig:pcie_reconfig_sv_inst|alt_xcvr_reconfig_basic:basic|sv_xcvr_reconfig_basic:s5|sv_xrbasic_lif:lif[0].logical_if|sv_xrbasic_lif_csr:lif_csr|sv_xrbasic_l2p_rom:l2pch|altsyncram:rom_l2p_ch_rtl_0" with the following parameter: -Thu 15:23: INFO : Info (12134): Parameter "OPERATION_MODE" = "BIDIR_DUAL_PORT" -Thu 15:23: INFO : Info (12134): Parameter "WIDTH_A" = "32" -Thu 15:23: INFO : Info (12134): Parameter "WIDTH_B" = "32" -Thu 15:23: INFO : Info (12134): Parameter "WIDTHAD_A" = "7" -Thu 15:23: INFO : Info (12134): Parameter "WIDTHAD_B" = "7" -Thu 15:23: INFO : Info (12134): Parameter "NUMWORDS_A" = "128" -Thu 15:23: INFO : Info (12134): Parameter "NUMWORDS_B" = "128" -Thu 15:23: INFO : Info (12134): Parameter "OUTDATA_REG_A" = "UNREGISTERED" -Thu 15:23: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" -Thu 15:23: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" -Thu 15:23: INFO : Info (12134): Parameter "INDATA_REG_B" = "CLOCK0" -Thu 15:23: INFO : Info (12134): Parameter "WRCONTROL_WRADDRESS_REG_B" = "CLOCK0" -Thu 15:23: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" -Thu 15:23: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" -Thu 15:23: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" -Thu 15:23: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" -Thu 15:23: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" -Thu 15:23: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" -Thu 15:23: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_sv_xrbasic_l2p_rom_a2c9d7fe.hdl.mif" -Thu 15:23: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_dr72.tdf -Thu 15:23: INFO : Info (12023): Found entity 1: altsyncram_dr72 -Thu 15:23: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:5:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. -Thu 15:23: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:4:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. -Thu 15:23: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:2:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. -Thu 15:28: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:1:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. -Thu 15:28: INFO : Warning (276027): Inferred dual-clock RAM node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:0:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" from synchronous design logic. The read-during-write behavior of a dual-clock RAM is undefined and may not match the behavior of the original design. -Thu 15:28: INFO : Info (19000): Inferred 157 megafunctions from design logic -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:5:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:4:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:3:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:2:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:1:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:0:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 7 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 128 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:5:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:4:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:3:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:2:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:1:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276038): Inferred altdpram megafunction from the following logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:0:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 35 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD set to 6 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS set to 64 -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_REG set to OUTCLOCK -Thu 15:28: INFO : Info (286033): Parameter RDADDRESS_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter INDATA_REG set to INCLOCK -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR set to OFF -Thu 15:28: INFO : Info (286033): Parameter LPM_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to LUTRAM -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 10 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 9 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 512 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 10 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 9 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 512 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_b2f3a5dc.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 43 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 7 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 128 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 43 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 7 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 128 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_694e02e5.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:5:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:4:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:3:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK0 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif -Thu 15:28: INFO : Info (286033): Parameter RDCONTROL_REG_B set to CLOCK0 -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:2:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:1:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:0:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 256 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 576 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 8 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 256 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 52 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 5 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 32 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 52 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 5 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 32 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_44069b11.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 52 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 5 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 32 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 52 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 5 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 32 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_44069b11.hdl.mif -Thu 15:28: INFO : Info (276029): Inferred altsyncram megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|mem_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter OPERATION_MODE set to DUAL_PORT -Thu 15:28: INFO : Info (286033): Parameter WIDTH_A set to 52 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_A set to 5 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_A set to 32 -Thu 15:28: INFO : Info (286033): Parameter WIDTH_B set to 52 -Thu 15:28: INFO : Info (286033): Parameter WIDTHAD_B set to 5 -Thu 15:28: INFO : Info (286033): Parameter NUMWORDS_B set to 32 -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter OUTDATA_ACLR_B set to NONE -Thu 15:28: INFO : Info (286033): Parameter ADDRESS_REG_B set to CLOCK1 -Thu 15:28: INFO : Info (286033): Parameter INDATA_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter WRCONTROL_ACLR_A set to NONE -Thu 15:28: INFO : Info (286033): Parameter RAM_BLOCK_TYPE set to M20K -Thu 15:28: INFO : Info (286033): Parameter INIT_FILE set to db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_44069b11.hdl.mif -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 15 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|ssra_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 15 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv2_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 14 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv3_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 13 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv4_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 12 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id256_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id253_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id250_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id247_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id244_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id241_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id238_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id235_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id232_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id229_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id226_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id223_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id220_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id217_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id214_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv5_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|ssra_rtl_1" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 11 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln117_maxdcintegerdiv_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 2 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 8 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 2 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv6_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 10 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln117_maxdcintegerdiv2_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 2 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 7 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv7_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 9 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d:mapped_reg_block|mapped_register:inst_ln504_mappedregblock7|mapped_registers_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 8 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 7 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|reg_ln119_maxdcintegerdiv8_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 8 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 4 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock6|mapped_registers_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 7 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 7 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 5 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 11 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|ssra_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 5 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 63 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id588_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id524_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id460_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id396_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id335_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id305_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id304_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id303_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id302_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id301_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id300_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id299_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id298_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id297_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id296_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id295_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id294_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id293_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id292_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id291_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id290_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id289_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id288_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id287_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id286_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id285_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id284_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id283_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id282_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id281_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id280_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id279_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id278_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id277_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id276_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id275_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id274_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id273_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id272_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id271_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id270_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id269_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id268_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id267_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id266_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id265_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id264_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id263_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id262_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id261_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id260_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id259_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 13 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock|mapped_register:inst_ln504_mappedregblock|mapped_registers_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 4 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 8 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|aligned_dataa_exp_dffe12_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 29 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id258_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id257_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id256_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id255_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id254_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id253_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id252_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id251_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id250_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id249_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id248_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id247_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id246_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id245_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id244_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id243_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id242_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id241_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id240_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id239_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id238_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id237_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id236_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id235_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id234_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id233_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id232_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id231_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id230_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id229_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id228_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id227_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id226_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id225_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id224_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id223_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id222_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id221_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id220_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id219_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id218_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id217_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id216_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id215_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id214_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id213_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id212_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (276034): Inferred altshift_taps megafunction from the following design logic: "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id211_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|delay_exp2_bias_rtl_0" -Thu 15:28: INFO : Info (286033): Parameter NUMBER_OF_TAPS set to 1 -Thu 15:28: INFO : Info (286033): Parameter TAP_DISTANCE set to 3 -Thu 15:28: INFO : Info (286033): Parameter WIDTH set to 26 -Thu 15:28: INFO : Info (286033): Parameter POWER_UP_STATE set to DONT_CARE -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:5:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altdpram:mem_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_wrdata_fifo:5:MIGDataWr_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altdpram:mem_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "576" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD" = "7" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS" = "128" -Thu 15:28: INFO : Info (12134): Parameter "WRADDRESS_REG" = "INCLOCK" -Thu 15:28: INFO : Info (12134): Parameter "WRADDRESS_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_REG" = "INCLOCK" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "RDADDRESS_REG" = "OUTCLOCK" -Thu 15:28: INFO : Info (12134): Parameter "RDADDRESS_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_REG" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_REG" = "INCLOCK" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "LPM_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_1fc47f91.hdl.mif" -Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "LUTRAM" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_5052.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: dpram_5052 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/mux_1kb.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: mux_1kb -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:5:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altdpram:mem_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_migcmd_fifo:5:MIGCMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altdpram:mem_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "35" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD" = "6" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS" = "64" -Thu 15:28: INFO : Info (12134): Parameter "WRADDRESS_REG" = "INCLOCK" -Thu 15:28: INFO : Info (12134): Parameter "WRADDRESS_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_REG" = "INCLOCK" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "RDADDRESS_REG" = "OUTCLOCK" -Thu 15:28: INFO : Info (12134): Parameter "RDADDRESS_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_REG" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_REG" = "INCLOCK" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR" = "OFF" -Thu 15:28: INFO : Info (12134): Parameter "LPM_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_dfd4db9b.hdl.mif" -Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "LUTRAM" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_7152.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: dpram_7152 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "10" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "9" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "512" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "10" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "9" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "512" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" -Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_b2f3a5dc.hdl.mif" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_ru02.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_ru02 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "43" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "7" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "128" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "43" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "7" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "128" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" -Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_694e02e5.hdl.mif" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_3r02.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_3r02 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:5:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:5:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "576" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "8" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "256" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "576" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "8" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "256" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK1" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" -Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_jh12.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_jh12 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:3:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\ddr3_mig_rddata_fifo:3:MIGDataRd_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "576" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "8" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "256" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "576" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "8" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "256" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" -Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_816a203e.hdl.mif" -Thu 15:28: INFO : Info (12134): Parameter "RDCONTROL_REG_B" = "CLOCK0" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_hr32.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_hr32 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_A" = "52" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_A" = "5" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_A" = "32" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH_B" = "52" -Thu 15:28: INFO : Info (12134): Parameter "WIDTHAD_B" = "5" -Thu 15:28: INFO : Info (12134): Parameter "NUMWORDS_B" = "32" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK1" -Thu 15:28: INFO : Info (12134): Parameter "INDATA_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE" -Thu 15:28: INFO : Info (12134): Parameter "RAM_BLOCK_TYPE" = "M20K" -Thu 15:28: INFO : Info (12134): Parameter "INIT_FILE" = "db/MAX4MAIAPeripheryTop.ram0_DualPortRAM_SyncRd_Altera_44069b11.hdl.mif" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_o812.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_o812 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv1_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv1_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "15" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_2u31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_2u31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_f9e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_f9e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_fkf.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_fkf -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_eac.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cmpr_eac -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|altshift_taps:ssra_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_32x16:node_id630_nodefifo|SRLDelay_32x16_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|altshift_taps:ssra_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "15" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv2_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv2_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "14" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_1u31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_1u31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_d9e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_d9e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ekf.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_ekf -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv3_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv3_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "13" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_0u31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_0u31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_b9e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_b9e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_dkf.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_dkf -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv4_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv4_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "12" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_vt31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_vt31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_99e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_99e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_ckf.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_ckf -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id256_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|altshift_taps:exp_result_ff_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id256_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|altshift_taps:exp_result_ff_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "11" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "63" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_jv31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_jv31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_hce1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_hce1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_bkf.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_bkf -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv5_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv5_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "11" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ut31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ut31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_79e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_79e1 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln117_maxdcintegerdiv_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln117_maxdcintegerdiv_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "2" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "8" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "2" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_js31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_js31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_h6e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_h6e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_0jf.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_0jf -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv6_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv6_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "10" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_tt31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_tt31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_59e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_59e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_akf.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_akf -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln117_maxdcintegerdiv2_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCDivMod_A32_B6_R32_Pipe16_Squash3fe0000000000000:node_id320_nodedivmod|MaxDCIntegerDiv_Num32_Denom6_Skip0_Frac0_Rem_Pipe16_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln117_maxdcintegerdiv2_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "2" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "7" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ks31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ks31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_n6e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_n6e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_vif.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_vif -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_dac.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cmpr_dac -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv7_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv7_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "9" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ls31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ls31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_l6e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_l6e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_2jf.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_2jf -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d:mapped_reg_block|mapped_register:inst_ln504_mappedregblock7|altshift_taps:mapped_registers_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_9415417f3a1073d21bc785e9db6a9c9d:mapped_reg_block|mapped_register:inst_ln504_mappedregblock7|altshift_taps:mapped_registers_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "8" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "7" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ns31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ns31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_o6e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_o6e1 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv8_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MaxDCFixedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18:node_id324_nodediv|MaxDCUnsignedDiv_A32_0_UNSIGNED_B32_0_UNSIGNED_R32_0_UNSIGNED_ToNear_Pipe18_Squash3fe0000000000000:inst_ln37_maxdcunsigneddiv|MaxDCIntegerDiv_Num32_Denom32_Skip0_Frac1_Rem_Pipe17_Squash3fe0000000000000:inst_ln49_maxdcintegerdiv|altshift_taps:reg_ln119_maxdcintegerdiv8_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "8" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "4" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ms31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ms31 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock6|altshift_taps:mapped_registers_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvCacheKernel:SpmvCacheKernel|SpmvCacheKernel_streamwrapper:inst_ln31_streamingblock|MappedRegBlock_7ddc1e2e3aeb33f8770e829ace478752:mapped_reg_block|mapped_register:inst_ln504_mappedregblock6|altshift_taps:mapped_registers_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "7" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "7" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_os31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_os31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_m6e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_m6e1 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|altshift_taps:data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|altshift_taps:data_exp_dffe1_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "5" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "11" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_3u31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_3u31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_89e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_89e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_tif.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_tif -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|altshift_taps:ssra_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MultiStageDelay_64x5:node_id692_nodefifo|SRLDelay_64x5_reg1:SRLDelay|SimpleSR:inst_ln25_alterasrldelay|altshift_taps:ssra_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "5" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "63" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_6u31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_6u31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_l9e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_l9e1 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id588_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|altshift_taps:data_exp_dffe1_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_ADD_inpipe0_outpipe0:node_id588_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat10_ADD_ce_altfp_add_sub_rlj_component|altshift_taps:data_exp_dffe1_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "4" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "13" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_4u31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_4u31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_a9e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_a9e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_rif.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_rif -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock|mapped_register:inst_ln504_mappedregblock|altshift_taps:mapped_registers_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|SignalForwardingAdapter_stream_reset_memory_interrupt_crash_packet_sysmon_reset_pcc_switch_regs_pcc_start_pcc_reset_partial_reconfig_0:SignalForwardingAdapter_i|MappedRegBlock_4cdf0f923c75d2a0461d279b0adb9830:inst_ln130_mappedregblock|mapped_register:inst_ln504_mappedregblock|altshift_taps:mapped_registers_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "4" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "8" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_ps31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_ps31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_f6e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_f6e1 -Thu 15:28: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|altshift_taps:aligned_dataa_exp_dffe12_rtl_0" -Thu 15:28: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvReductionKernel:SpmvReductionKernel|SpmvReductionKernel_streamwrapper:inst_ln31_streamingblock|SpmvReductionKernel:SpmvReductionKernel_core|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_ADD_inpipe0_outpipe0:node_id11_nodeadd|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj:MWFloatingPointUnit_quartusv13_0_0_ADD_SUB_11x53to11x53_lat14_ADD_ce_altfp_add_sub_vlj_component|altshift_taps:aligned_dataa_exp_dffe12_rtl_0" with the following parameter: -Thu 15:28: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:28: INFO : Info (12134): Parameter "TAP_DISTANCE" = "3" -Thu 15:28: INFO : Info (12134): Parameter "WIDTH" = "29" -Thu 15:28: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_7u31.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: shift_taps_7u31 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_j9e1.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: altsyncram_j9e1 -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_qif.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cntr_qif -Thu 15:28: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_cac.tdf -Thu 15:28: INFO : Info (12023): Found entity 1: cmpr_cac -Thu 15:29: INFO : Info (12130): Elaborated megafunction instantiation "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id258_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|altshift_taps:delay_exp2_bias_rtl_0" -Thu 15:29: INFO : Info (12133): Instantiated megafunction "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|Manager_Spmv:wrapper_entity|Manager_Spmv_WrapperNodeEntity_SpmvKernel:SpmvKernel|SpmvKernel_streamwrapper:inst_ln31_streamingblock|SpmvKernel:SpmvKernel_core|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_MUL_inpipe0_outpipe0:node_id258_nodemul|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce:fpu|MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco:MWFloatingPointUnit_quartusv13_0_0_MULT_11x53to11x53_lat10_ce_altfp_mult_lco_component|altshift_taps:delay_exp2_bias_rtl_0" with the following parameter: -Thu 15:29: INFO : Info (12134): Parameter "NUMBER_OF_TAPS" = "1" -Thu 15:29: INFO : Info (12134): Parameter "TAP_DISTANCE" = "3" -Thu 15:29: INFO : Info (12134): Parameter "WIDTH" = "26" -Thu 15:29: INFO : Info (12134): Parameter "POWER_UP_STATE" = "DONT_CARE" -Thu 15:29: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/shift_taps_5u31.tdf -Thu 15:29: INFO : Info (12023): Found entity 1: shift_taps_5u31 -Thu 15:29: INFO : Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_e9e1.tdf -Thu 15:29: INFO : Info (12023): Found entity 1: altsyncram_e9e1 -Thu 15:29: INFO : Warning (14284): Synthesized away the following node(s): -Thu 15:29: INFO : Warning (14285): Synthesized away the following RAM node(s): -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a43" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a43" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a43" -Thu 15:29: INFO : Warning (14284): Synthesized away the following node(s): -Thu 15:29: INFO : Warning (14285): Synthesized away the following RAM node(s): -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a44" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a45" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a46" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a47" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a49" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a50" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:0:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a51" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a44" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a45" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a46" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a47" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a49" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a50" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:1:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a51" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a44" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a45" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a46" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a47" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a49" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a50" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Async_FIFO_Altera:\CMD_FIFOs:2:CMD_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_o812:auto_generated|ram_block1a51" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a2" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a3" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a4" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a5" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a6" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a7" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a8" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a9" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a10" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a11" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a12" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a13" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a14" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a15" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a16" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a17" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a18" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a19" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a20" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a21" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a22" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a23" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a24" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a25" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a26" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a27" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a28" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a29" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a30" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a31" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a32" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a33" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a34" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a35" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a36" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a37" -Thu 15:29: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a38" -Thu 15:34: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a39" -Thu 15:34: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a40" -Thu 15:34: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:RdMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_3r02:auto_generated|ram_block1a41" -Thu 15:34: INFO : Warning (14320): Synthesized away node "MAX4FPGATop:MAX4MaiaFabricTop_i|FPGAWrapperEntity_Manager_Spmv:wrapper|MemoryControllerPro_DDR3A_MAIA_512_CMDFIFOREGINRAM_DATAFIFOREG_DATARDFIFOREG_perfmode_32_8_8_Debug_AddrGenOwnClk_RdClks_WrClks_DDRBurstSize8_MAX4qm_Parity72:memctrlpro_maia_sodimms|MemCtrlPro_Altera:inst_ln1948_memorycontrollerpro|Sync_FIFO_Altera:WrMux_FIFO|DualPortRAM_SyncRd_Altera:\RAM_Generic:FIFO_DPRAM|altsyncram:mem_rtl_0|altsyncram_ru02:auto_generated|ram_block1a9" -Thu 15:34: INFO : Warning (12241): 2 hierarchies have connectivity warnings - see the Connectivity Checks report folder -Thu 15:34: INFO : Info (281020): Starting Logic Optimization and Technology Mapping for Top Partition -Thu 15:34: INFO : Warning (286002): Ignored following assignments for SYNTH_CRITICAL_CLOCK -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|clk_pcie" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm1_clk_afi_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm1_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm2_clk_afi_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm2_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm3_clk_afi_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm3_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm4_clk_afi_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm4_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm5_clk_afi_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm5_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm6_clk_afi_clk" -- no registers were found for this clock -Thu 15:34: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm6_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:34: INFO : Info (18062): Inserted logic cells for Maximum Fan-Out assignment -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][0]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][17]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][16]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][15]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][14]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][13]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][12]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][11]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][10]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][9]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][8]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][7]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][6]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][5]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][4]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][3]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][2]" -Thu 15:34: INFO : Info (18058): Inserted 1 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|dataout_r[0][1]" -Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" -Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" -Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" -Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" -Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" -Thu 15:34: INFO : Info (18058): Inserted 8 logic cells for Maximum Fan-Out assignment on "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_c0:c0|alt_mem_if_nextgen_ddr3_controller_core:ng0|alt_mem_ddrx_controller_st_top:alt_mem_ddrx_controller_top_inst|alt_mem_ddrx_controller:controller_inst|alt_mem_ddrx_tbp:tbp_inst|int_tbp_full" -Thu 15:34: INFO : Info (17049): 43822 registers lost all their fanouts during netlist optimizations. -Thu 15:34: INFO : Info (17016): Found the following redundant logic cells in design -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_mask_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_m_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_m_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_m_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_p0:p0|ddr3_72_800_m_u_q_p0_memphy:umemphy|ddr3_72_800_m_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_m_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_non_ldc_pad:ureset_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucas_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uras_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uwe_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uodt_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucke_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ucs_n_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:ubank_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pads:uaddr_cmd_pads|ddr3_72_800_sl_u_q_p0_addr_cmd_ldc_pad:uaddress_pad|ddr3_72_800_sl_u_q_p0_simple_ddio_out:qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:write_rank_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:oct_ena_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dqs_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:wrdata_en_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[3].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[2].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[71].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[70].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[69].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[68].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[67].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[66].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[65].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[64].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[63].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[62].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[61].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[60].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[59].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[58].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[57].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[56].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[55].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[54].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[53].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[52].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[51].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[50].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[49].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[48].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[47].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[46].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[45].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[44].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[43].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[42].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[41].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[40].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[39].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[38].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[37].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[36].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[35].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[34].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[33].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[32].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[31].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[30].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[29].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[28].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[27].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[26].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[25].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[24].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[23].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[22].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[21].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[20].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[19].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[18].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[17].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[16].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[15].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[14].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[13].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[12].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[11].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[10].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[9].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[8].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[7].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[6].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[5].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[4].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[3].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[2].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_new_io_pads:uio_pads|ddr3_72_800_sl_u_q_p0_simple_ddio_out:dq_qr_to_hr|ddio_group[0].sig[1].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[0].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[1].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[2].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[3].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[4].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[5].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[6].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[7].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_buffering[8].read_enable_from_lfifo_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[8].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[7].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[6].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[5].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[4].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[3].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[2].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[1].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_rank_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[0].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_p0:p0|ddr3_72_800_sl_u_q_p0_memphy:umemphy|ddr3_72_800_sl_u_q_p0_read_datapath:uread_datapath|ddr3_72_800_sl_u_q_p0_simple_ddio_out:read_valid_predict[0].vfifo_out_qr_to_hr|ddio_group[1].sig[0].muxsel_buff" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_6_controller:sodimm_6_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_5_controller:sodimm_5_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_4_controller:sodimm_4_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_3_controller:sodimm_3_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_2_controller:sodimm_2_ddr3_core|ddr3_72_800_m_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_m_u_q:core|ddr3_72_800_m_u_q_0002:ddr3_72_800_m_u_q_inst|ddr3_72_800_m_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[8]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[7]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[6]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[5]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[4]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[3]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[2]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[1]" -Thu 15:34: INFO : Info (17048): Logic cell "StratixVDDR3_sodimm_1_controller:sodimm_1_ddr3_core|ddr3_72_800_sl_u_q_wrap:inst_stratixvddr3_core|ddr3_72_800_sl_u_q:core|ddr3_72_800_sl_u_q_0002:ddr3_72_800_sl_u_q_inst|ddr3_72_800_sl_u_q_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_read_increment_vfifo_fr_combined[0]" -Thu 15:34: INFO : Info (21057): Implemented 101076 device resources after synthesis - the final resource count might be different -Thu 15:34: INFO : Info (21058): Implemented 20 input pins -Thu 15:34: INFO : Info (21059): Implemented 208 output pins -Thu 15:34: INFO : Info (21060): Implemented 566 bidirectional pins -Thu 15:34: INFO : Info (21061): Implemented 84401 logic cells -Thu 15:34: INFO : Info (21064): Implemented 6208 RAM segments -Thu 15:34: INFO : Info (21065): Implemented 18 PLLs -Thu 15:34: INFO : Info (21066): Implemented 2 delay-locked loops -Thu 15:34: INFO : Info (21071): Implemented 1 partitions -Thu 15:48: INFO : Info (281019): Starting Logic Optimization and Technology Mapping for Partition MAX4FPGATop:MAX4MaiaFabricTop_i -Thu 15:48: INFO : Critical Warning (18061): Ignored Power-Up Level option on the following registers -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_left_dimm_scl_from_host_int will power up to Low -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_left_dimm_sda_from_host_int will power up to Low -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_right_dimm_scl_from_host_int will power up to Low -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_right_dimm_sda_from_host_int will power up to Low -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_aux_scl_from_host_int will power up to Low -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|i2c_aux_sda_from_host_int will power up to Low -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|pmbus_scl_from_host_int will power up to Low -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|pmbus_sda_from_host_int will power up to Low -Thu 15:48: INFO : Critical Warning (18010): Register MAX4FPGATop:MAX4MaiaFabricTop_i|MAX4PCIeSlaveInterface:MAX4PCIeSlaveInterface_i|max_SV_pcie_slave:PCIeSlaveInterface_imp|mapped_elements_reset_i will power up to Low -Thu 15:48: INFO : Warning (286004): Ignored following assignments for SYNTH_CRITICAL_CLOCK for partition "MAX4FPGATop:MAX4MaiaFabricTop_i" -Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm1_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm2_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm3_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm4_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm5_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:48: INFO : Warning (286006): Ignored assignment for SYNTH_CRITICAL_CLOCK for clock "MAX4MaiaFabricTop_i|sodimm6_clk_afi_half_clk" -- no registers were found for this clock -Thu 15:48: INFO : Info (17049): 20139 registers lost all their fanouts during netlist optimizations. -Thu 15:48: INFO : Info (21057): Implemented 340805 device resources after synthesis - the final resource count might be different -Thu 15:48: INFO : Info (21058): Implemented 3838 input pins -Thu 15:48: INFO : Info (21059): Implemented 3954 output pins -Thu 15:48: INFO : Info (21061): Implemented 299321 logic cells -Thu 15:48: INFO : Info (21064): Implemented 33500 RAM segments -Thu 15:48: INFO : Info (21062): Implemented 192 DSP elements -Thu 15:48: INFO : Info: Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 3831 warnings -Thu 15:48: INFO : Info: Peak virtual memory: 8710 megabytes -Thu 15:48: INFO : Info: Processing ended: Thu Sep 10 15:48:53 2015 -Thu 15:48: INFO : Info: Elapsed time: 00:49:49 -Thu 15:48: INFO : Info: Total CPU time (on all processors): 00:48:06 -Thu 15:48: INFO : quartus_map ended (15:48:57 10/09/15, time elapsed: 49 mins, 56 secs) -Thu 15:48: INFO : quartus_map peak virtual memory: 8710 -Thu 15:48: INFO : Build pass 'QuartusMap' took 2996.74 s. -Thu 15:48: PROGRESS: (3/10) - Generate Incremental Netlist (QuartusCdb) -Thu 15:48: INFO : Starting quartus_cdb. (15:48:58 10/09/15) -Thu 15:48: INFO : Running command: export LM_LICENSE_FILE="$LM_LICENSE_FILE:$MAXCOMPILERDIR/lib/MaxCompilerQuartusLicense.dat" ; quartus_cdb MAX4MAIAPeripheryTop --64bit --write_settings_files=off --merge=on -Thu 15:51: INFO : Info: ******************************************************************* -Thu 15:51: INFO : Info: Running Quartus II 64-Bit Partition Merge -Thu 15:51: INFO : Info: Version 13.0.0 Build 156 04/24/2013 SJ Full Version -Thu 15:51: INFO : Info: Copyright (C) 1991-2013 Altera Corporation. All rights reserved. -Thu 15:51: INFO : Info: Your use of Altera Corporation's design tools, logic functions -Thu 15:51: INFO : Info: and other software and tools, and its AMPP partner logic -Thu 15:51: INFO : Info: functions, and any output files from any of the foregoing -Thu 15:51: INFO : Info: (including device programming or simulation files), and any -Thu 15:51: INFO : Info: associated documentation or information are expressly subject -Thu 15:51: INFO : Info: to the terms and conditions of the Altera Program License -Thu 15:51: INFO : Info: Subscription Agreement, Altera MegaCore Function License -Thu 15:51: INFO : Info: Agreement, or other applicable license agreement, including, -Thu 15:51: INFO : Info: without limitation, that your use is for the sole purpose of -Thu 15:51: INFO : Info: programming logic devices manufactured by Altera and sold by -Thu 15:51: INFO : Info: Altera or its authorized distributors. Please refer to the -Thu 15:51: INFO : Info: applicable agreement for further details. -Thu 15:51: INFO : Info: Processing started: Thu Sep 10 15:49:07 2015 -Thu 15:51: INFO : Info: Command: quartus_cdb MAX4MAIAPeripheryTop --write_settings_files=off --merge=on -Thu 15:51: INFO : Info (35007): Using synthesis netlist for partition "Top" -Thu 15:51: INFO : Info (35007): Using synthesis netlist for partition "MAX4FPGATop:MAX4MaiaFabricTop_i" -Thu 15:51: INFO : Info (35002): Resolved and merged 2 partition(s) -Thu 15:51: INFO : Info (16010): Generating hard_block partition "hard_block:auto_generated_inst" -Thu 15:51: INFO : Info (16011): Adding 12442 node(s), including 2724 DDIO, 18 PLL, 0 transceiver and 0 LCELL -Thu 15:51: INFO : Info (35048): Found 96 ports with constant drivers. For more information, refer to the Partition Merger report -Thu 15:51: INFO : Info (35047): Found 140 ports with no fan-out. For more information, refer to the Partition Merger report -Thu 15:51: INFO : Warning (35016): Found partition port(s) not driving logic, possibly wasting area -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[1]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[3]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[5]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[6]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|rx_st_bar[7]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[13]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[14]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[15]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[16]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[17]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[18]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[19]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[20]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[21]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[22]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[23]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[24]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:51: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[25]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:52: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[26]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:52: INFO : Warning (35018): Partition port "MAX4FPGATop:MAX4MaiaFabricTop_i|tl_cfg_ctl[27]", driven by node "StratixPCIeBase:PCIeBase_i|StratixVHardIPPCIe:StratixVHardIPPCIe_i|pcie_SV_hard_ip:pcie_SV_hard_ip_i|altpcie_sv_hip_ast_hwtcl:pcie_sv_hard_ip_inst|altpcie_hip_256_pipen1b:altpcie_hip_256_pipen1b|stratixv_hssi_gen3_pcie_hip", does not drive logic -Thu 15:52: INFO : Warning (35039): Only the first 20 ports are reported. For a full list of ports, refer to the Partition Warnings panel in the Partition Merge report -Thu 15:52: INFO : Info (21057): Implemented 434126 device resources after synthesis - the final resource count might be different -Thu 15:52: INFO : Info (21058): Implemented 20 input pins -Thu 15:52: INFO : Info (21059): Implemented 208 output pins -Thu 15:52: INFO : Info (21060): Implemented 566 bidirectional pins -Thu 15:52: INFO : Info (21061): Implemented 383760 logic cells -Thu 15:52: INFO : Info (21064): Implemented 39708 RAM segments -Thu 15:52: INFO : Info (21065): Implemented 18 PLLs -Thu 15:52: INFO : Info (21066): Implemented 2 delay-locked loops -Thu 15:52: INFO : Info (21062): Implemented 192 DSP elements -Thu 15:52: INFO : Info: Quartus II 64-Bit Partition Merge was successful. 0 errors, 22 warnings -Thu 15:52: INFO : Info: Peak virtual memory: 3226 megabytes -Thu 15:52: INFO : Info: Processing ended: Thu Sep 10 15:52:47 2015 -Thu 15:52: INFO : Info: Elapsed time: 00:03:40 -Thu 15:52: INFO : Info: Total CPU time (on all processors): 00:03:35 -Thu 15:52: INFO : quartus_cdb ended (15:52:48 10/09/15, time elapsed: 3 mins, 49 secs) -Thu 15:52: INFO : quartus_cdb peak virtual memory: 3226 -Thu 15:52: INFO : Build pass 'QuartusCdb' took 229.732 s. -Thu 15:52: PROGRESS: (4/10) - Generate Resource Report (AlteraResourceUsageBuildPass) -Thu 15:52: INFO : Build pass 'AlteraResourceUsageBuildPass' took 9.03282 s. -Thu 15:52: PROGRESS: (5/10) - Generate Annotated Source Code (AlteraResourceAnnotationBuildPass) -Thu 15:52: INFO : Annotating source files (old source files in build directory will be removed first)... -Thu 15:52: INFO : Not deleting directory (does not exist): src_annotated_preliminary -Thu 15:53: INFO : annotated 2 source files -Thu 15:53: INFO : Build pass 'AlteraResourceAnnotationBuildPass' took 36.8625 s. -Thu 15:53: PROGRESS: (6/10) - Analyse Resource Usage (AlteraResourceCounterPass) -Thu 15:53: PROGRESS: -Thu 15:53: PROGRESS: About to start chip vendor Map/Place/Route toolflow. This will take some time. -Thu 15:53: PROGRESS: For this compile, we estimate this process may take longer than 1 hour. -Thu 15:53: PROGRESS: We recommend running in simulation to verify correctness before building hardware. -Thu 15:53: PROGRESS: -Thu 15:53: PROGRESS: PRELIMINARY RESOURCE USAGE -Thu 15:53: PROGRESS: Logic utilization: 165245 / 262400 (62.97%) -Thu 15:53: PROGRESS: Multipliers (18x18): 384 / 3926 (9.78%) -Thu 15:53: PROGRESS: Block memory (bits): 18523554 / 52572160 (35.23%) -Thu 15:53: PROGRESS: -Thu 15:53: INFO : Build pass 'AlteraResourceCounterPass' took 1.37804 ms. -Thu 15:53: PROGRESS: (7/10) - Place and Route DFE (AlteraMPPR) -Thu 15:53: PROGRESS: Executing MPPR with 2 cost tables and 2 threads. -Thu 15:53: PROGRESS: MPPR: Starting 2 cost tables -Thu 15:53: INFO : Created new sub build manager running in: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/scratch/altera_quartus/ct1 -Thu 15:53: INFO : For detailed output from this sub build manager see: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/scratch/altera_quartus/ct1/_build.log -Thu 15:53: INFO : Created new sub build manager running in: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/scratch/altera_quartus/ct2 -Thu 15:53: INFO : For detailed output from this sub build manager see: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/scratch/altera_quartus/ct2/_build.log -Thu 21:47: INFO : Creating timing report for cost table(s): 2 -Thu 21:48: INFO : Timing report successfully written. -Thu 21:50: INFO : Updating timing report for cost table(s): 1 -Thu 21:50: INFO : Timing report successfully written. -Thu 22:03: PROGRESS: MPPR: Cost table 2 failed timing with score 78 (best score 78) -Thu 22:06: PROGRESS: MPPR: Cost table 1 failed timing with score 171 (best score 78) -Thu 22:06: PROGRESS: MPPR: Failed to meet timing! Best score: 78 -Thu 22:06: INFO : Build pass 'AlteraMPPR' took 22348.8 s. -Thu 22:06: PROGRESS: (8/10) - Generate Resource Report (AlteraResourceUsageBuildPass) -Thu 22:06: INFO : Build pass 'AlteraResourceUsageBuildPass' took 12.1262 s. -Thu 22:06: PROGRESS: (9/10) - Generate Annotated Source Code (AlteraResourceAnnotationBuildPass) -Thu 22:06: INFO : Annotating source files (old source files in build directory will be removed first)... -Thu 22:06: INFO : Not deleting directory (does not exist): src_annotated -Thu 22:06: INFO : annotated 2 source files -Thu 22:06: INFO : Build pass 'AlteraResourceAnnotationBuildPass' took 36.9082 s. -Thu 22:06: PROGRESS: (10/10) - Generate MaxFile (GenerateMaxFileAltera) -Thu 22:06: INFO : Running command: "/vol/cc/opt/maxeler/maxcompiler-2013.2.2/bin/maxfilestitch" -a -w -m 1 -b 20150910 "../MaxCompilerDesignData.dat" "ct2/altera_quartus/MAX4MAIAPeripheryTop.periph.rbf" "ct2/altera_quartus/MAX4MAIAPeripheryTop.core.rbf" "Spmv.max" c5a15cf60313101b21f23afd2d9b07db3fdd8b5245619cd8f538c6bc27cc7066 78 2>&1 | tee maxfilestitch.log ; exit ${PIPESTATUS[0]} -Thu 22:06: INFO : Input files: -Thu 22:06: INFO : DAT: ../MaxCompilerDesignData.dat -Thu 22:06: INFO : Periph RBF: ct2/altera_quartus/MAX4MAIAPeripheryTop.periph.rbf -Thu 22:06: INFO : Core RBF: ct2/altera_quartus/MAX4MAIAPeripheryTop.core.rbf -Thu 22:06: INFO : Output files: -Thu 22:06: INFO : MAX: Spmv.max -Thu 22:06: INFO : Hash: c5a15cf60313101b21f23afd2d9b07db3fdd8b5245619cd8f538c6bc27cc7066 -Thu 22:06: INFO : Timing score: 78 -Thu 22:06: INFO : Build pass 'GenerateMaxFileAltera' took 5.85651 s. -Thu 22:06: INFO : Final result files after build: -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvCacheKernel_original.pxg" -Thu 22:06: INFO : Spmv_SpmvCacheKernel_original.pxg (BuildFilePXG) -Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvCacheKernel_Configuration.txt" -Thu 22:06: INFO : SpmvCacheKernel_Configuration.txt (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvCacheKernel_NodeDiary.txt" -Thu 22:06: INFO : SpmvCacheKernel_NodeDiary.txt (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvCacheKernel_final-hardware.pxg" -Thu 22:06: INFO : Spmv_SpmvCacheKernel_final-hardware.pxg (BuildFilePXG) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvKernel_original.pxg" -Thu 22:06: INFO : Spmv_SpmvKernel_original.pxg (BuildFilePXG) -Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvKernel_Configuration.txt" -Thu 22:06: INFO : SpmvKernel_Configuration.txt (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvKernel_NodeDiary.txt" -Thu 22:06: INFO : SpmvKernel_NodeDiary.txt (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvKernel_final-hardware.pxg" -Thu 22:06: INFO : Spmv_SpmvKernel_final-hardware.pxg (BuildFilePXG) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvReductionKernel_original.pxg" -Thu 22:06: INFO : Spmv_SpmvReductionKernel_original.pxg (BuildFilePXG) -Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvReductionKernel_Configuration.txt" -Thu 22:06: INFO : SpmvReductionKernel_Configuration.txt (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvReductionKernel_NodeDiary.txt" -Thu 22:06: INFO : SpmvReductionKernel_NodeDiary.txt (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvReductionKernel_final-hardware.pxg" -Thu 22:06: INFO : Spmv_SpmvReductionKernel_final-hardware.pxg (BuildFilePXG) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvPaddingKernel_original.pxg" -Thu 22:06: INFO : Spmv_SpmvPaddingKernel_original.pxg (BuildFilePXG) -Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvPaddingKernel_Configuration.txt" -Thu 22:06: INFO : SpmvPaddingKernel_Configuration.txt (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/SpmvPaddingKernel_NodeDiary.txt" -Thu 22:06: INFO : SpmvPaddingKernel_NodeDiary.txt (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv_SpmvPaddingKernel_final-hardware.pxg" -Thu 22:06: INFO : Spmv_SpmvPaddingKernel_final-hardware.pxg (BuildFilePXG) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv.xml" -Thu 22:06: INFO : Spmv.xml (BuildFile) -Thu 22:06: INFO : Running command: ln -sf "../scratch/Spmv.h" -Thu 22:06: INFO : Spmv.h (BuildFileSlicH) -Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/Spmv_map.mxru" -Thu 22:06: INFO : Spmv_map.mxru (BuildFileMXRU) -Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.sta.rpt.tns" -Thu 22:06: INFO : MAX4MAIAPeripheryTop.sta.rpt.tns (BuildFileStaTns) -Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.sof" -Thu 22:06: INFO : MAX4MAIAPeripheryTop.sof (BuildFileStage2SOF) -Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.core.rbf" -Thu 22:06: INFO : MAX4MAIAPeripheryTop.core.rbf (BuildFileStage2CoreRBF) -Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.periph.rbf" -Thu 22:06: INFO : MAX4MAIAPeripheryTop.periph.rbf (BuildFileStage2PeriphRBF) -Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/ct2/altera_quartus/MAX4MAIAPeripheryTop.rbf" -Thu 22:06: INFO : MAX4MAIAPeripheryTop.rbf (BuildFileStage2FullRBF) -Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/Spmv_fit.mxru" -Thu 22:06: INFO : Spmv_fit.mxru (BuildFileMXRU) -Thu 22:06: INFO : Running command: ln -sf "../scratch/altera_quartus/Spmv.max" -Thu 22:06: INFO : Spmv.max (BuildFileMaxFile) -Thu 22:06: PROGRESS: -Thu 22:06: PROGRESS: FINAL RESOURCE USAGE -Thu 22:06: PROGRESS: Logic utilization: 145486 / 262400 (55.44%) -Thu 22:06: PROGRESS: Primary FFs: 245553 / 524800 (46.79%) -Thu 22:06: PROGRESS: Secondary FFs: 11173 / 524800 (2.13%) -Thu 22:06: PROGRESS: Multipliers (18x18): 384 / 3926 (9.78%) -Thu 22:06: PROGRESS: DSP blocks: 192 / 1963 (9.78%) -Thu 22:06: PROGRESS: Block memory (M20K): 1298 / 2567 (50.56%) -Thu 22:06: PROGRESS: -Thu 22:06: PROGRESS: MaxFile: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/Spmv_MAIA_DFE/results/Spmv.max (MD5Sum: 0e9dbf797344f3957d7a9d9b95516714) -Thu 22:06: ERROR : FAILED TO MEET TIMING! Best timing score: 78. We strongly recommend you do not use this .max file. -Thu 22:06: ERROR : Please see the timing report for more information and consult the MaxCompiler optimization cheat sheet for ideas on how to improve your design. -Thu 22:06: ERROR : Timing report: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/timingreport/index.html -Thu 22:06: ERROR : MaxCompiler documentation: /vol/cc/opt/maxeler/maxcompiler-2013.2.2/docs/maxcompiler-optimization-cheat-sheet.pdf -Thu 22:06: INFO : Waiting for any outstanding jobs to finish... -Thu 22:06: INFO : Timing Analyser shutting down. -Thu 22:06: INFO : Timing Report: /mnt/data/cccad3/pburovsk/spark/src/spmv/build/./Spmv_MAIA_DFE/timingreport/index.html -Thu 22:06: ERROR : ---------------------------- -Thu 22:06: ERROR : Exception in thread "main": -Thu 22:06: ERROR : -Thu 22:06: ERROR : Build failed to meet timing (best timing score 78) -Thu 22:06: ERROR : -Thu 22:06: ERROR : Exception Stack Trace com.maxeler.maxdc.BuildFailedTimingException: -Thu 22:06: ERROR : at com.maxeler.maxdc.BuildManager.finalizeBuild(BuildManager.java:1699) -Thu 22:06: ERROR : at com.maxeler.maxdc.BuildManager.build(BuildManager.java:1563) -Thu 22:06: ERROR : at com.maxeler.maxcompiler.v2.managers.DFEManager.runBuild(DFEManager.java:361) -Thu 22:06: ERROR : at com.maxeler.maxcompiler.v2.managers._Managers.runBuild(_Managers.java:16) -Thu 22:06: ERROR : at com.maxeler.maxcompiler.v2.managers.custom.CustomManager.realBuild(CustomManager.java:1381) -Thu 22:06: ERROR : at com.maxeler.maxcompiler.v2.managers.DFEManager.build(DFEManager.java:339) -Thu 22:06: ERROR : at SpmvManager.main(SpmvManager.maxj:145) -Thu 22:06: ERROR : ---------------------------- diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt deleted file mode 100644 index 3ad1fe8..0000000 --- a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt +++ /dev/null @@ -1,155 +0,0 @@ - -Total resource usage ------------------------------------------------------------------ - LUTs FFs BRAMs DSPs - 524800 1049600 2567 1963 total available resources for FPGA - 178215 256726 1298 192 total resources used - 33.96% 24.46% 50.56% 9.78% % of available - 106398 142250 616 192 used by kernels - 20.27% 13.55% 24.00% 9.78% % of available - 70847 112634 671 0 used by manager - 13.50% 10.73% 26.14% 0.00% % of available - 127363 198534 1100 192 stray resources - 24.27% 18.92% 42.85% 9.78% % of available - -High level manager breakdown aggregated by type ------------------------------------------------------------------ - LUTs FFs BRAMs DSPs Type Occurrences - 538 1227 0 0 AddrGen 3 - 39 37 1 0 ChecksumMappedDRP 1 - 641 636 0 0 DualAspectMux 3 - 19 3138 0 0 DualAspectReg 2 - 1025 1028 199 0 Fifo 20 - 106398 142250 616 192 Kernel 4 - 140 215 0 0 MAX4CPLD 1 - 733 1020 2 0 MAX4PCIeSlaveInterface 1 - 21 51 0 0 MAXEvents 1 - 82 171 0 0 ManagerStateMachine_csrD 1 - 1655 536 0 0 ManagerStateMachine_read 1 - 469 84 0 0 MappedElementSwitch 1 - 443 997 5 0 MappedMemoriesController 1 - 160 130 0 0 MappedRegistersControlle 1 - 16013 48002 281 0 MemoryControllerPro 1 - 1630 847 4 0 PCIeBase 1 - 1497 1608 34 0 PCIeSlaveStreaming 1 - 269 393 0 0 PerfMonitor 1 - 16 23 0 0 ResetControl 2 - 88 186 0 0 SanityBlock 1 - 98 90 1 0 SignalForwardingAdapter 1 - 45269 52214 144 0 StratixVDDR3 6 - 2 1 0 0 StreamPullPushAdapter 1 - 0 0 0 0 Memory Controller -- - 0 0 0 0 Other InterFPGA -- - 1050 1297 8 0 Other MappedElements -- - 2903 3834 42 0 Other PCIe -- - -Kernel breakdown ------------------------------------------------------------------ - LUTs FFs BRAMs DSPs category - 106398 142250 616 192 total for all kernels - 20.27% 13.55% 24.00% 9.78% % of total available - -Totals for each kernel - LUTs FFs BRAMs DSPs Kernel name - 30747 40877 337 0 SpmvCacheKernel (total) - 5.86% 3.89% 13.13% 0.00% % of total available - 30630 4741 336 0 SpmvCacheKernel (user) - 5.84% 0.45% 13.09% 0.00% % of total available - 0 29542 0 0 SpmvCacheKernel (scheduling) - 0.00% 2.81% 0.00% 0.00% % of total available - 117 6594 1 0 SpmvCacheKernel (other Kernel resources) - 0.02% 0.63% 0.04% 0.00% % of total available - 73645 97694 149 192 SpmvKernel (total) - 14.03% 9.31% 5.80% 9.78% % of total available - 73442 96704 142 192 SpmvKernel (user) - 13.99% 9.21% 5.53% 9.78% % of total available - 60 517 6 0 SpmvKernel (scheduling) - 0.01% 0.05% 0.23% 0.00% % of total available - 143 473 1 0 SpmvKernel (other Kernel resources) - 0.03% 0.05% 0.04% 0.00% % of total available - 363 944 0 0 SpmvPaddingKernel (total) - 0.07% 0.09% 0.00% 0.00% % of total available - 316 534 0 0 SpmvPaddingKernel (user) - 0.06% 0.05% 0.00% 0.00% % of total available - 0 5 0 0 SpmvPaddingKernel (scheduling) - 0.00% 0.00% 0.00% 0.00% % of total available - 47 405 0 0 SpmvPaddingKernel (other Kernel resources) - 0.01% 0.04% 0.00% 0.00% % of total available - 1643 2735 130 0 SpmvReductionKernel (total) - 0.31% 0.26% 5.06% 0.00% % of total available - 1513 2132 130 0 SpmvReductionKernel (user) - 0.29% 0.20% 5.06% 0.00% % of total available - 0 14 0 0 SpmvReductionKernel (scheduling) - 0.00% 0.00% 0.00% 0.00% % of total available - 130 589 0 0 SpmvReductionKernel (other Kernel resources) - 0.02% 0.06% 0.00% 0.00% % of total available - - -Manager breakdown ------------------------------------------------------------------ - LUTs FFs BRAMs DSPs Type Instance - 30747 40877 337 0 Kernel SpmvCacheKernel - 73645 97694 149 192 Kernel SpmvKernel - 363 944 0 0 Kernel SpmvPaddingKernel - 1643 2735 130 0 Kernel SpmvReductionKernel - 17 3072 0 0 DualAspectReg Stream_14 - 533 531 0 0 DualAspectMux Stream_17 - 39 37 0 0 DualAspectMux Stream_1 - 69 68 0 0 DualAspectMux Stream_31 - 43 32 1 0 Fifo Stream_34 - 43 33 2 0 Fifo Stream_36 - 43 33 1 0 Fifo Stream_38 - 44 32 1 0 Fifo Stream_40 - 44 34 77 0 Fifo Stream_42 - 44 33 77 0 Fifo Stream_44 - 43 34 1 0 Fifo Stream_46 - 43 33 1 0 Fifo Stream_48 - 43 33 1 0 Fifo Stream_50 - 43 33 1 0 Fifo Stream_52 - 45 33 2 0 Fifo Stream_55 - 45 36 2 0 Fifo Stream_58 - 39 31 1 0 Fifo Stream_5 - 2 66 0 0 DualAspectReg Stream_61 - 43 31 4 0 Fifo Stream_64 - 77 119 1 0 Fifo Stream_66 - 75 125 4 0 Fifo Stream_68 - 2 1 0 0 StreamPullPushAdapter Stream_70 - 43 31 4 0 Fifo Stream_72 - 107 138 2 0 Fifo Stream_74 - 44 34 14 0 Fifo Stream_78 - 74 120 2 0 Fifo Stream_80 - 179 409 0 0 AddrGen addrgen_cmd_cpu2lmem - 180 412 0 0 AddrGen addrgen_cmd_indptr - 179 406 0 0 AddrGen addrgen_cmd_values - 82 171 0 0 ManagerStateMachine_csrD csrDecoder - 1655 536 0 0 ManagerStateMachine_read readControl - 733 1020 2 0 MAX4PCIeSlaveInterface MAX4PCIeSlaveInterface_i - 8 11 0 0 ResetControl control_streams_rst_ctl - 469 84 0 0 MappedElementSwitch MappedElementSwitch_i - 443 997 5 0 MappedMemoriesController MappedMemoriesController_i - 160 130 0 0 MappedRegistersControlle MappedRegistersController_i - 269 393 0 0 PerfMonitor perfm - 88 186 0 0 SanityBlock SanityBlock_i - 98 90 1 0 SignalForwardingAdapter SignalForwardingAdapter_i - 39 37 1 0 ChecksumMappedDRP checksum_mem_drp - 1497 1608 34 0 PCIeSlaveStreaming dynpcie - 8 12 0 0 ResetControl reset_controller - 16013 48002 281 0 MemoryControllerPro memctrlpro_maia_sodimms - 1630 847 4 0 PCIeBase PCIeBase_i - 140 215 0 0 MAX4CPLD cpld_io_ext_inst - 21 51 0 0 MAXEvents max_events - 7581 8726 24 0 StratixVDDR3 ddr3_core - 7474 8623 24 0 StratixVDDR3 ddr3_core - 7582 8738 24 0 StratixVDDR3 ddr3_core - 7472 8570 24 0 StratixVDDR3 ddr3_core - 7579 8787 24 0 StratixVDDR3 ddr3_core - 7581 8770 24 0 StratixVDDR3 ddr3_core - -Source files annotation report ------------------------------------------------------------------ - -% of total used for each file (note: multiple files may share the same resources) - LUTs FFs BRAMs DSPs filename - 58.95% 51.70% 47.30% 100.00% SpmvKernel.maxj - 59.46% 52.27% 47.30% 100.00% SpmvManager.maxj - 100.00% 87.96% 51.54% 100.00% [ missing source files ] From 905e700817709d27a6953030f46f55a44f61e7af Mon Sep 17 00:00:00 2001 From: Pavel Burovskiy Date: Fri, 11 Sep 2015 01:02:40 +0100 Subject: [PATCH 6/6] Adding annotations for FST, minimal set --- .../SpmvKernel.maxj | 346 ++++++++++++++++++ .../SpmvManager.maxj | 153 ++++++++ .../spmv_48p_2048c_0.5pf_full_fst/report.txt | 155 ++++++++ 3 files changed, 654 insertions(+) create mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj create mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj create mode 100644 experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj new file mode 100644 index 0000000..501d337 --- /dev/null +++ b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvKernel.maxj @@ -0,0 +1,346 @@ + LUTs FFs BRAMs DSPs : SpmvKernel.maxj + 105055 132726 614 192 : resources used by this file + 20.02% 12.65% 23.92% 9.78% : % of available + 58.95% 51.70% 47.30% 100.00% : % of total used + 98.74% 93.30% 99.68% 100.00% : % of user resources + + : import java.util.*; + : + : import com.maxeler.maxcompiler.v2.kernelcompiler.Kernel; + : import com.maxeler.maxcompiler.v2.kernelcompiler.KernelParameters; + : import com.maxeler.maxcompiler.v2.kernelcompiler.types.base.*; + : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.Count.*; + : import com.maxeler.maxcompiler.v2.kernelcompiler.types.composite.DFEVectorType; + : import com.maxeler.maxcompiler.v2.kernelcompiler.types.composite.DFEVector; + : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.memory.*; + : import com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.KernelMath; + : import com.maxeler.maxcompiler.v2.utils.MathUtils; + : + : import com.custom_computing_ic.dfe_snippets.utils.Reductions; + : import com.custom_computing_ic.dfe_snippets.reductions.LogAddReduce; + : import com.custom_computing_ic.dfe_snippets.utils.FetchSubTuple; + : + : + : class SpmvKernel extends Kernel { + : + : // N x N matrix, nnzs nonzeros + : // + : // load data for N cycles into cache + : // compute for N cycles + : // -- in the mean time load data for N cycles in double buffer + : // repeat + : // + : // Sources of inefficiency: + : // -- empty rows + : // -- port sharing cannot be used + : + : private final DFEVectorType vtype, ivtype; + : private final int inputWidth; + : private final DFEType addressT; + : private final boolean dbg; + : + : private static final int fpL = 16; + : + : protected SpmvKernel( + : KernelParameters parameters, + : int inputWidth, + : int cacheSize, + : int indexWidth, + : int mantissaWidth, + : boolean dbg) { + : super(parameters); + : + : optimization.pushPipeliningFactor(0.5); + : optimization.pushDSPFactor(1); + : + : + : this.inputWidth = inputWidth; + : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); + : this.dbg = dbg; + : + : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); + : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); + : + : // TODO: remove prefetch from this kernel + : + 1 2 0 0 : DFEVar vRomLoadEnable = io.input("loadEnabled", dfeBool()); + 1 0 0 0 : DFEVector matrixValues = io.input("matrixValues", vtype, ~vRomLoadEnable); + 1 1 0 0 : DFEVector vectorValues = io.input("vectorValues", vtype, ~vRomLoadEnable); + : + 65864 89061 127 192 : DFEVar result = Reductions.reduce(matrixValues * vectorValues); + : + : // --- Accumulation + 1 2 0 0 : DFEVar rowFinished = io.input("rowFinished", dfeBool()); + 1 1 0 0 : DFEVar rowLength = io.input("rowLength", dfeUInt(32)); + 1 1 0 0 : DFEVar cycleCounter = io.input("cycleCounter", dfeUInt(32)); + 1 0 0 0 : DFEVar firstReadPosition = io.input("firstReadPosition", dfeUInt(32)); + : + 32 32 0 0 : DFEVar runLength = firstReadPosition + rowLength; + 258 234 2 0 : DFEVar modulo = KernelMath.modulo(runLength, inputWidth); + 1240 988 10 0 : DFEVar quot = (runLength - modulo.cast(dfeUInt(32))) / inputWidth; + : + 33 51 0 0 : DFEVar totalCycles = quot + (modulo === 0 ? constant.var(dfeUInt(32), 0) : 1); + : + : DFEVar carriedSum = dfeFloat(11, mantissaWidth).newInstance(this); + 1103 1177 3 0 : DFEVar newSum = result + (cycleCounter < fpL ? 0 : carriedSum); + : carriedSum <== stream.offset(newSum, -fpL); + : + 41 65 0 0 : DFEVar firstValidPartialSum = (totalCycles > fpL)? (totalCycles - fpL) : 0; + 25 1 0 0 : DFEVar validPartialSums = (cycleCounter >= firstValidPartialSum); + 4654 5213 4 0 : LogAddReduce r = new LogAddReduce(this, + : validPartialSums, + : rowFinished, + : newSum, + : dfeFloat(11, mantissaWidth), + : fpL); + : + : // TODO still need reduction step + : // TODO: remove prefetch + 10 12 1 0 : DFEVar outputEnable = ~vRomLoadEnable & rowFinished; + 9 6 1 0 : io.output("output", r.getOutput(), dfeFloat(11, mantissaWidth), outputEnable); + : + : // --- Debug + : if (dbg) { + : Params rowCounterParams = control.count.makeParams(32) + : .withEnable(rowFinished); + : DFEVar rowCounter = control.count.makeCounter(rowCounterParams).getCount(); + : /* debug.simPrintf( + : rowLength !== 0, + : "Kernel -- row %d totalCycles %d, readenable %d, readmask %d rowFinished %d rowLength %d output: %f cycleCounter %d validPartialSums %d newSum %f firstRead %d", + : rowCounter, totalCycles, readEnable, readMask, rowFinished, rowLength, r.getOutput(), cycleCounter, validPartialSums, newSum, firstReadPosition); + : debug.simPrintf(rowLength !== 0 , " loadEnable %d loadAddress %d\n", vRomLoadEnable, loadAddress); + : */ + : //debug.simPrintf("\n"); + : //debug.simPrintf("Values: "); + : //for (int i = 0; i < inputWidth; i++) + : //debug.simPrintf("%f ", values[i]); + : //debug.simPrintf("Indices: "); + : //for (int i = 0; i < inputWidth; i++) + : //debug.simPrintf("%d ", colptr[i]); + : //debug.simPrintf("\n"); + : } + : } + : + : } + : + : // This implements cache as + : // - row of BRAMs + : // - SM, which helps to select BRAM values + : class SpmvCacheKernel extends Kernel { + : + : private final DFEVectorType vtype, ivtype; + : private final List> vroms; + : private final int inputWidth; + : private final DFEType addressT; + : + : protected SpmvCacheKernel(KernelParameters parameters, + : int inputWidth, + : int cacheSize, + : int indexWidth, + : int mantissaWidth) { + : super(parameters); + : + : this.inputWidth = inputWidth; + : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); + : + : // load entire vector or until cache is full + : int sizeBits = 32; // XXX may need to run for more cycles + : DFEVar vRomLoadEnable = io.input("loadEnabled_in", dfeBool()); + : + : DFEVar vectorLoadCycles = io.scalarInput("vectorLoadCycles", dfeUInt(32)); + : Params loadAddressParams = control.count.makeParams(sizeBits ) + : .withMax(vectorLoadCycles) + : .withEnable(vRomLoadEnable); + : DFEVar loadAddress = control.count.makeCounter(loadAddressParams).getCount(); + : + : + : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); + : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); + : DFEVar vectorValue = io.input("vromLoad", dfeFloat(11, mantissaWidth), vRomLoadEnable); + : //--- Cache allocation and control + : vroms = new ArrayList>(); + : for (int i = 0; i < inputWidth; i++) { + : Memory vrom = mem.alloc(dfeFloat(11, mantissaWidth), cacheSize); + : vroms.add(vrom); + : vrom.write( + : loadAddress.cast(addressT), + : vectorValue, + : vRomLoadEnable); + : } + : + : // --- I/O + : DFEVar readEnable = io.input("readenable", dfeBool()) & ~vRomLoadEnable; + : DFEVar readMask = io.input("readmask", dfeUInt(inputWidth)); + : DFEVector matrixValues = selectValues( + : io.input("values", vtype, readEnable), + : readMask); + : DFEVector colptr = selectValues( + : io.input("indptr", ivtype, readEnable), + : readMask); + : DFEVector vectorValues = resolveVectorReads(colptr); + : + : io.output("loadEnabled_out", vRomLoadEnable, dfeBool()); + : io.output("matrixValues", matrixValues, vtype, ~vRomLoadEnable); + : io.output("vectorValues", vectorValues, vtype, ~vRomLoadEnable); + : } + : + : DFEVector selectValues( + : DFEVector in, + : DFEVar readMask) { + : DFEVector out = in.getType().newInstance(this); + : for (int i = 0; i < in.getSize(); i++) + : out[i] <== readMask.slice(i) === 0 ? 0 : in[i]; + : return out; + : } + : + : + : DFEVector resolveVectorReads(DFEVector reads) { + : DFEVector out = vtype.newInstance(this); + : for (int i = 0; i < vroms.size(); i++) + : out[i] <== vroms.get(i).read(reads[i].cast(addressT)); + : return out; + : } + : + : } + : + : // This implements cache as + : // - row of BRAMs + : // - FetchSubTuple + : // First, rough and pointless implementation. + : class SpmvCacheFSTKernel extends Kernel { + : + : private final DFEVectorType vtype, ivtype; + : private final List> vroms; + : private final int inputWidth; + : private final DFEType addressT; + : + : protected SpmvCacheFSTKernel(KernelParameters parameters, + : int inputWidth, + : int cacheSize, + : int indexWidth, + : int mantissaWidth) { + : super(parameters); + : + : this.inputWidth = inputWidth; + : this.addressT = dfeUInt(MathUtils.bitsToAddress(cacheSize)); + : + : // load entire vector or until cache is full + : int sizeBits = 32; // XXX may need to run for more cycles + 1 1 0 0 : DFEVar vRomLoadEnable = io.input("loadEnabled_in", dfeBool()); + : + : DFEVar vectorLoadCycles = io.scalarInput("vectorLoadCycles", dfeUInt(32)); + : Params loadAddressParams = control.count.makeParams(sizeBits ) + : .withMax(vectorLoadCycles) + : .withEnable(vRomLoadEnable); + 94 78 0 0 : DFEVar loadAddress = control.count.makeCounter(loadAddressParams).getCount(); + : + : + : vtype = new DFEVectorType (dfeFloat(11, mantissaWidth), inputWidth); + : ivtype = new DFEVectorType (dfeUInt(indexWidth), inputWidth); + 1 65 0 0 : DFEVar vectorValue = io.input("vromLoad", dfeFloat(11, mantissaWidth), vRomLoadEnable); + : //--- Cache allocation and control + : vroms = new ArrayList>(); + : for (int i = 0; i < inputWidth; i++) { + 1 1 336 0 : Memory vrom = mem.alloc(dfeFloat(11, mantissaWidth), cacheSize); + : vroms.add(vrom); + : vrom.write( + : loadAddress.cast(addressT), + : vectorValue, + : vRomLoadEnable); + : } + : + : // --- I/O + : // --- buffering matrix and colptr data in FST + : + : // assuming readEnable guards internal storage of FST from overflow: + : // + : // DFEVar dataRequestEnableLoop = dfeBool().newInstance(this); + : // DFEVar dataRequestEnable = control.count.pulse(1)? 0 + : // : stream.offset(dataRequestEnableLoop,-1); + : // DFEVar enable = readEnable & dataRequestEnable; + : + 2 3 0 0 : DFEVar readEnable = io.input("readenable", dfeBool()) & ~vRomLoadEnable; + 1 1 0 0 : DFEVar readMask = io.input("readmask", dfeUInt(inputWidth)); + : + 1 3803 0 0 : DFEVector matrix_in = io.input("values", vtype, readEnable); + 1 1 0 0 : DFEVector index_in = io.input("indptr", ivtype, readEnable); + : + : // big hack around: counting the number of 1s in readmask + : List readmask_bits = new ArrayList(); + : for (int i = 0; i < inputWidth; i++) + : { + 0 529 0 0 : readmask_bits.add(readMask[i].cast(dfeBool()).cast(dfeUInt(6))); // 2^6 = 64 > 48 = inputWidth + : } + 144 145 0 0 : DFEVar numEntriesToRead = Reductions.reduce(readmask_bits); + : + : // we don't care which PE receives each entry (assume matrices are + : // numerically nice enough to change the order of accumulation) + : boolean alignOutput = false; + : int matrixTypeWidth = 11 + mantissaWidth; + : FetchSubTuple matrixBuffer = new FetchSubTuple(this, "matrix", inputWidth, + : matrixTypeWidth, dfeFloat(11, mantissaWidth), + : alignOutput); + : FetchSubTuple indexBuffer = new FetchSubTuple(this, "index", inputWidth, + : indexWidth, dfeUInt(indexWidth), alignOutput); + : + 25403 25051 0 0 : DFEVector matrixValues = matrixBuffer.popPush(numEntriesToRead, readEnable, matrix_in); + 4753 4228 0 0 : DFEVector colptr = indexBuffer.popPush(numEntriesToRead, readEnable, index_in); + : + : //dataRequestEnableLoop <== matrixBuffer.nextPushEnable(); + : + : DFEVector vectorValues = resolveVectorReads(colptr); + : + : io.output("loadEnabled_out", vRomLoadEnable, dfeBool()); + 0 5 0 0 : io.output("matrixValues", matrixValues, vtype, ~vRomLoadEnable); + 1 2 0 0 : io.output("vectorValues", vectorValues, vtype, ~vRomLoadEnable); + : } + : + : DFEVector resolveVectorReads(DFEVector reads) { + : DFEVector out = vtype.newInstance(this); + : for (int i = 0; i < vroms.size(); i++) + : out[i] <== vroms.get(i).read(reads[i].cast(addressT)); + : return out; + : } + : + : } + : + : + : + : + : // XXX for now we assume the matrix is smaller then max rows + : // will have to implement an lmem design above this threshold + : // using lmem wrapped above this thresholed may be feasilbe, + : // see the DramAccumulator snippet in dfe-snippets + : class SpmvReductionKernel extends Kernel { + : + : protected SpmvReductionKernel(KernelParameters parameters, int fpl, int maxRows) { + : super(parameters); + : + 1 1 0 0 : DFEVar in = io.input("reductionIn", dfeFloat(11, 53)); + : DFEVar n = io.scalarInput("nRows", dfeUInt(32)); + : DFEVar totalCycles = io.scalarInput("totalCycles", dfeUInt(32)); + : + 69 120 0 0 : DFEVar cycles = control.count.simpleCounter(32); + : + : DFEVar sumCarried = dfeFloat(11, 53).newInstance(this); + 1116 1572 2 0 : DFEVar sum = in + (cycles < n ? 0 : sumCarried); + 44 48 128 0 : sumCarried <== stream.offset(sum, -(n.cast(dfeInt(32))), -maxRows, -(fpl + 2)); + : + : // output on the last n cycles + 55 33 0 0 : DFEVar outputEnable = totalCycles - cycles <= n; + 1 14 0 0 : io.output("reductionOut", sum, dfeFloat(11, 53), outputEnable); + : } + : } + : + : + : class PaddingKernel extends Kernel { + : protected PaddingKernel(KernelParameters parameters) { + : super(parameters); + : DFEVar nInputs = io.scalarInput("nInputs", dfeUInt(32)); + 69 107 0 0 : DFEVar cycles = control.count.simpleCounter(32); + 20 1 0 0 : DFEVar paddingCycles = cycles >= nInputs; + 1 1 0 0 : DFEVar input = io.input("paddingIn", dfeFloat(11, 53), ~paddingCycles); + 0 69 0 0 : DFEVar out = paddingCycles ? 0 : input; + : io.output("paddingOut", out, dfeFloat(11, 53)); + : } + : } diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj new file mode 100644 index 0000000..419d9c1 --- /dev/null +++ b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/SpmvManager.maxj @@ -0,0 +1,153 @@ + LUTs FFs BRAMs DSPs : SpmvManager.maxj + 105961 134189 614 192 : resources used by this file + 20.19% 12.78% 23.92% 9.78% : % of available + 59.46% 52.27% 47.30% 100.00% : % of total used + 99.59% 94.33% 99.68% 100.00% : % of user resources + + : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.CPUTypes; + : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.EngineInterface; + : import com.maxeler.maxcompiler.v2.managers.engine_interfaces.InterfaceParam; + : import com.maxeler.maxcompiler.v2.managers.custom.CustomManager; + : import com.maxeler.maxcompiler.v2.managers.custom.blocks.KernelBlock; + : import com.maxeler.maxcompiler.v2.build.EngineParameters; + : import com.maxeler.maxcompiler.v2.managers.custom.blocks.StateMachineBlock; + : import com.maxeler.maxcompiler.v2.statemachine.manager.ManagerStateMachine; + : import com.maxeler.maxcompiler.v2.managers.custom.stdlib.MemoryControlGroup; + : + : import com.custom_computing_ic.dfe_snippets.sparse.*; + : import com.custom_computing_ic.dfe_snippets.manager.*; + : + : public class SpmvManager extends CustomManager{ + : private static final String s_kernelName = "SpmvKernel"; + : private static final String s_reductionKernel = "SpmvReductionKernel"; + : private static final String s_paddingKernel = "SpmvPaddingKernel"; + : private static final String s_cacheKernel = "SpmvCacheKernel"; + : + : private static final int cacheSize = 1024 * 2; + : private static final int inputWidth = 48; + : private static final int MAX_ROWS = 30000; + : + : // parameters of CSR format used: float64 values, int32 index. + : private static final int mantissaWidth = 53; + : private static final int indexWidth = 32; + : + : private static final int FLOATING_POINT_LATENCY = 16; + : + : private static final boolean DBG_CSR_DECODER = false; + : private static final boolean DBG_PAR_CSR_CTL = false; + : private static final boolean DBG_SPMV_KERNEL = false; + : + : SpmvManager(EngineParameters ep) { + : super(ep); + : addMaxFileConstant("inputWidth", inputWidth); + : addMaxFileConstant("cacheSize", cacheSize); + : addMaxFileConstant("maxRows", MAX_ROWS); + : + : ManagerUtils.setDRAMMaxDeviceFrequency(this, ep); + : + : ManagerStateMachine csrDecoder = new CsrDecoder(this, DBG_CSR_DECODER); + : StateMachineBlock csrDecoderBlock = addStateMachine("csrDecoder", csrDecoder); + : csrDecoderBlock.getInput("colptr") <== addStreamFromCPU("colptr"); + : + : ManagerStateMachine readControl = new ParallelCsrReadControl(this, inputWidth, DBG_PAR_CSR_CTL); + : StateMachineBlock readControlBlock = addStateMachine("readControl", readControl); + : readControlBlock.getInput("length") <== csrDecoderBlock.getOutput("rowLength_out"); + : + 227 370 0 0 : KernelBlock cache = addKernel(new SpmvCacheFSTKernel( + : makeKernelParameters(s_cacheKernel), + : inputWidth, + : cacheSize, + : indexWidth, + 30403 33913 336 0 : mantissaWidth + : )); + : + 226 374 0 0 : KernelBlock k = addKernel(new SpmvKernel( + : makeKernelParameters(s_kernelName), + : inputWidth, + : cacheSize, + : indexWidth, + : mantissaWidth, + 73276 96847 148 192 : DBG_SPMV_KERNEL + : )); + : + : addStreamToOnCardMemory("cpu2lmem", MemoryControlGroup.MemoryAccessPattern.LINEAR_1D) <== addStreamFromCPU("fromcpu"); + : + : + : + : ManagerUtils.addLinearStreamFromLmemToKernel(this, cache, "indptr"); + : ManagerUtils.addLinearStreamFromLmemToKernel(this, cache, "values"); + : + : cache.getInput("vromLoad") <== addStreamFromCPU("vromLoad"); + : + : cache.getInput("readenable") <== readControlBlock.getOutput("readenable"); + : cache.getInput("readmask") <== readControlBlock.getOutput("readmask"); + : cache.getInput("loadEnabled_in") <== readControlBlock.getOutput("vectorLoad"); + : + : k.getInput("loadEnabled") <== cache.getOutput("loadEnabled_out"); + : k.getInput("vectorValues") <== cache.getOutput("vectorValues"); + : k.getInput("matrixValues") <== cache.getOutput("matrixValues"); + : + : k.getInput("rowLength") <== readControlBlock.getOutput("rowLength"); + : k.getInput("rowFinished") <== readControlBlock.getOutput("rowFinished"); + : k.getInput("cycleCounter") <== readControlBlock.getOutput("cycleCounter"); + : k.getInput("firstReadPosition") <== readControlBlock.getOutput("firstReadPosition"); + : + 227 358 0 0 : KernelBlock r = addKernel(new SpmvReductionKernel( + : makeKernelParameters(s_reductionKernel), + : FLOATING_POINT_LATENCY, + 1286 1788 130 0 : MAX_ROWS)); + : r.getInput("reductionIn") <== k.getOutput("output"); + : + 226 361 0 0 : KernelBlock p = addKernel(new PaddingKernel( + 90 178 0 0 : makeKernelParameters(s_paddingKernel))); + : + : p.getInput("paddingIn") <== r.getOutput("reductionOut"); + : addStreamToCPU("output") <== p.getOutput("paddingOut"); + : } + : + : private static EngineInterface interfaceDefault() { + : EngineInterface ei = new EngineInterface(); + : + : InterfaceParam n = ei.addParam("nrows", CPUTypes.INT); + : InterfaceParam vectorSize = ei.addParam("vectorSize", CPUTypes.INT); + : InterfaceParam vectorLoadCycles = ei.addParam("vectorLoadCycles", CPUTypes.INT); + : InterfaceParam totalCycles = ei.addParam("totalCycles", CPUTypes.INT); + : InterfaceParam paddingCycles = ei.addParam("paddingCycles", CPUTypes.INT); + : InterfaceParam nPartitions = ei.addParam("nPartitions", CPUTypes.INT); + : + : ei.setTicks(s_kernelName, totalCycles); + : + : ei.setTicks(s_cacheKernel, totalCycles); + : ei.setScalar(s_cacheKernel, "vectorLoadCycles", vectorLoadCycles); + : + : ei.setTicks(s_reductionKernel, (n * nPartitions)); + : ei.setScalar(s_reductionKernel, "nRows", n); + : ei.setScalar(s_reductionKernel, "totalCycles", n * nPartitions); + : + : ei.setTicks(s_paddingKernel, (n + paddingCycles)); + : ei.setScalar(s_paddingKernel, "nInputs", n); + : + : ei.setScalar("csrDecoder", "nrows", n); + : + : ei.setScalar("readControl", "nrows", n); + : ei.setScalar("readControl", "vectorLoadCycles", vectorLoadCycles); + : ei.setScalar("readControl", "nPartitions", nPartitions); + : + : ei.setStream("output", CPUTypes.DOUBLE, (n + paddingCycles) * CPUTypes.DOUBLE.sizeInBytes()); + : ei.setStream("vromLoad", CPUTypes.DOUBLE, vectorSize * CPUTypes.DOUBLE.sizeInBytes()); + : + : ei.ignoreLMem("cpu2lmem"); + : ei.ignoreStream("fromcpu"); + : return ei; + : } + : + : public static void main(String[] args) { + 105961 134189 614 192 : SpmvManager manager = new SpmvManager(new EngineParameters(args)); + : manager.createSLiCinterface(interfaceDefault()); + : // ManagerUtils.debug(manager); + : ManagerUtils.setFullBuild(manager, 2, 2); + : manager.createSLiCinterface(ManagerUtils.interfaceWrite( + : "write", "fromcpu", "cpu2lmem")); + : manager.build(); + : } + : } diff --git a/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt new file mode 100644 index 0000000..3ad1fe8 --- /dev/null +++ b/experimental-data/spmv_48p_2048c_0.5pf_full_fst/report.txt @@ -0,0 +1,155 @@ + +Total resource usage +----------------------------------------------------------------- + LUTs FFs BRAMs DSPs + 524800 1049600 2567 1963 total available resources for FPGA + 178215 256726 1298 192 total resources used + 33.96% 24.46% 50.56% 9.78% % of available + 106398 142250 616 192 used by kernels + 20.27% 13.55% 24.00% 9.78% % of available + 70847 112634 671 0 used by manager + 13.50% 10.73% 26.14% 0.00% % of available + 127363 198534 1100 192 stray resources + 24.27% 18.92% 42.85% 9.78% % of available + +High level manager breakdown aggregated by type +----------------------------------------------------------------- + LUTs FFs BRAMs DSPs Type Occurrences + 538 1227 0 0 AddrGen 3 + 39 37 1 0 ChecksumMappedDRP 1 + 641 636 0 0 DualAspectMux 3 + 19 3138 0 0 DualAspectReg 2 + 1025 1028 199 0 Fifo 20 + 106398 142250 616 192 Kernel 4 + 140 215 0 0 MAX4CPLD 1 + 733 1020 2 0 MAX4PCIeSlaveInterface 1 + 21 51 0 0 MAXEvents 1 + 82 171 0 0 ManagerStateMachine_csrD 1 + 1655 536 0 0 ManagerStateMachine_read 1 + 469 84 0 0 MappedElementSwitch 1 + 443 997 5 0 MappedMemoriesController 1 + 160 130 0 0 MappedRegistersControlle 1 + 16013 48002 281 0 MemoryControllerPro 1 + 1630 847 4 0 PCIeBase 1 + 1497 1608 34 0 PCIeSlaveStreaming 1 + 269 393 0 0 PerfMonitor 1 + 16 23 0 0 ResetControl 2 + 88 186 0 0 SanityBlock 1 + 98 90 1 0 SignalForwardingAdapter 1 + 45269 52214 144 0 StratixVDDR3 6 + 2 1 0 0 StreamPullPushAdapter 1 + 0 0 0 0 Memory Controller -- + 0 0 0 0 Other InterFPGA -- + 1050 1297 8 0 Other MappedElements -- + 2903 3834 42 0 Other PCIe -- + +Kernel breakdown +----------------------------------------------------------------- + LUTs FFs BRAMs DSPs category + 106398 142250 616 192 total for all kernels + 20.27% 13.55% 24.00% 9.78% % of total available + +Totals for each kernel + LUTs FFs BRAMs DSPs Kernel name + 30747 40877 337 0 SpmvCacheKernel (total) + 5.86% 3.89% 13.13% 0.00% % of total available + 30630 4741 336 0 SpmvCacheKernel (user) + 5.84% 0.45% 13.09% 0.00% % of total available + 0 29542 0 0 SpmvCacheKernel (scheduling) + 0.00% 2.81% 0.00% 0.00% % of total available + 117 6594 1 0 SpmvCacheKernel (other Kernel resources) + 0.02% 0.63% 0.04% 0.00% % of total available + 73645 97694 149 192 SpmvKernel (total) + 14.03% 9.31% 5.80% 9.78% % of total available + 73442 96704 142 192 SpmvKernel (user) + 13.99% 9.21% 5.53% 9.78% % of total available + 60 517 6 0 SpmvKernel (scheduling) + 0.01% 0.05% 0.23% 0.00% % of total available + 143 473 1 0 SpmvKernel (other Kernel resources) + 0.03% 0.05% 0.04% 0.00% % of total available + 363 944 0 0 SpmvPaddingKernel (total) + 0.07% 0.09% 0.00% 0.00% % of total available + 316 534 0 0 SpmvPaddingKernel (user) + 0.06% 0.05% 0.00% 0.00% % of total available + 0 5 0 0 SpmvPaddingKernel (scheduling) + 0.00% 0.00% 0.00% 0.00% % of total available + 47 405 0 0 SpmvPaddingKernel (other Kernel resources) + 0.01% 0.04% 0.00% 0.00% % of total available + 1643 2735 130 0 SpmvReductionKernel (total) + 0.31% 0.26% 5.06% 0.00% % of total available + 1513 2132 130 0 SpmvReductionKernel (user) + 0.29% 0.20% 5.06% 0.00% % of total available + 0 14 0 0 SpmvReductionKernel (scheduling) + 0.00% 0.00% 0.00% 0.00% % of total available + 130 589 0 0 SpmvReductionKernel (other Kernel resources) + 0.02% 0.06% 0.00% 0.00% % of total available + + +Manager breakdown +----------------------------------------------------------------- + LUTs FFs BRAMs DSPs Type Instance + 30747 40877 337 0 Kernel SpmvCacheKernel + 73645 97694 149 192 Kernel SpmvKernel + 363 944 0 0 Kernel SpmvPaddingKernel + 1643 2735 130 0 Kernel SpmvReductionKernel + 17 3072 0 0 DualAspectReg Stream_14 + 533 531 0 0 DualAspectMux Stream_17 + 39 37 0 0 DualAspectMux Stream_1 + 69 68 0 0 DualAspectMux Stream_31 + 43 32 1 0 Fifo Stream_34 + 43 33 2 0 Fifo Stream_36 + 43 33 1 0 Fifo Stream_38 + 44 32 1 0 Fifo Stream_40 + 44 34 77 0 Fifo Stream_42 + 44 33 77 0 Fifo Stream_44 + 43 34 1 0 Fifo Stream_46 + 43 33 1 0 Fifo Stream_48 + 43 33 1 0 Fifo Stream_50 + 43 33 1 0 Fifo Stream_52 + 45 33 2 0 Fifo Stream_55 + 45 36 2 0 Fifo Stream_58 + 39 31 1 0 Fifo Stream_5 + 2 66 0 0 DualAspectReg Stream_61 + 43 31 4 0 Fifo Stream_64 + 77 119 1 0 Fifo Stream_66 + 75 125 4 0 Fifo Stream_68 + 2 1 0 0 StreamPullPushAdapter Stream_70 + 43 31 4 0 Fifo Stream_72 + 107 138 2 0 Fifo Stream_74 + 44 34 14 0 Fifo Stream_78 + 74 120 2 0 Fifo Stream_80 + 179 409 0 0 AddrGen addrgen_cmd_cpu2lmem + 180 412 0 0 AddrGen addrgen_cmd_indptr + 179 406 0 0 AddrGen addrgen_cmd_values + 82 171 0 0 ManagerStateMachine_csrD csrDecoder + 1655 536 0 0 ManagerStateMachine_read readControl + 733 1020 2 0 MAX4PCIeSlaveInterface MAX4PCIeSlaveInterface_i + 8 11 0 0 ResetControl control_streams_rst_ctl + 469 84 0 0 MappedElementSwitch MappedElementSwitch_i + 443 997 5 0 MappedMemoriesController MappedMemoriesController_i + 160 130 0 0 MappedRegistersControlle MappedRegistersController_i + 269 393 0 0 PerfMonitor perfm + 88 186 0 0 SanityBlock SanityBlock_i + 98 90 1 0 SignalForwardingAdapter SignalForwardingAdapter_i + 39 37 1 0 ChecksumMappedDRP checksum_mem_drp + 1497 1608 34 0 PCIeSlaveStreaming dynpcie + 8 12 0 0 ResetControl reset_controller + 16013 48002 281 0 MemoryControllerPro memctrlpro_maia_sodimms + 1630 847 4 0 PCIeBase PCIeBase_i + 140 215 0 0 MAX4CPLD cpld_io_ext_inst + 21 51 0 0 MAXEvents max_events + 7581 8726 24 0 StratixVDDR3 ddr3_core + 7474 8623 24 0 StratixVDDR3 ddr3_core + 7582 8738 24 0 StratixVDDR3 ddr3_core + 7472 8570 24 0 StratixVDDR3 ddr3_core + 7579 8787 24 0 StratixVDDR3 ddr3_core + 7581 8770 24 0 StratixVDDR3 ddr3_core + +Source files annotation report +----------------------------------------------------------------- + +% of total used for each file (note: multiple files may share the same resources) + LUTs FFs BRAMs DSPs filename + 58.95% 51.70% 47.30% 100.00% SpmvKernel.maxj + 59.46% 52.27% 47.30% 100.00% SpmvManager.maxj + 100.00% 87.96% 51.54% 100.00% [ missing source files ]